AO4468

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AO4468
30V N-Channel MOSFET
General Description
Product Summary
The AO4468 combines advanced trench MOSFET
technology with a low resistance package to provide
extremely low RDS(ON). This device is ideal for load switch
and battery protection applications.
ID (at VGS=10V)
VDS
30V
10.5A
RDS(ON) (at VGS=10V)
< 17mΩ
RDS(ON) (at VGS = 4.5V)
< 23mΩ
ESD Protected
100% UIS Tested
100% Rg Tested
* RoHS and Halogen-Free Compliant
SOIC-8
Top View
D
D
D
Bottom View
D
D
G
G
S
S
S
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
TA=25°C
Continuous Drain
Current
C
Units
V
±20
V
10.5
ID
TA=70°C
Maximum
30
8.5
A
IDM
50
Avalanche Current C
IAS, IAR
19
A
Avalanche energy L=0.1mH C
TA=25°C
EAS, EAR
18
mJ
Pulsed Drain Current
Power Dissipation B
Junction and Storage Temperature Range
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Lead
Rev.7.0: July 2013
3.1
PD
TA=70°C
TJ, TSTG
Symbol
t ≤ 10s
Steady-State
Steady-State
W
2
RθJA
RθJL
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-55 to 150
Typ
31
59
16
°C
Max
40
75
24
Units
°C/W
°C/W
°C/W
Page 1 of 5
AO4468
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
IDSS
Zero Gate Voltage Drain Current
Conditions
Min
ID=250µA, VGS=0V
TJ=55°C
±10
µA
1.8
2.4
V
14
17
20
24
VGS=4.5V, ID=9A
18
23
mΩ
36
1
V
4
A
740
888
pF
110
145
pF
82
115
pF
1.1
1.7
Ω
Gate-Body leakage current
VDS=0V, VGS=±16V
VDS=VGS ID=250µA
1.2
ID(ON)
On state drain current
VGS=10V, VDS=5V
50
VGS=10V, ID=10.5A
Static Drain-Source On-Resistance
TJ=125°C
gFS
Forward Transconductance
VDS=5V, ID=10.5A
VSD
Diode Forward Voltage
IS=1A,VGS=0V
IS
Maximum Body-Diode Continuous Current
Crss
Reverse Transfer Capacitance
Gate resistance
VGS=0V, VDS=15V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
A
0.75
DYNAMIC PARAMETERS
Input Capacitance
Ciss
Rg
µA
5
Gate Threshold Voltage
Output Capacitance
Units
V
1
VGS(th)
Coss
Max
30
VDS=30V, VGS=0V
IGSS
RDS(ON)
Typ
0.5
mΩ
S
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
15
nC
Qg(4.5V) Total Gate Charge
7.5
nC
2.5
nC
3
nC
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
VGS=10V, VDS=15V, ID=10.5A
VGS=10V, VDS=15V, RL=1.45Ω,
RGEN=3Ω
5
ns
3.5
ns
19
ns
tf
Turn-Off Fall Time
trr
Body Diode Reverse Recovery Time
IF=10.5A, dI/dt=100A/µs
18
22
Qrr
Body Diode Reverse Recovery Charge IF=10.5A, dI/dt=100A/µs
9
12
3.5
ns
ns
nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initialTJ=25°C.
D. The RθJA is the sum of the thermal impedence from junction to lead RθJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in2 FR-4 board with
2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev.7.0: July 2013
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Page 2 of 5
AO4468
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
30
30
10V
4V
VDS=5V
3.5V
25
25
20
3V
ID(A)
ID (A)
20
15
15
10
10
5
5
125°C
25°C
VGS=2.5V
0
0
0
1
2
3
4
1
5
3
4
5
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
25
1.8
Normalized On-Resistance
RDS(ON) (mΩ
Ω)
2
VGS=4.5V
20
15
VGS=10V
10
1.6
VGS=4.5V
ID=9A
1.4
1.2
VGS=10V
ID=10.5A
17
5
2
10
1
0.8
0
5
10
15
20
ID (A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
0
25
50
75
100
125
150
175
200
0
Temperature (°C)
Figure 4: On-Resistance vs. Junction
18Temperature
(Note E)
40
1.0E+02
ID=10.5A
1.0E+01
35
40
1.0E+00
IS (A)
RDS(ON) (mΩ
Ω)
30
125°C
25
20
125°C
1.0E-01
1.0E-02
25°C
1.0E-03
15
1.0E-04
25°C
1.0E-05
10
2
6
8
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev.7.0: July 2013
4
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0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
Page 3 of 5
AO4468
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
1200
VDS=15V
ID=10.5A
1000
Capacitance (pF)
VGS (Volts)
8
6
4
2
Ciss
800
600
400
Coss
200
0
Crss
0
0
5
10
Qg (nC)
Figure 7: Gate-Charge Characteristics
15
0
1000.0
5
10
15
20
25
VDS (Volts)
Figure 8: Capacitance Characteristics
30
10000
TA=25°C
100.0
1000
RDS(ON)
limited
10.0
Power (W)
ID (Amps)
10µs
100µs
1ms
1.0
100
10ms
10
TJ(Max)=150°C
TA=25°C
0.1
10s
DC
1
0.0
0.01
0.1
1
VDS (Volts)
10
0.00001
100
0.001
0.1
10
1000
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
Zθ JA Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJA=75°C/W
0.1
PD
0.01
Single Pulse
Ton
T
0.001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev.7.0: July 2013
www.aosmd.com
Page 4 of 5
AO4468
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
+ Vdd
DUT
Vgs
VDC
-
Rg
10%
Vgs
Vgs
t d(on)
tr
t d(off)
t on
tf
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
E AR = 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
I AR
VDC
-
Rg
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vds Isd
Vgs
Ig
Rev.7.0: July 2013
Vgs
L
Isd
+ Vdd
t rr
dI/dt
I RM
Vdd
VDC
-
IF
Vds
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Page 5 of 5
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