# Lecture 18

```Lecture 18
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Basic MOSFET amplifier
MOSFET biasing
MOSFET current sources
Common-source amplifier
EE105 Fall 2007
Lecture 18, Slide 1
Prof. Liu, UC Berkeley
Basic MOSFET Amplifier
• For large small-signal gain, the MOSFET should be operated
in the saturation region.
 Vout should not fall below Vin by more than VTH.
EE105 Fall 2007
Lecture 18, Slide 2
Prof. Liu, UC Berkeley
MOSFET Biasing
R2
VDD
The voltage at node X is determined by VDD, R1, and R2: VX 
R1  R2
Also, VX  VGS  I D RS
1
W
2
I D   nCox VGS  VTH 
2
L
 R2VDD


 VGS  V1  VTH   V  2V1 
 VTH 
 R1  R2

1
where V1 
W
 nCox RS
L
2
1
EE105 Fall 2007
Lecture 18, Slide 3
Prof. Liu, UC Berkeley
Self-Biased MOSFET Stage
• Note that there is no voltage dropped across RG
 M1 is operating in the saturation region.
I D RD  VGS  RS I D  VDD
EE105 Fall 2007
Lecture 18, Slide 4
Prof. Liu, UC Berkeley
MOSFETs as Current Sources
• A MOSFET behaves as a current source when it is operating in
the saturation region.
• An NMOSFET draws current from a point to ground (“sinks
current”), whereas a PMOSFET draws current from VDD to a
point (“sources current”).
EE105 Fall 2007
Lecture 18, Slide 5
Prof. Liu, UC Berkeley
Common-Source Stage:  = 0
Amplifier circuit
Small-signal analysis circuit
for determining voltage gain, Av
W
Av   g m RD   2 nCox I D RD
L
Rin  
Small-signal analysis circuit for
determining output resistance, Rout
Rout  RD
EE105 Fall 2007
Lecture 18, Slide 6
Prof. Liu, UC Berkeley
Common-Source Stage:   0
• Channel-length modulation results in reduced small-signal
voltage gain and amplifier output resistance.
Small-signal analysis circuit
for determining voltage gain, Av
Small-signal analysis circuit for
determining output resistance, Rout
Av   g m RD || rO 
Rin  
Rout  RD || rO
EE105 Fall 2007
Lecture 18, Slide 7
Prof. Liu, UC Berkeley
CS Gain Variation with L
• An ideal current source has infinite small-signal resistance.
The largest Av is achieved with a current source as the load.
• Since  is inversely proportional to L, Av increases with L.
W
2 nCox I D
2 nCoxWL
L
Av  g m ro 

I D
ID
EE105 Fall 2007
Lecture 18, Slide 8
Prof. Liu, UC Berkeley
• Recall that a PMOSFET can be used as a current source from VDD.
 Use a PMOSFET as a load of an NMOSFET CS amplifier.
Av   g m1 rO1 || rO 2 
Rout  rO1 || rO 2
EE105 Fall 2007
Lecture 18, Slide 9
Prof. Liu, UC Berkeley
PMOS CS Stage with NMOS Load
• An NMOSFET can be used as the load for a PMOSFET CS amplifier.
Av   g m 2 (rO1 || rO 2 )
Rout  rO1 || rO 2
EE105 Fall 2007
Lecture 18, Slide 10
Prof. Liu, UC Berkeley
Amplifier circuit
Small-signal analysis circuit
including MOSFET output resistances
  0:
 1

Av   g m1 
|| rO 2 || rO1 
 gm2


1
W / L 1
Av   g m1 

1
W / L 2
gm2
Rout 
|| rO 2 || rO1
gm2
Av is lower, but it is less dependent on process parameters
(n and Cox and drain current (ID).
If   0 :
EE105 Fall 2007
Lecture 18, Slide 11
Prof. Liu, UC Berkeley
CS Stage with Diode-Connected PMOS Load
  0:
 1

Av   g m 2 
|| ro1 || ro 2 
 g m1

1
Rout 
|| ro1 || ro 2
g m1
EE105 Fall 2007
Lecture 18, Slide 12
Prof. Liu, UC Berkeley
CS Stage with Degeneration
Amplifier circuit
If   0 : Av  
EE105 Fall 2007
Small-signal analysis circuit
for determining voltage gain, Av
RD
1
 RS
gm
Lecture 18, Slide 13
Prof. Liu, UC Berkeley
Example
• A diode-connected device degenerates a CS stage.
Av  
EE105 Fall 2007
RD
1
1

g m1 g m 2
Lecture 18, Slide 14
Prof. Liu, UC Berkeley
Rout of CS Stage with Degeneration
• Degeneration boosts the output impedance:
Small-signal analysis circuit for
determining output resistance, Rout
Current flowing down through ro is
i X  g m v1  i X  g m  i X RS 
 i X  g mi X RS
v1  i X RS
rO i X  g mi X RS   i X RS  v X
vX
 rO 1  g m RS   RS  rO  g m rO RS
iX
EE105 Fall 2007
Lecture 18, Slide 15
Prof. Liu, UC Berkeley
Output Impedance Examples
Rout

1 

 rO1 1  g m1
gm2 

EE105 Fall 2007
Rout  g m1rO1rO 2  rO1
Lecture 18, Slide 16
Prof. Liu, UC Berkeley
CS Stage with Gate Resistance
• For low signal frequencies, the gate conducts no current.
 Gate resistance does not affect the gain or I/O impedances.
EE105 Fall 2007
Lecture 18, Slide 17
Prof. Liu, UC Berkeley
CS Core with Biasing
R1 || R2
 RD
Av 

RG  R1 || R2 1  R
S
gm
EE105 Fall 2007
R1 || R2
Av  
gm R D
RG  R1 || R2
Lecture 18, Slide 18
Prof. Liu, UC Berkeley
```