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Lecture 19 OUTLINE • Common-gate stage • Source follower Reading: Chapter 7.3-7.4 EE105 Fall 2007 Lecture 19, Slide 1 Prof. Liu, UC Berkeley Diode-Connected MOSFETs Diode-connected NMOSFET RX Diode-connected PMOSFET 1 ro1 g m1 Small-signal analysis circuit 1 RY ro 2 gm2 Small-signal analysis circuit • Note that the small-signal model of a PMOSFET is identical to that of an NMOSFET EE105 Fall 2007 Lecture 19, Slide 2 Prof. Liu, UC Berkeley Common-Gate Amplifier Stage • An increase in Vin decreases VGS and hence decreases ID. The voltage drop across RD decreases Vout increases The small-signal voltage gain (Av) is positive. Av g m RD EE105 Fall 2007 Lecture 19, Slide 3 Prof. Liu, UC Berkeley Operation in Saturation Region • For M1 to operate in saturation, Vout cannot fall below Vb-VTH. Trade-off between headroom and voltage gain. EE105 Fall 2007 Lecture 19, Slide 4 Prof. Liu, UC Berkeley I/O Impedances of CG Stage (l = 0) Small-signal analysis circuit for determining input resistance, Rin Small-signal analysis circuit for determining output resistance, Rout 1 Rin gm EE105 Fall 2007 Rout RD Lecture 19, Slide 5 Prof. Liu, UC Berkeley CG Stage with Source Resistance Small-signal equivalent circuit seen at input vX 1 gm 1 RS gm vin For l = 0: vout vout v X 1 g m RD vin v X vin g m RS 1 EE105 Fall 2007 Lecture 19, Slide 6 Av RD 1 RS gm Prof. Liu, UC Berkeley • The output impedance of a CG stage with source resistance is identical to that of CS stage with degeneration. Small-signal analysis circuit for determining output resistance, Rout Rout rO 1 g m RS RS 1 g m rO RS rO EE105 Fall 2007 Lecture 19, Slide 7 Prof. Liu, UC Berkeley CG Stage with Biasing • R1 and R2 establish the gate bias voltage. • R3 provides a path for the bias current of M1 to flow. vout R3 || 1 / g m g m RD vin R3 || 1 / g m RS EE105 Fall 2007 Lecture 19, Slide 8 Prof. Liu, UC Berkeley CG Stage with Gate Resistance • For low signal frequencies, the gate conducts no current. Gate resistance does not affect the gain or I/O impedances. EE105 Fall 2007 Lecture 19, Slide 9 Prof. Liu, UC Berkeley CG Stage Example Small-signal equivalent circuit seen at input vX 1 1 g m1 g m 2 1 1 RS g m1 g m 2 vout v X g m1 RD Av v X vin 1 g m1 g m 2 RS EE105 Fall 2007 vin Small-signal equivalent circuit seen at output 1 vin 1 g m1 g m 2 RS 1 Rout1 g m1rO1 RS rO1 gm2 1 Rout g m1rO1 || RS rO1 || RD gm2 Lecture 19, Slide 10 Prof. Liu, UC Berkeley Source Follower Stage vout rO || RL Av 1 vin 1 r || R O L gm Small-signal analysis circuit for determining voltage gain, Av vin v1 vout EE105 Fall 2007 Equivalent circuit vout g m v1 ro RL g m vin vout ro RL Lecture 19, Slide 11 Prof. Liu, UC Berkeley Source Follower Example • In this example, M2 acts as a current source. Av EE105 Fall 2007 Lecture 19, Slide 12 rO1 || rO 2 1 rO1 || rO 2 g m1 Prof. Liu, UC Berkeley Rout of Source Follower • The output impedance of a source follower is relatively low, whereas the input impedance is infinite (at low frequencies); thus, it is useful as a voltage buffer. Small-signal analysis circuit for determining output resistance, Rout Rout EE105 Fall 2007 1 1 || rO || RL || RL gm gm Lecture 19, Slide 13 Prof. Liu, UC Berkeley Source Follower with Biasing • RG sets the gate voltage to VDD; RS sets the drain current. (Solve the quadratic equation to obtain the value of ID.) Assuming l = 0: 1 W 2 I D nCox VDD I D RS VTH 2 L EE105 Fall 2007 Lecture 19, Slide 14 Prof. Liu, UC Berkeley Supply-Independent Biasing • If Rs is replaced by a current source, the drain current ID becomes independent of the supply voltage VDD. EE105 Fall 2007 Lecture 19, Slide 15 Prof. Liu, UC Berkeley