Tutorial Notes Tutorial 1: Design of Continuous

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Tutorial Notes
Tutorial 1:
Design of Continuous-Time Filters
from 0.1 Hz to 2.0 GHz
Presented by:
Edgar Sánchez-Sinencio, Texas A&M University
José Silva-Martínez, Texas A&M University
Sunday Morning, May 23, 08:30 - 11:30
Tutorial Notes
Tutorial 1:
Design of Continuous-Time Filters
from 0.1 Hz to 2.0 GHz
Presented by:
Edgar Sánchez-Sinencio, Texas A&M University
José Silva-Martínez, Texas A&M University
Sunday Morning, May 23, 08:30 - 11:30
DESIGN OF CONTINUOUS-TIME
FILTERS FROM 0.1 HZ TO 2.0 GHZ
by: Edgar Sánchez-Sinencio & José Silva-Martínez,
E. Sanchez-Sinencio
Texas A&M University
at IEEE ISCAS’04
- 1 -
J. Silva-Martinez
DESIGN OF CONTINUOUS-TIME FILTERS FROM
0.1 HZ TO 2.0 GHZ
• Introduction and Motivation
• Transconductance Amplifier Topologies
• Linearized OTA techniques
• Low Frequency Transconductance Amps
• LF Design Examples
• High Frequency Transconductance Amps
• HF Design Examples
• RF Filters
• Tuning
• Conclusions and Open Problems
E. Sanchez-Sinencio
- 2 -
J. Silva-Martinez
1
Continuous-Time Filters from 0.1Hz to 2.0GHz
Outline
• Introduction and Motivation
• A family of Transconductance for different frequency ranges
(applications).
• Common-mode feedforward and feedback strategies needed
for differential output filters.
• Frequency- and Q-tuning techniques for OTA-C filters
E. Sanchez-Sinencio
- 3 -
J. Silva-Martinez
Continuous-Time Filters from 0.1Hz to 2.0 GHz
Edgar Sánchez-Sinencio
Analog and Mixed-Signal Center, Texas A&M University
E-mail: [email protected]
Abstract.-The bipolar transconductance amplifier (OTA) was commercially introduced in
1969 by RCA. Designers began using OTAs in the middle 80’s, since then the CMOSOTA has becoming a vital component in a number of electronic circuits, both in open
loop and in closed loop applications. Here, we will focus on open loop applications.
Continuous-time filters implemented with transconductance amplifiers and capacitors
known as Gm-C or OTA-C are very popular for a host of applications. These applications
involve frequency of operation from a few tents of a hertz up to several gigahertz. Several
of those applications are in medical electronics and seismic area where the frequency
range is between 0.1Hz up to 20Hz. Other applications in the audio range do not
commonly use OTA-C filters because switched-capacitor techniques excel in this range.
But for frequency range of a few MHz like in Intermediate Frequency (IF) filters in RF
receivers OTA-C implementations are very attractive. For a few GHz range applications
where the OTA becomes a simple differential pair there is number of researchers
investigating LC-oscillators and filters. In this tutorial we discuss practical
implementations of transconductance amplifiers oriented for wide range of applications
for example in medical, IF filters, hard disk drive linear phase filters, LC-oscillators and
RF filters. Furthermore the unavoidable tuning scheme to compensate the Gm/C
deviations due to process technology variations is discussed. OTA single ended, fully
differential and pseudo differential versions are introduced together with the commonE. Sanchez-Sinencio
- 4 mode feedback circuits needed for proper operation
of differential architectures. J. Silva-Martinez
2
Programmable active
filters and linear circuits using
discrete bipolar OTA. Preliminary
work on M-S tuning
1971
1982
E. Sanchez-Sinencio
1985
Q-tuning &
fo tuning enhancement.
High-frequency Pseudo
Differential OTAs
CMOS OTA-C Filter
with on chip tuning
Active Filter Design using
OTA: A tutorial
by RCA
Bipolar OTA is introduced
1969
Linearization Techniques
1988
1993
- 5 -
present
J. Silva-Martinez
• Hard disk
drivers filters
• XDSL Sigmadelta ADC
• IF Receiver
filters
• Medical
• Seismic
• Built-in
generators
0.1
E. Sanchez-Sinencio
1
101
102
106
- 6 -
107
RF Filters
&
oscillators
Applications
Typical applications of OTA-C filters and frequency ranges
108
109
Frequency (Hz)
J. Silva-Martinez
3
A few examples of continuoustime filters in a host of
applications
ota
E. Sanchez-Sinencio
- 7 -
J. Silva-Martinez
Applications for continuous
time filters
Read channel of disk drives
-for phase equalization and
smoothing the wave form
Top view of a 36 GB, 10,000 RPM,
IBM SCSI server hard disk, with its
top cover removed.
E. Sanchez-Sinencio
- 8 -
J. Silva-Martinez
4
Hard Disk Driver Read Channel
Continuous-Time Analog
Digital
Signal Processing
Signal Processing
PreAmp
Magnetic
Storage
AGC
ADC
LPF
Detector
Equalizer
Timing
Recovery
☛ LPF is needed to:
☛Limit signal and noise bandwidth;
☛Provide anti-aliasing prior to sampling;
☛Provide significant contribution to overall
equalization.
E. Sanchez-Sinencio
- 9 -
J. Silva-Martinez
Analog Processing Blocks
Biological System
Transducer
Preamp
Filter
Signal Processor
Output Signal
Electrical Signal
Block Diagram of a general purpose bioelectric signal acquisition system
-
Differential
Amplifier
Parameter
Vout
+
Common Mode
Reference
Typical range
Gain
1-1000
Bandwidth
0.1 Hz-10KHz
Dynamic Range (DR)
60dB-100dB
CMRR
80-140dB
Zinput
10MΩ-1GΩ at 60Hz
Vnoise
<10nV/
Inoise
<1µA/
Hz
Hz
Typical configuration for the measurement of bio-potentials
E. Sanchez-Sinencio
- 10 -
J. Silva-Martinez
5
Continuous-Time Linear Ramp
Implementation
LMS Integrator
V DD
Vctrl
Vtarget Vctrl
VTARGET
LMS
Vout from
Timer
Step
Vout
Timer
•
•
+
-
+
Vctrl
-
V OUT
M1
CR
Reset
The Timer is a cascode current source with Vctrl controlling the
gate voltage of the current source transistor
The LMS block is an OTA-C integrator with a switch to control
the charging of the capacitor
E. Sanchez-Sinencio
- 11 -
J. Silva-Martinez
Receivers and Transmitters in
wireless
applications -- used in PLL and for
image rejection
6185i digital cell phone
from Nokia.
E. Sanchez-Sinencio
- 12 -
J. Silva-Martinez
6
Low-IF Bluetooth Receiver
ω 0 = 2 ΜHz
Receiver
ω 0 = 2 ΜHz
d/dt
90
-
Frequency Offset
Tracking and
Canceling Circuit
d/dt
ω0 = 2.45GHz
RF Low Noise
Filter Amplifier
ω1 = 2.448GHz
PLL
ω0 = 2.45GHz
Polyphase
Filter
Data
Out
RSSI
Synthesizer
and VCO
Demodulator
• Active polyphase filter is used to reject image and
select channel.
E. Sanchez-Sinencio
- 13 J. Silva-Martinez
Sigma-Delta Oversampled A/D Conversion
Σ∆ modulator
output (digital)
Σ∆ modulator
Input
(analog)
Anti-Alias
Filter
(AAF)
Sampler
Quantizer
Loop Filter
Decimation
Filter
H(s)
Nyquist
output
(digital)
DAC
( Digital-to-Analog
Converter )
High sample rate,
low
resolution
Low sample rate,
high
resolution
Functional level diagram of a general continuous-time sigma-delta
oversampled analog-to-digital converter
E. Sanchez-Sinencio
- 14 -
J. Silva-Martinez
7
E. Sanchez-Sinencio
- 15 -
J. Silva-Martinez
OPERATIONAL TRANSCONDUCTANCE
AMPLIFIER (OTA)
First commercial OTA produced by RCA in 1969, i.e., CA3080
V1
V1
Io
V2
Io = gm(Iabc)(
Iabc
VCVS
V1-V2)
The transconductance gain “ gm” is a function of the
+
Vd
Io = gmVd
-
V2
Iabc .
gm= h1 Iabc for bipolar and weak inversion MOSFETs
gm= h2 [ Iabc]1/2 for MOSFETs in saturation
E. Sanchez-Sinencio
- 16 -
J. Silva-Martinez
8
FOLDED-CASCODE OTA
2IB
2IB
P = 4I B (VDD+ VSS)
POWER:
16kT
vn2 =
(1+ NF)
3g m
NOISE:
i0p
i0n
v
v
in
TRANSCONDUCTANCE:
ip
gm =
IB
1+
IB
2IB
g mo
s
g mp / C P
VSS
INPUT SWING:
OUTPUT RESISTANCE:
VSS + 2VDSAT + VT > VIN
R O ≈ g mn R ON 2 g mp R OP 2
VSS + 2VDSAT < VOUT < VDD −2 VDSATP
OUTPUT SWING:
E. Sanchez-Sinencio
- 17 -
J. Silva-Martinez
OPERATIONAL TRANSCONDUCTANCE
AMPLIFIER (OTA) Frequency Dependence
Gm = gmo/ (1 + s/p)
Where gmo is the DC transconductance gain
p is the dominant pole which is around 10MHz to 100Mhz
gmo
.
frequency
p
E. Sanchez-Sinencio
- 18 -
J. Silva-Martinez
9
Issues about the OTA:
• Operated in open loop conditions
• High-Frequency Operation
• Poor Linearity Range
Gm
Vin
Linearity Range from 50mV to 200 mV
E. Sanchez-Sinencio
- 19 -
J. Silva-Martinez
BASIC INTEGRATOR
vin
gm
g m ≅ µ n C OX
vout
HD3≅
C1
(V
L
W
GS
1 ⎛ Vin
⎜
32 ⎜⎝ VGS −VT
)
−VT ≅ 2µ n C OX
⎞
⎟
⎟
⎠
W
L
ID
2
Mobility degradation:
i
v
i
0p
⎛
⎞
⎜
⎟
⎛
⎞⎜
µ0
1
⎟
⎟
µ n ≅⎜⎜
⎟⎜
⎟
V
θ
(
)
1
V
V
+
θ
−
in
GS
T ⎠⎜
⎝
1
+
⎜ 1+ θ(V −V ) ⎟⎟
GS
T ⎠
⎝
0n
v
in
⎞
θVin
1⎛
⎟
HD3≅ ⎜⎜
4 ⎝ 1+ θ(VGS − VT ) ⎟⎠
ip
2
NOISE:
IB
VSS
E. Sanchez-Sinencio
vn 2 =
- 20 -
16kT
(1+ NF)
3g m
J. Silva-Martinez
10
Differential Pair with Source Degeneration
Improved linearity
1/n=
1
1+g R
m
⎛ 2β I ⎞ v
⎛
⎞2
v
1 B⎟ d 1− ⎜
in
⎟
i = ⎜⎜
⎜
⎟
⎟
d
−
2
⎝ 2n(v GS v T )⎠
⎝
⎠ n
HD 2 = 0
Ideally
32 n
E. Sanchez-Sinencio
v2
in
1
HD 3 =
2 (v
GS
−v
)
T
2
- 21 -
J. Silva-Martinez
gm linearization schemes via source degeneration.
Ib
Ib
Vi +
R
R
Ib
Vi
Vi-
-
Vi+
2R
2Ib
M2
M1
M3
M4
(a)
Vin
Ib
Ib
(a)
Vin+
Ib
(b)
Vin+
M1
VG
M2
Vin
+
Vin
M1
M3
M3
M2
Vin
M3 '
(b)
(c)
Active Source Degeneration topologies; (a) and (b) transistors biased on triode region and (c)
with saturated transistors.
E. Sanchez-Sinencio
- 22 -
J. Silva-Martinez
11
Properties of OTAs using source
degeneration
Transconductance
Reference/Figure
Properties
g m1
Fig. (a)
1+
g m1
1 + g m1R
Fig. (b)
Low sensitive to common-mode input
signals. The linear range is limited to
Vin<VDSAT, and THD=-50 dB.
β1
4 β3
(
R = 1 µoCox Vgs − VT
)
Low sensitive to common-mode input
signals. Limited linearity improvement,
HD3 reduces by -12 dB. More silicon
area is required.
g m1
Fig. (c)
M1=M2, M3=M4
Highly sensitive to common-mode input
signals. For better linearity large VGS3
voltages are required. Large tuning range if
VG is used.
1 + g m1 / g m3
M1=M2
E. Sanchez-Sinencio
- 23 -
J. Silva-Martinez
Single-input Transconductor (ST) Implementations
Ib
Ib
io
vin
M1
vb
M1
(b)
Ib
1:1
io
vb
M2
vin
(a)
Ib
io
+
-
A
vb
M2
vin
M1
M2
vin
(c)
io
io
M1
Ib2
Ib
vin
(d)
(e)
Single Input (a) Negative Simple Transconductor, (b) Cascode Transconductor, (c) Enhanced Transconductor, (d) Folded-Cascode Transconductor, (e) Positive Simple Transconductor.
• Observe that:
gm = f(Ib), the exact relation is a function of the transistor region
of operation.
• Note that output impedance of (a) and (e) are only 1/gds and (b),(c) and (d)
implementations have larger output impedances.
E. Sanchez-Sinencio
- 24 -
J. Silva-Martinez
12
Properties of Simple (single input/ single output)
Transconductors
Structure/
Figure
R out
Simple/1(a)
Min V
1
2I
g ds 1
Cascode/l(b)
g
g ds 1
Enhanced/1(c)
ds 1
g ds 1
*
+V
sat ,I
(1 +
m)
2I
(1 +
m)
2I
B
k
B
k
ds 2
g
Folded/1(d)
m2
m2
g
B
k
g ds 2
A g
g
DD
B
+V
sat ,I
B
+V
sat ,I
B
m 2
2I
g ds 2
B
k
+ V
+ V
Tp
sat ,I
B
* The bottom devices of the cascode pairs have an aspect ratio of (W/L)1/(W/L)2=m2. K is
a technological parameter determined by the mobility, and the gate oxide;VDSAT, 1B is the
saturation voltage for the IB current source
E. Sanchez-Sinencio
- 25 -
J. Silva-Martinez
Potential Solutions for Rail-to-Rail Amplifiers:
OTAs suitable for Low Frequency Applications
Io+
VB
Io-
VB
Vi-
Vi+
Io-
C2
Vi+
C1
IB
Io+
ViFG+
C2'
M1 M2
ViFG-
Vi-
C1'
IB
FG DP Implementation
Io+
Io-
VB
FG DP Equivalent circuit
ViVi+
M1
IB
M2
Bulk Driven DP
E. Sanchez-Sinencio
- 26 -
J. Silva-Martinez
13
Three Conventional Differential Input –Single Ended OTAs
+
Vin
+
io
-
Vin
CMp
Vo
vb1
io
Vo
M1
+
Vin
M2
Vin-
Vin-
M1
M2
+
Vin
vb1
−
in
v
io
vin+
vout
vB2
ITAIL
ITAIL
(a) Simple differential input OTA.
(c) Cascode
(b) Balanced OTA
E. Sanchez-Sinencio
- 27 -
Simple OTA Design Equations
J. Silva-Martinez
⎛ W ⎞
g m = µ n C OX ⎜⎜
⎟⎟ V DSAT
⎝ L ⎠
Noise ⇒ g m > g m , min
M2
M2
GBW =
VX
iout
id1
ωp =
id2
v1
g mp
Cp
≅ µp
V DSAT
2L p2
v2
M1
Rout ≅ rp rn
M1
IB
rds ≅
gm
CL
Vearly L P
ID
E. Sanchez-Sinencio
,
V DSAT
ωP ≅
g mp
2C GSP
≅
µ P VDSATP
2L P
Noise(VRMS ) =
2
- 28 -
is lim ited !!
16kT 1
g
1 + m2
3
g m1
g m1
(
BW
)
J. Silva-Martinez
14
Simple OTA Frequency Response
1
MP’
g mp
MP
id1
VX
id1
gmvd
iout
'
=
1
g mp
R O = R ON R OP
R OL
Vx
CX
Vo
gmpvx
Ro
1/gmp’
CO
-gmvd
id2
⎛g ⎞
g m ⎜ mp' ⎟
⎜g ⎟
R0
g mR 0
mp ⎠
V0 = − ⎝
V −
V
C 0 1 + SR 0C 0 d 1 + SR 0 C 0 d
1+ S
'
g mp
v2
v1
M1
M1
IB
gmR0
Vout
AV2
1/RXCX
E. Sanchez-Sinencio
ω
AV1
- 29 -
J. Silva-Martinez
SECOND-ORDER FILTER
Bandpass output:
ω0 =
vin
vLP
vBP
gmin
-gm1
Q=
RQ
E. Sanchez-Sinencio
C1
C2
(g
m1g m 2 R Q
2
)
A Vpeak = g min R Q
N= number of OTAs
⎞
3 N ⎛ Vin
⎜
⎟
IM3 ≅
⎜
32 ⎝ VGS − VT ⎟⎠
C1C 2
gm2
C2
C1
g m1g m 2
2
g m ≅ µ n C OX
- 30 -
(V
L
W
GS
)
−VT ≅ 2µ n C OX
W
L
ID
J. Silva-Martinez
15
SECOND-ORDER FILTER
v in
v LP
v BP
g min
-g m1
g m1
⎞
3 ⎛ Vin
⎟
IM3 ≅ ⎜
32 ⎜⎝ VGS − VT ⎟⎠
C1
C1
RQ
2
( 3)
INTEGRATED NOISE:
v eq ,in ( RMS) ≅
8kT
3πC1
*
1
R Q g min
* 1+ NFin +
g m1
g min
(2+ NF + NF )+ R0.g75
1
2
Q min
Tradeoff:
Large gain reduces the noise level but increases the harmonic distortions.
E. Sanchez-Sinencio
- 31 -
J. Silva-Martinez
Output resistance effects
Cf
Cin
vLP
vBP
vin
R1
gminvin
- gm1vLP
ω0 ≅ ω0 ideal 1+
1
E. Sanchez-Sinencio
R2
RQ
gm2vBP
C2
CENTER FREQUENCY IS ITTLE SENSITIVE TO AV
Q ideal A V
⎛
Q
BW≅ BWideal ⎜⎜1+ 2
AV
⎝
C1
⎞
⎟
⎟
⎠
BW IS QUITE SENSITIVE TO AV
Av=gm1R1 (R1=R2 OTA output resistance)
- 32 -
J. Silva-Martinez
16
EFFECTS OF THE NON-DOMINANT POLE
Cf
Cin
vLP
vBP
vin
R1
gminvin
- gm1vLP
RQ
R2
gm2vBP
1
2BWideal
1+
ω P1
ω 0 =ω 0ideal
g
g m ≅ m0
s
1+
ω p1
Single pole:
C1
C2
Sensitive
ω 0ideal
ω P1
2BWideal
1+
ω P1
1−2Q ideal
BW=BWideal
E. Sanchez-Sinencio
Quite sensitive
- 33 -
J. Silva-Martinez
PARASITIC CAPACITORS
Cf
Cin
vLP
vin
gminvin
- gm1vLP
vBP
R1
C1
RQ
R2
gm2vBP
C1 and C2 are affected by the grounded parasitic
capacitors (partially corrected by the automatic tuning
system)
ω0 =ω0ideal
Cin introduces a high frequency zero
C1C 2
(C1 +C in )(C 2 +C f )+C 2 C f
⎛
BW=BWideal
E. Sanchez-Sinencio
C2
- 34 -
⎞
(C1 )⎜⎜ C 2 +C f + g m 2 −g m1 C f ⎟⎟
⎝
g1
(C1 +C in )(C 2 +C f )+C 2 C f
⎠
J. Silva-Martinez
17
SMALL SIGNAL ANALYSIS
40
•Little sensitve to
OTA output
resistances
Second pole effects
All effects
Magnitude [dB]
30
Ideal transfer function
Miller capacitors
•Quite sensitive to
parasitic poles
Resistance effects
20
•Parasitic capacitors
should be accounted
in the ATS
(matching)
10
•Tune the filter itself
(??)
0
-10
2E+8
3E+8
4E+8
5E+8
6E+8
7E+8
8E+8
9E+8
1E+9
Frequency [Hz]
E. Sanchez-Sinencio
- 35 -
J. Silva-Martinez
Parasitic capacitors
VO
Junction capacitors are non-linear:
Coxide
Cjunction
C total =C L +
C j0
1+
HD3≅
If VDB’ = 1, and Vin = 200 mV
HD3≤
CL> 3 Cjo
E. Sanchez-Sinencio
C L C j0
1
250 C L +C j0
(
HD3 < 0.1 % !!
3
32
v0
VDB '
C L C j0
(C
L
+ C j0
)
2
⎛ V ⎞
⎜ in ⎟
⎜ V '⎟
⎝ DB ⎠
2
VDB’ = 2φf+VDB is larger than 1 V.
)
2
Rule of thumb: design such that CL > 5 Cjo
- 36 -
J. Silva-Martinez
18
VERY LOW FREQUENCY FILTERS
The Design of Analog Circuits below 100 Hz
is not trivial
• RC > 0.001 sec
• if C = 10 pF then R > 100 MOHMS
• for a 1 Hz filter (pace makers and other applications)
•C = 10 pF,
R = 628 GOHMS (Gm = 2 pA/V)
• C = 1000 pF,
E. Sanchez-Sinencio
R = 6.28 GOHMS (Gm = 2 nA/V)
- 37 -
J. Silva-Martinez
WE NEED SMALL GM
For the basic OTA-C integrator,
τ=
g
CL
⇔f = m
gm
2π C L
• We need very small gm for very low frequency applications
• As an example, for τ = 1s and gm = 16nA/V, CL = 1.6 nF !!
• For a POLY-I POLY-II Capacitor ( C/A ~ 600 aF/µm2 ) in the
AMI 1.2µ process, this means a Si area of 2.7 mm2 !! =>
Impractical for IC’s ( Tiny chip area ~ 4 mm2 )
19
IMPEDANCE SCALERS for realization
of very large time constants
Single capacitor
Voltage amplifier
vi
Current amplifier
iin
vi
iC
vi
iin
C
iC
C
C
NiC
-AV vi
i in = (sC(1 + A V ))v i
i C = (sC) v i
i in = (sC(1 + N ))v i
Remarks:
¹Voltage amplification is useless for low-voltage continuous-time applications.
¹Impedance scaler based on currrent amplification is precise for moderated N.
E. Sanchez-Sinencio
- 39 -
J. Silva-Martinez
CAPACITOR MULTIPLIER:
CIRCUIT IMPLEMENTATION
vi
vi
=
i i (N + 1)i C
1 : N
ii
Z eq =
vi
iC
C
NiC
1
s[(N + 1)C]
The following conditions must be satisfied:
A
➨Low impedance at node A
1
:
N
➨Transistor output resistance might be neglected
➨Current gain is precise
E. Sanchez-Sinencio
- 40 -
J. Silva-Martinez
20
DESIGN EXAMPLE: Capacitor
Multiplier
8.00E-9
current [A]
6.00E-9
100 pF capacitor.
ideal capacitor
4.00E-9
Scaled capacitor is 5 pF
and N=19.
scaled capacitor
2.00E-9
0.00E+0
0.00
4.00
8.00
12.00
frequency [Hz]
E. Sanchez-Sinencio
- 41 -
J. Silva-Martinez
IMPROVING ITS FREQUENCY
RESPONSE
Cascode transistor improves
frequency response
1 : N
ii
vi
C
iC
NiC
VB
Design procedure:
MP is optimized for frequency.
MP
N-type transistors are optimized for
precision.
The loop must be stable
1
E. Sanchez-Sinencio
:
N
- 42 -
J. Silva-Martinez
21
CURRENT DIVISION PRINCIPLE PLUS SOURCE DEGENERATION
TRANSCONDUCTANCE
⎛ vi1 − vi 2 ⎞
⎟
HDn ∝ ⎜
⎜ V −V ⎟
T⎠
⎝ GS
i 01 − i 02
vi1 − v i 2
≅
n
2 µCOX WR
M +1 L R
(VGS − VT )
⎛W⎞
⎜⎜ ⎟⎟
⎝ L ⎠m
M=
⎛W⎞
⎜⎜ ⎟⎟
⎝ L ⎠1
E. Sanchez-Sinencio
- 43 -
J. Silva-Martinez
CURRENT CANCELLATION PRINCIPLE
Gm =
N −1
g m1
N +1
PARTIAL POSITIVE
FEEDBACK !
LINEAR RANGE IS
LIMITED!
GOOD NOISE
PERFORMANCE
E. Sanchez-Sinencio
- 44 -
J. Silva-Martinez
22
OTA FOR VERY LOW-FREQUENCY APPLICATIONS
gm =
⎞
2( N − 1) ⎛
W
⎜ µCOX R (VGS − VT )⎟⎟
M + N + 1 ⎜⎝
LR
⎠
⎛W⎞
⎜ ⎟
⎝ L ⎠ MM
M=
⎛W⎞
⎜ ⎟
⎝ L ⎠ M1
⎛W⎞
⎜ ⎟
⎝ L ⎠ MN
N=
⎛W⎞
⎜ ⎟
⎝ L ⎠ M1
3 techniques are used:
Source degeneration
Current splitting
Current cancellation
E. Sanchez-Sinencio
- 45 -
J. Silva-Martinez
Floating Gate plus Current Division OTA
VDD
M7
M8
M9
M10
gm =
ISS
VSS
Vb
MM1
M1
M2
M +1
(g m )
MM2
Iout
Vi-
α
α < 1 due to floating gates
Vi+
M5
M3
M4
M6
Floating gates improve linearity but:
DC-offset might be an issue
Signal attenuation: noise might be an issue as well
VSS
E. Sanchez-Sinencio
- 46 -
J. Silva-Martinez
23
Bulk Driven plus Current Deviation OTA
VDD
M8
M9
M7
Input impedance is not very large:
important issue for low frequency
applications.
M10
ISS
VSS
MM1
VG
M1
M2
MM2
Gm-bulk is 4-5 times smaller than
normal gm.
Vout
Large parasitic capacitors (wellsubstrate)
Vi+
ViM5
iout
M3 M4
PSRR might be limited
M6
VSS
Bulk-Driven & Current splitting
E. Sanchez-Sinencio
- 47 -
J. Silva-Martinez
Chip microphotograph of a sub-hertz
filter/oscillator (JSSC-Aug-2002).
CMFB
Multiplier
OTA
E. Sanchez-Sinencio
- 48 -
Comparators
Capacitor
multiplier
Capacitor
multiplier
J. Silva-Martinez
24
Experimental results for a 0.8 Hz BPF
(0.5 µm CMOS technology).
E. Sanchez-Sinencio
- 49 -
J. Silva-Martinez
BULK DRIVEN OTA
EXPERIMENTAL RESULTS (0.5 µm)
Input Ch1 214mVpp @ 1 Hz
Output Ch2 15.2mVpp
E. Sanchez-Sinencio
THD ~ -39dBm ~ 1.1% @214mVpp, 1Hz
- 50 -
J. Silva-Martinez
25
EXPERIMENTAL RESULTS FOR
THE DIFFERENT OTA DESIGNS
PARAMETER
REFERENCE
GM (nA/V)
HD3(%)
Input noise (µVrms)
[email protected]%HD3(dB)
IBIAS(nA)
9.4
[email protected]
18.1
69.9
2.6
SD+CD
FG+CD
9.3
[email protected]
26.1
70.3
120
9.2
[email protected]
39.1
69.5
232
BD+CD
9.4
[email protected]
104.7
69.6
560
Key:
SD source degeneration
CD current division
FG floating gate
BD bulk driven
E. Sanchez-Sinencio
- 51 -
J. Silva-Martinez
OTA for Low-Frequency Applications
with Current cancellation techniques
i o1
i3
i o2
i4
i1
M2
i2
M2
M2
M2 in saturation
VY+vy
V X+vx
M2
M1
M1
V X-vx
VY-vy
M1
M1
VX+vx
M1 in triode
Basic circuit is an analog multiplier
E. Sanchez-Sinencio
- 52 -
J. Silva-Martinez
26
OTA with current splitting and
cancellation techniques
VDD
M1
Vcmfb
M1
M1
M1
M2
kM2
M2
M2
kM2
M2
VY+vy
kM2
iop
VY+vy
M3
M3
M4
Vcmfb
kM2
ion
VX+vx
VX-vx
VX+vx
M4
M3
M3
VSS
Basic circuit is an analog multiplier
E. Sanchez-Sinencio
- 53 -
J. Silva-Martinez
Fully Differential and Pseudo Differential OTAs
Common - Mode Feedforward and
Feedback strategies needed for
differential output filters
E. Sanchez-Sinencio
- 54 -
J. Silva-Martinez
27
Fully Differential OTA Characteristics
Simple Differential OTA
With tail Current Source
Common-Mode
VDD
VDD
Differential-Mode
M2
Vout-
M2
M2
Vbias
M2
Vout+
Vout-
Vi
Vbias
M2
VDD
Vbias
+
M1
Vout-
M2
Vout+
Gm=gm1
Vcm
Vout+
M1
M1
Vcm
Vi-
M1
Vd
Itail
M1
M1
-Vd
Gm =
g m1
1+ g m1 R S
VSS
Rs
VSS
VSS
✘ Limited linear input range
✘ Limited tuning range
E. Sanchez-Sinencio
✔ Reasonable Common-mode gain
✔ Reasonable PSRR
- 55 -
J. Silva-Martinez
Pseudo Differential Transconductance
❏ Advantages
VDD
Vbias
M2
Vout-
V i+
M2
❏ Disadvantages
Vout+
M1
M1
VSS
Simple Pseudo
Differential OTA
E. Sanchez-Sinencio
✔ Suitability for low voltage
✔ Wider common-mode input range
Vi-
✘ Poor common-mode gain
ACM=ADM>>1
✘ Poor PSRR
✘ Low output impedance
✘ Need for fast and strong Extra
CMFB Circuit to
(1) Fix output common-mode voltage
(2) Suppress common-mode signals
- 56 -
J. Silva-Martinez
28
Derivation of CMFF Pseudo-differential OTA
M2
M2
M2
iout-
iout
Vin
Vin+
M1
Single ended OTA circuit
iout+
M1
M1
Vin-
Circuit of OTA for differential input
Z2
Vin
Vin+
Z1
Vin-
Z1
Vout-
Vout
E. Sanchez-Sinencio
Vout+
- 57 -
J. Silva-Martinez
CMFF Techniques for Pseudo-differential
OTAS
M4
M2
M2
iout-
M3
Vin+
M4
iout+
M1
Vin-
M1
M3
Circuit of OTA for common mode signals
Z2
Z1
Vout-
Vin+
Z1
Z2
Z1
Z2
Vin-
Vout+
Z1
E. Sanchez-Sinencio
- 58Z 2
J. Silva-Martinez
29
Fully-balanced, fully-symmetric CMFF OTA
M
M
4
M
2
i
V
M
in+
3
i
out-
M
2
out+
V
M
4
M
1
in-
1
M
3
Z2
Z1
Vout-
Vin+
Z1
Z2
Line of symmetry
Z1
Z2
Vin-
Vout+
Z1
E. Sanchez-Sinencio
- 59 -
Z2
J. Silva-Martinez
OTA with improved linearity
Node A
M4
M2
M2
iout-
M3
Vin+
M4
iout+
M1
M1
Vin-
M3
Transistors operating in
linear region
Vcnt
E. Sanchez-Sinencio
M5
M5
M5
M5
Fully-balanced, fully-symmetric, pseudo differential CMFF OTA
- 60 -
J. Silva-Martinez
30
Pseudo-Differential OTA with large output
impedance
VDD
VCMFB
M4
VDD
VCMFB
M4
M3
VBIAS
M3
amp
VG2
VCM + vo
M2
VG 2
M2
V D1
VCM + v i
VG2
VBIAS
M3
VCM − vo
VTUNE
M3
amp
VTUNE
M2
M2
VTUNE
M1
VD1
VD1
M1
VCM − vi
M1
GND
GND
Pseudo-differential OTA
RGC amplifier “amp”
☛ Transistors M1 operate in Linear region: Wide linear range; Large tuning
range;
☛ RGC loop: Fix VDS1 ➨ provides better linearity.
E. Sanchez-Sinencio
- 61 -
J. Silva-Martinez
OTA Design Issues: RGC Loop
VDD
i
VTUNE
A(s)
Vo
Short channel effects
M2
CL
VD + vd
VCM + vi
M1
Z
GND
HD3 ≈
Vi 2
β2
⋅
4 [ A( s ) g m 2 + β (VCM − VTN − VD )]2
☛ OTA Gm’s Linearity: Limited by how well the drain voltage of the
input transistor is fixed.
E. Sanchez-Sinencio
- 62 -
J. Silva-Martinez
31
Design Issues: Short-Channel Effects
⎛
⎞
1
⎟•
µ eff = µ 0 ⎜
⎜ 1+ θ(VGS + v gs − VT ) ⎟
⎝
⎠
⎞
⎛
⎟
⎜
1
⎟
•⎜
⎟
⎜
1
⋅( VDS + v ds ) ⎟
⎜ 1+
L
ε
c
⎠
⎝
☛ Transversal electric
field’s effect is reduced
by RGC loop;
☛ Trade-off:
THD vs. Frequency
response
E. Sanchez-Sinencio
- 63 -
J. Silva-Martinez
TYPICAL OTA ARCHITECTURES WITH SOURCE DEGENERATION
VDD
MP B
IB
VDD
MP B
IB
MP B
2IB
MP B
2IB
VB2
VB2
iod
2
iod
2
•
vid
2
•
VT_N
M1
M1
•
MR
MNB
VR
iod
2
•
vid
2
•
vid
2
•
VR
VT_N
M1
•
M1
•
MR
IB
VB1
MNB
MNB
VSS
Gm =
E. Sanchez-Sinencio
g m1
1+ N n
iod
2
vid
2
•
•
IB
VB1
MNB
VSS
2
⎛
⎞
v id
⎟ =
1− ⎜
⎜ 2(1 + N )V
⎟
n DSAT1 ⎠
⎝
⎛W⎞
µ n COX VDSAT1⎜⎜ ⎟⎟
⎝ L ⎠1
- 64 -
1+ N n
⎛
⎞
vid
⎟
1− ⎜
⎜ 2(1 + N )V
⎟
n DSAT1 ⎠
⎝
2
J. Silva-Martinez
32
OTA based on Complementary Differential Pairs
TRANSCONDUCTANCE:
VDD
Gm =
IB
IB
g
g mn
+ mp
1+ NN 1+ NP
DISTORTION:
vin
VCP
i0p
⎞
1 ⎛
Vin
⎟
HD3 ≅ ⎜⎜
32 ⎝ (VGS − VT )(N + 1) ⎟⎠
vip
i0n
VCN
2
OUTPUT RESISTANCE:
2
g r R 2 g mp rop R P
R out ≈ mn on N
2
2
IB
IB
VSS
OUTPUT SWING IS LIMITED:
DC GAIN:
A V ≈ A VN
VIN − VTN < VOUT < VIN + VTP
E. Sanchez-Sinencio
- 65 -
J. Silva-Martinez
OTA Results
VDD
vin
VCP
i0p
40
IB
vip
i0n
VCN
Gain (dB)
IB
20
0
IB
IB
1E+6
VSS
1E+7
Frequency (Hz)
1E+8
1E+9
180
W, L
Bias current
MP
200, 0.6 µm
200 µA
MCP
15, 0.6 µm
0
MN
200, 0.6 µm
200 µA
MCN
30, 0.6 µm
0
µA
µA
160
Phase (Degrees)
Transistor
140
For f ~ 100M-1GHz
Phase error < 10 °
120
100
80
1E+6
E. Sanchez-Sinencio
- 66 -
1E+7
Frequency (Hz)
1E+8
1E+9
J. Silva-Martinez
33
Common-Mode Feedback Circuits
V o+
Vin+
Fully
Differential
Amplifier
Vin-
Vo -
(H1)
VCMC
H3
CM (H2)
Level
Sense
Circuit
+
-
Vcorrection
CM Detector
Reference
Voltage
Conceptual Architecture of
Common-Mode Feedback Loop
E. Sanchez-Sinencio
- 67 -
J. Silva-Martinez
Example of a compensated Op Amp and a CM sense circuit
Vo1
Vi1
+ -
Vi2
+
Vcm
+
- +
Vo2
-
Vcm
-
VCM
VCMC
VDD
VB1
M10
VB1
M5
M25
M7
ICMS
Vo2
Vi1
M1
M2
C
VCM
Vo1
Vi2
M22
M21
C
VB2
M9
M24
M23
M3
VB3
M4
M6
M26
VB3
M27
VSS
E. Sanchez-Sinencio
Op Amp
- 68 -
CM Detector
J. Silva-Martinez
34
Vref
-
I-V conversion
+
Vop=Vip
Common-mode feedback circuit.
(a) Block diagram. (b) Circuit using floating gates.
Vcmfb
+
Von=Vin
VDD
(a)
M10
M9
M11
M2
M1
Vb
.
M3
M4
Vin
VSS
Vcmfb
M7
M6
VSS
E. Sanchez-Sinencio
(b)
- 69 -
CMFB FOR OTAS:
Solution 1
J. Silva-Martinez
VDD
VB1
IB
Typical OTA connection in
pseudo- differential OTA-C
based circuits.
IB
Vin+
IB
Vin-
The common-mode
voltage is obtained
from the input of the
following stage.
VB2
IB
IB
IB
+
VC
IB
VREF
IB
VSS
VDD
IB
IB
IB
IB
Vo
Vin-
Vin+
GND
R1
MC
IB
IB
IB
IB
R1
M1
IB
M1
IB
VSS
Pseudo-differential OTAs including the CMFB for
the first one with good PSRR
E. Sanchez-Sinencio
- 70 -
J. Silva-Martinez
35
COMMON-MODE FEEDBACK USING BYPASSING THE LOW-FREQUENCY
SECTION
MPB
gR P
IB
MPB
MPB
IB
IB
M2
v01
M1
2g RN 2g RN
CL
vi2
VB 2
M2
CL
M1
M1
V REF
gcmfb
vcmfb vcmfb,
MNB
gR P
VDD
v02
CP0
vi1
IB
M2
M2
CP0
MPB
MNB
CP2
MNB
vcm
CP1
2g RN
MNB
M1
2g RN
vcmfb
MNB
VSS
E. Sanchez-Sinencio
- 71 -
J. Silva-Martinez
Testing the COMMON-MODE FEEDBACK in a
biquadratic filter
icm
vi+ + -
+-
+-
vi- - +
-+
-+
vo+
vo-
+-+
icm
CMFB
CMFB
Biquadratic section with a common-mode input
current: pulse of 40 mA.
E. Sanchez-Sinencio
- 72 -
Pulse response of the CMFB embedded in a
biquadratic section
J. Silva-Martinez
36
Frequency response
Magnitude
and
Group Delay
200 MHz linear phase filter: Group delay ripple is < +/- 1 nsec up to 400 MHz
E. Sanchez-Sinencio
- 73 -
J. Silva-Martinez
A PD Solution 2
VDD
Differential Mode OTA
Vi+=Vicm+Vd/2
Vi-=Vicm-Vd/2
+
Gm
_
Gm(Vicm+Vd/2)
+
GmVd/2
M2
M2
_
Gm(Vicm-Vd/2)
-GmVd/2
Vout-
Vout+
2M2
Icm
2Icm
Icm
+
Gm
_
_
GmVicm
Vi+
M1
M1
Vi-
Vi+
M1
M1
Vi-
GmVicm
VSS
+
Common Mode OTA
VSS
Pseudo differential OTA With CMFF
✔ CMFF is applied to cancel the common mode input signal
✘ Add load to the driving stage, input capacitance doubles
✘ CMFB is still needed
E. Sanchez-Sinencio
- 74 -
J. Silva-Martinez
37
Proposed OTA Block Diagram (solution 3)
Gm(Vicm+Vd/2)
Vi+=Vicm+Vd/2
+ +
Gm
Vi-=Vicm-Vd/2
_
Gm(Vicm+Vd/2)
+
Gm(Vicm-Vd/2)
_
_
GmVd/2
-GmVd/2
-GmVicm
Gm(Vicm-Vd/2)
1
Σ
2
-GmVicm
❏ Common-mode detection using the same differential
transconductance by making copies of the current
✔ Input capacitance is not increased
✔ CMFF is inherently achieved
✔ CMFB can be easily arranged
E. Sanchez-Sinencio
- 75 -
J. Silva-Martinez
Proposed OTA Architecture
VDD
M3
VX
M3
M3
M3
VDD
I1 + I 2
2
Vout+
I 01 =
I 2 − I1
2
I1I1 + I 2
2
I1
M1
Vi
M1
-
Vout
I2
I0 =
I1
I1
M2
Vi
+
M2
I2
M2
M2
I1 − I 2
2
I2
M2
M2
VSS
❏ Inherent common-mode detection
❏ Inherent common-mode Feedforward
E. Sanchez-Sinencio
- 76 -
J. Silva-Martinez
38
Combine CMFB and CMFF
VDD
Vref
M1
VDD
VX (from next stage)
M 3' M3
VX (from next stage)
VX
M3
M3
M3 M 3'
VDD
Vout+
I1
Vi+
M1
Vi-
M1
I1
Vout-
I2
I2
VY
M2
M 4'
M4
M4
M2
M2
VZ
M4
M4
VY
M 4'
VSS
❏ CMFB is arranged exploiting the direct connection of the OTAs
❏ Avoid using a separate common-mode detector
❏ Differential-mode signals and common-mode signals share
basically the same loop
E. Sanchez-Sinencio
- 77 -
J. Silva-Martinez
Small Signal Analysis
❏ The path from the differential signal to the ouput
encounters one pole
❏ The other path is a common-mode path
g m ( s) =
iod
gm2
g m1
≅ g m1
=
vd
g m 2 + sC Z 1 + s / ω nd
ω nd =
gm2
CZ
∆φ ≅ − tan −1 (ω / ω nd 1 )
min VDD = max{(VTN + Vov1 + Vov 2 + V peak ), (VTP + Vov 3 + Vov 4 )}
E. Sanchez-Sinencio
- 78 -
J. Silva-Martinez
39
Simulation Results
I
+
+
g m1
V
+
o
+
gm2
C
_
V
_
Vcm
cm
+
V
cm
-
_
_
o
I
cm
CMFB
Information
Output voltage applying common-mode current step (Icm)
E. Sanchez-Sinencio
- 79 -
J. Silva-Martinez
How to use OTAs as CM Detector?
V
V
+
in
C
+
g m1
V
in
+
BP1
-
+
gm 2
_
_
C
+
+
+
g m1
_
+
L P1
+
_
+
g m1
_
+
_
C
_
C
V
V
V
L P1
B P1
CMFB
CMFB
Information
Information
❏ A 2nd Order Filter is used as an example
❏ Exploit direct connection of the cascaded OTAs in the filter
❏ Differential OTA used as CM
detector also
E. Sanchez-Sinencio
- 80 J. Silva-Martinez
40
How to design filters operating
in microwave frequencies ?
E. Sanchez-Sinencio
- 81 -
J. Silva-Martinez
Problem Definition and
Motivations
LNA
Image
Reject
Filter
to the
IF Strip
LO2
Duplexer
Baseband
PA
BPF
90o
• Transceiver front-ends
are the sections where
the signal processing is
performed at the
frequency of the
transmitted and
I received signals.
• Frequency range of
interest is from 900 MHz
to 2.4 GHz.
LO1
Baseband
Q
• The BPF is off-chip for
high performance
increasing the cost and
the form factor.
E. Sanchez-Sinencio
- 82 -
J. Silva-Martinez
41
Equivalent Circuit & Calculation
Cs
9
Ls
Port1
Rs
Q-factor
8
Port2
7
6
Cox2
Cox1
5
4
3
2
Csub
Rsub
Csub
Rsub
1
0
0
1
2
3
4
5
6
Frequncy (GHz)
Equivalent Circuit
Parameter Calculation
E. Sanchez-Sinencio
- 83 -
J. Silva-Martinez
Layout Split 1
Shape & Radius
9
Q-factor
8
NxWxS
(4.5x15x1.5)
7
square (R=60)
6
5
octagon (R=60)
4
3
square (R=60)
octagon (R=60)
square (R=30)
octagon (R=30)
2
1
square (R=30)
0
0
1
2
3
4
5
6
octagon (R=30)
Frequncy (GHz)
• Shape : Octagon > Square
• Radius : 60 > 30
E. Sanchez-Sinencio
- 84 -
J. Silva-Martinez
42
Q-Enhancement Bandpass Filter
Vdd
L
+
Vin
+
Gm
Vout
C
2
2L
Gloss
2
-G
2
Vin
+
L
C
Vout-
Frequency
Control
C
Vout+
Gm
M1
M2
-G
2
Q - Enhancement
Control
Qo ≡
(a)
1
Qo
⇒Q=
G
ω o LGloss
1−
Gloss
(b)
(Gloss > G for stability )
E. Sanchez-Sinencio
- 85 -
J. Silva-Martinez
A CMOS Programmable RF Bandpass
Filter
Vdd
Programmable in:
•Peak Gain (not exploited previously)
•Filter Q
•Center Frequency
L
L
Vcontrol
( Frequency Tuning )
Vout-
C
C
Vout+
H ( j ω o ) ≅ Gm ( j ω o ) Q ω o L
M1
+
M2
M5
M6
Vin
ω
o
≅
1
LC
Rdeg1
-
Rdeg2
IQboost
IBias
( Q Tuning )
( Gain Tuning )
M4
E. Sanchez-Sinencio
M7
M3
- 86 -
M8
J. Silva-Martinez
43
A CMOS Programmable Bandpass
Filter
• The peak gain programmability through the input Gm
stage.
H ( jω o ) ≅
Gm ( jω o )
= Gm ( jω o ) Q ω o L
Gloss − G
• Increasing Q also increases the peak gain.
• If ωοand Q are fixed, the peak gain can be modified
through Gm.
E. Sanchez-Sinencio
- 87 -
J. Silva-Martinez
The Test Setup
RFi n
Balun
C dcb3
C dcb1
Rg
Bias
Test
Chip
Rg
Balun
RFout
R
Vdd
R
Cdcb2
Cdcb4
• The measurements were performed on chips enclosed in TQFP44.
• All the measurement results to be presented except the power consumption
are of the entire combination of the filter, output buffer and external passive circuitry providing
DC bias and impedance matching.
E. Sanchez-Sinencio
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J. Silva-Martinez
44
30MHz
Measured Q-Tuning
More than 3
octaves at
fo=2.16GHz
5dB/div
Q~170
Q~20
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J. Silva-Martinez
Measured Frequency Tuning
13% around
2.1GHz with
Q~100
E. Sanchez-Sinencio
2.19GHz
1.93GHz
- 90 -
J. Silva-Martinez
45
Measured Peak Gain Tuning
Providing gain at the
ωο of an image-reject
filter is useful in a
receiver front-end
after the LNA, to
relax the NF spec of
the mixer.
Around
2 octaves with
fo=2.12GHz
and Q=40
E. Sanchez-Sinencio
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J. Silva-Martinez
2nd approach
Vo+
Vi+
V i-
+
Gin_+
_
ω0 ≅
L
+
Gm_+
_
C
RL
Vo-
Q≅
1
1
1− 2
Q0
LC
Q0
1
1− 2
1 − (Gm / Gloss )
Q0
Gloss ≅ RL (ω o C ) 2
☺ Replace off-chip filters
☺ Eliminate need of impedance matching
☺ Reduce power, area, and cost
Integrated spiral inductors are lossy
Positive feedback is needed for Q-enhancement
E. Sanchez-Sinencio
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J. Silva-Martinez
46
Dual Resonator Bandpass Filter
Vin
V2+
+
+
Gin _
Vin
Transformer
k
V 1+
+
-
C1
I1
R1
L1 L2
R2
I2
C2
_
V 2-
V1-
R = R1 = R2 = K 2Q L / C
❏ Two magnetically coupled resonators
❏ 4th order filter
❏ ω0 is fixed by the LC product
❏ Coupling coefficient k is used to tune Q
E. Sanchez-Sinencio
LC = (1 / ω 02 )
k = K1 / Q
- 93 -
J. Silva-Martinez
Transformer Models
Transformer
k
I1
L1 L2
M = k L1 L2
I2
I1
sMI2
❏
❏
❏
❏
❏
L1 L2
+
-
I2
I1
L1
kI2 kI1
L2
I2
+
- sMI1
Transformer can be replaced by induced currents
Due to losses, induced currents are not in phase
Severe passband ripples
Coupling neutralization to maintain a flatband response
Emulate the transformer action by electric coupling
E. Sanchez-Sinencio
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J. Silva-Martinez
47
Emulation of Magnetic Coupling
k=RsGk
Transformer
V1
Iin
L
R
V2
RL
C
L
I2
I1
GK
RL
GK
RS
R
C
RS
❏ k=GkRs(≅0.01)
❏ Provide possibility of BW tuning while maintain
flatband
❏ Placing inductors apart to diminish magnetic coupling
E. Sanchez-Sinencio
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J. Silva-Martinez
Circuit Implementation
VDD
VDD
V2-
V2+
RS
M2
V2+
I1-
RL
Vf
L
C
V1-
I2+
L
RL
RL
V1-
V2+
I2-
C
C
Vf
Vin-
Min
M1
Min
Vin+
VQ
M1
E. Sanchez-Sinencio
RL
V2-
M1
IQ
VQ
G
IDC
L
Vf
M1
IQ
RS
VK
IK
C
Gk
M2
M2
VK
IK
V1+
V1+
RS
RS
M2
I1+
L
Gk
G
VDC
k=RSGk
- 96 -
J. Silva-Martinez
48
Chip Micrograph
X=500µm, Y= 300µm
E. Sanchez-Sinencio
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J. Silva-Martinez
Measurement Results
Bandwidth tuning
BW={70MHz,100MHz}
Frequency tuning
f0={1.77GHz,1.86GHz}
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J. Silva-Martinez
49
Measurement Results
Two Tone intermodulation distortion -34dBm each
E. Sanchez-Sinencio
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E. Sanchez-Sinencio
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J. Silva-Martinez
J. Silva-Martinez
50
Need for Automatic Tuning
• Process variations can change fo and Q by at least
20%
• Parameters also change with temperature and
time(aging)
• Automatic tunining is a critical issue for the optimal
performance of continuous-time circuits.
E. Sanchez-Sinencio
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J. Silva-Martinez
Methods of tuning
•
•
•
•
•
•
Master-Slave
Based on trigonometric properties
Based on filter phase information
Pre-tuning
Burst tuning
Switching techniques
E. Sanchez-Sinencio
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J. Silva-Martinez
51
Automatic Tuning Based on Power Comparison
CL
•
•
OTA
VDD
( )2
•
-
CL
Tune
Voltage
vin
iout
•
v1
+
( )2
•
vo =
2
v0 =
u
∫ vin dt = ⎜⎜ ⎟⎟ V cos(2πf r t )
f
CL
⎝ r⎠
2
V ⎛ fu
⎜
2 ⎜⎝ f r
⎞
⎟
⎟
⎠
2
−
1 ⎛ fu
⎜
2 ⎜⎝ f r
M M1
External
Capacitor
⎛f ⎞
Gm
v2
2
v0 =
v1
M M2 M M1
M M2
VSS
V
2
1
−
2
2
2
V cos(4πf r t )
2
⎞ 2
⎟ V cos(4πf r t )
⎟
⎠
E. Sanchez-Sinencio
DC offsets are quite critical!!
- 103 -
J. Silva-Martinez
4th-Order Equiripple Linear Phase Filter
BQ1
☛ Two biquads Gm-C filter;
C1
C1
Vi+
☛ C1 & C2 are total
capacitance at node A,B,
and C, D;
Gm
A
Gm
GmQ1
C1
C1
CMFF/BIAS
☛ One CM control per node;
CMFB/CMFF/BIAS
BQ2
C2
C2
☛ Node A&C--Low
impedance node:
CMFF/Bias;
Vo+
D
Gm
Gm
GmQ2
Gm
C
VoC2
☛ Node B&D-CMFB/CMFF/Bias;
E. Sanchez-Sinencio
Gm
B
Vi-
CMFB/CMFF/BIAS
- 104 -
C2
CMFF/BIAS
J. Silva-Martinez
52
Microphotograph of the chip
LowPass Filter
Automatic
Tuning
CMOS 0.35 µm technology
E. Sanchez-Sinencio
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J. Silva-Martinez
Experimental Results: Frequency
Response
Filter’s Magnitude Response
(BW=150MHz)
E. Sanchez-Sinencio
Filter’s Phase Response (BW=150MHz)
- 106 -
J. Silva-Martinez
53
Experimental Results: Frequency
Response
Filter’s Group delay Response (BW=150MHz)
E. Sanchez-Sinencio
Filter’s Magnitude Response
with automatic frequency tuning
- 107 -
J. Silva-Martinez
Main Filter (Slave)
Output
Input
fo- voltage
control
Frequency
Control
Q- voltage
control
Master
Filter
QControl
Reference Signal
E. Sanchez-Sinencio
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J. Silva-Martinez
54
Frequency Tuning
Phased-Locked Loop (PLL)
•
•
•
•
Most widely used scheme
Accurate (less than 1% error is reported)
Square wave input reference
Only Phase - Frequency Detector, and LPF are
the additional components
• It may take a large area overhead
VCF, VCO, Single OTA, Peak detect, adaptive….
E. Sanchez-Sinencio
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J. Silva-Martinez
Q Tuning Schemes
Based on an envelope detector and a
switched- capacitor integrator. It yields an
accuracy of about 30%
Modified LMS
• Q-accurate of about 1%
• It does not use envelope detector
• Square wave input, any periodic function is
sufficient
• Independent of frequency tuning
E. Sanchez-Sinencio
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J. Silva-Martinez
55
Adaptive LMS Algorithm:
Introduction
• Called Adaptive “Least-Mean-Squares”
Algorithm because it learns by minimizing
the mean-square error (MSE) between a
desired response and the actual response
of a system
• Minimizes error by updating system
coefficients through a feedback loop
E. Sanchez-Sinencio
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J. Silva-Martinez
Adaptive LMS Algorithm:
Theory
• Using the steepest descent algorithm to
minimize the MSE we obtain:
• W(t) = k[d(t) - y(t)]G(t) = k[e(t)]G(t)
– W(t) = tuning signal
– d(t) = desired system output
– y(t) = actual system output
– G(t) = tuning gradient (partial derivative of
y(t) with respect to W(t))
– k = adaptation constant
E. Sanchez-Sinencio
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J. Silva-Martinez
56
LMS Algorithm: Block Diagram
(Linear System)
d(t)
X(t)
+
y(t)
Tunable
Circuit
+
-
e(t)=error signal
W(t)
W(t)
1/s
G(t)=X(t)
E. Sanchez-Sinencio
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J. Silva-Martinez
f
BP Filter
VCO
Q
Comparator
Reference Clock
Phase
Detector
LP Filter
f
1/QD
• Three Filters are needed
• An accurate attenuation
1/QD block is required
• Reference signal does not
need to be a pure sinusoid
BP Filter
Q
f
Integrator
BP Filter
Stevenson, J.M.; Sanchez-Sinencio, E “An accurate quality factor tuning scheme for IF and
Q
high-Q continuous-time filters”. IEEE Journal of Solid-State Circuits, Volume: 33
No.12 , Dec. 1998 , Page(s): 1970 -1978
E. Sanchez-Sinencio
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J. Silva-Martinez
57
An enhanced Q-tuning scheme
Input reference
1/Q
BP Filter
Integrator
New implementation of modified-LMS Q-tuning scheme. Note that the
LMS has been implemented in a different way yielding a structure
with less offset voltages. See reference for more details.
E. Sanchez-Sinencio
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J. Silva-Martinez
The enhanced tuning scheme
f
1/Q
BP Filter
Q
Integrator
Comparator
Phase
Detector
LP Filter
Reference Clock
f
BP Filter
E. Sanchez-Sinencio
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Q
J. Silva-Martinez
58
Improvements over the previous
Tuning scheme comparison
• Area overhead decreased
(Previous scheme => 2 extra filters
New scheme => 1 extra filter )
• Eases the matching restrictions
(Previous tuning scheme => match 3 filters
New tuning scheme => match 2 filters )
• Improves accuracy of tuning
(New tuning scheme is more tolerant to offsets than the previous one)
The Q-tuning loop speed can be equal to the f0-tuning loop for optimal
E. Sanchez-Sinencio
- 117 J. Silva-Martinez
performance
Simulated results for tuning
scheme
f
Frequency tuning voltage
1/Q
BP Filter
Q
Integrator
Schmitt Trigger
XOR
Reference Clock
LP Filter
f
BP Filter
Q
Q tuning voltage
E. Sanchez-Sinencio
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J. Silva-Martinez
59
Die Photograph
900um
900um
E. Sanchez-Sinencio
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J. Silva-Martinez
Experimental Q tuning range
results
•
Qs of 16, 5 and 40 at 80,95- and
120 - 110 MHz
E. Sanchez-Sinencio
J. Silva-Martinez
60
DM-CM response of the filter
•
CMRR is more than 40dB in- 121
the- band of interest
E. Sanchez-Sinencio
J. Silva-Martinez
Supply response of the filter
•
PSRR- is more than 40dB in- 122
the- band of interest
E. Sanchez-Sinencio
J. Silva-Martinez
61
Noise response of the filter
•
Total integrated noise power
at -the output= -60dBm
- 123
E. Sanchez-Sinencio
J. Silva-Martinez
Two-tone inter-modulation test
E. Sanchez-Sinencio
IM3 of < -40dB when the input signal is 44.6mV
- 124 -
J. Silva-Martinez
62
Filter response for four different
ICs
•
The tuning works!
E. Sanchez-Sinencio
- 125 -
J. Silva-Martinez
☞ Efficient solutions with SNDR> 70 dB for 1Vpk-pk are
needed for wireline applications
¸
¸
¸
¸
frequency range 10 MHz - 50 MHz
Noise density < -148 dBm
IM3 ~ -65 dB A 1 Vpk-pk
Accuracy ~ 1-2 %
☞ Solutions for next generation of read channels
¹
¹
¹
¹
Frequency range 200 MHz - 800 MHz
Gain boosting ~ 20 dB
Accuracy ~ 5 %
Very low power and small area
☞ RF Filters
¹ Small noise figure
¹ High-Q solutions
¹ Precision better than 1 % (efficient automatic tuning circuitry)
E. Sanchez-Sinencio
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J. Silva-Martinez
63
E. Sanchez-Sinencio
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J. Silva-Martinez
References
[1] C.F. Wheatley and H.A. Wittlinger,” OTA obsoletes OP AMP”, P. Nat. Econ. Conf.
pp. 152-157, Dec. 1969.
[2] M. Bialko and R.W. Newcomb. “ Generation of all finite linear circuits using Integrated DVCCS,” IEEE Trans. on Circuit Theory, vol CT-18, pp.733-736, Nov. 1971.
[3] S. Franco,” Use Transconductance Amplifier to make Programmable Active Filters,”
Electronic Design, vol 21, pp. 98-101, September 1976.
[4] T. Deliyanis,” Active RC Filters Using Operational Transconductance Amplifier and
Operational Amplifier,” Int. J. of Circuit Theory Appl. Vol 8, pp. 39-54, Jan. 1980.
[5] K.S. Tan, and P. Gray, “Fully-integrated analog filters using bipolar-JFET technology”, IEEE J. Solid-State Circuits, SC-13, (6), pp. 814-821, 1980.
[6] K. Fukahori, “A bipolar voltage-controlled tunable filter”, IEEE J. Solid-State Circuits, SC16, (6), p0p. 729-737, 1981.
[7] H.S. Malvar, “Electronically Controlled Active Filters with Operational Transconductance
Amplifier,” IEEE Trans. Circuit Syst., vol CAS-29, pp. 333-336, May 1982.
[ 8] H. Khorramabadi and P.R. Gray, “ High Frequency CMOS Continuous-Time Filters,” IEEE
J. Solid-State Circuits, Vol. SC-19,no. 6,pp 939-948, December 1984.
[9] A. Nedungadi and T.R. Viswanatan. “ Design of Linear CMOS Transconductance
Elements,” IEEE Trans. on Circuits and Systems, Vol. 31, pp. 891-894, October 1984.
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64
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[10] J.L. Pennock, “CMOS triode transconductor for continuous-time active integrated
filters”, Electron. Lett., 21, pp. 817-818, 1985.
[11] R. L. Geiger and E. Sánchez-Sinencio, “Active Filter Design Using Operational
Transconductance Amplifiers: A tutorial”, IEEE Circuits and Devices Magazine,vol. 1,
pp. 20-32, March 1985.
[12] R.L. Geiger, and E. Sánchez-Sinencio, “Active filter design using operational transconductance amplifiers: a tutorial:, IEEE Circuits Devices Mag., 2, (1). Pp. 20-32,
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[13] A. Nedungadi, and R.L. Geiger, “High frequency voltage controlled continuous-time
low-pass filter using linearized CMOS integrators”, Electron. Lett., 22, pp. 729-731,
1986.
[14] E. Seevinck, and R.F. Wassenaar, “A versatile CMOS linear transconductor/square-law
function circuit”, IEEE J. Solid-State Circuits, 22, pp. 366-377, 1987.
[15] E. Sánchez-Sinencio, R.L. Geiger, and H. Nevarez-Lozano, “Generation of continuoustime two integrator loop OTA filter structures”, IEEE Trans. Circuits Syst., 35, pp. 936946, 1988.
[ 16] F. Krummenacher and N. Joehl. “ A 4 MHZ CMOS Continuous-Time Filter with
On- Chip Automatic Tuning,” IEEE J. Solid-State Circuits, vol. 23, pp. 750-758,
June 1988.
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[17] A. Brambila, G. Espinosa, and E. Sánchez-Sinencio, “Noise optimization in
operational transconductance amplifier filters”, Proceedings of IEEE ISCAS 89, Vol.
4, pp. 118-121, 1989.
[18] S.N. Filho, M.C. Schneider, and R.N.G. Robert, “New CMOS OTA for fully integrated continuous-time circuit applications”, Electron. Lett., 25, (24), pp. 1674-1675,
1989.
[19] P.M. VanPeteghem, and R. Song, “Tuning strategies in high-frequency integrated
continuous-time filters”, IEEE Trans. Circuits Syst., 36, (1) pp. 1163-1166, 1990.
[20] K.A. Kozma, D.A. Johns, and A.S. Sedra, “An adaptive tuning circuit for integrated
continuous-time filters”, Proceedings of IEEE ISCAS, pp. 1163-1166, 1990.
[21] J. Silva-Martínez, M.S.J. Steyaert, and W. Sansen, “A large signal very lowdistortion transconductor for high-frequency continuous-time filters”, IEEE J. SolidState Circuits, 26, pp. 946-955, 1991.
[22] J. Silva-Martínez, M. Steyaert, and W. Sansen, “A Novel approach for the automatic
tuning of continuous-time filters”, Proceedings IEEE International Symposium on
Circuits and Systems, pp. 1451-1455, 1991.
[23] G.A. Deveirman, and R.G. Yamasaki, “A 27 MHz programmable bipolar 0.05o
equiripple linear-phase lowpass filter”, Proceedings of IEEE ISSCC-92, pp. 64-65,
1992.
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65
[24] J.E. Kardontchik, “Introduction to the design of transconductanctor-capacitor filters”, (Kluwer
Academic Publishers), Boston, 1992.
[25] J. Ramírez-Angulo, and E. Sánchez-Sinencio, “Programmable BiCMOS transconductor for
capacitor-transconductance filters”, Electron. Lett., 28, pp. 1185-1187, 1992.
[26] W.M. Snelgrove, and A. Shoval, “A balanced 0.9 µm CMOS transconductance-C filter
tunable over the VHF range”, IEEE J. Solid-State Circuits, 27, pp. 314-312, 1992.
[27] J. F. Duque-Carrillo, “Control of the common-mode component in CMOS
continuous-time fully differential signal processing in Analog integrated circuits and signal
processing”, (Kluwer Academic Publishers), pp. 131-140, 1993.
[28] A. Wysynski, “Low-voltage CMOS and BiCMOS triode transconductors and integrators
with gain enhanced linearity and output impedance”, Electron. Lett., 30, (3), pp. 211-212,
1994.
[29] A. Wysynski, and R. Schaumann, “Avoiding common-mode feedback in continuous-time
GmC filters by use of lossy integrators”, Proceedings of IEEE ISCAS 94, pp. 281-284, 1994.
[30] J.-Y. Kim, and R.L. Geiger, “Characterisation of linear MOS active attenuator and amplifier”,
Electron. Lett., 31, pp. 511-513, 1995.
[31] F. Rezzi, A. Baschirotto, and R. Castello, “A 3V 12-55 MHz BiCMOS pseudodifferential continuous-time filter”, IEEE Trans. Circuits Syst. I, Fundam. Theory
Appl., 42, pp. 896-903, 1995.
[32] Hosticka, B.J.; Brockherde, W.; Hammerschmidt, D.; Kokozinski, R.;
“Low-voltage CMOS analog circuits“ IEEE Trans. On Circuits and Systems I:
Fundamental Theory and Applications, IEEE Transactions on [see also Circuits and
Systems I: Regular, Vol.: 42 , Issue: 11 , Nov. 1995
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[32] S.L. Smith, and E. Sánchez-Sinencio, “Low voltage integrators for high-frequency
CMOS filters using current mode techniques”, IEEE Trans. Circuits Syst. II, Analog
Digit. Signal Process., 43, pp. 39-48, 1996.
[33] G. Efthivoulidis, L. Toth, and Y.P. Tsividis, “Noise in Gm-C filters”, IEEE Trans.
onCircuits Syst. II, Analog Digit, Signal Process., 45, (3), pp. 295-302, 1998.
[34] J.M. Stevenson, and E. Sánchez-Sinencio, “An accurate quality factor tuning scheme
for IF and high-Q continous-time filters”, IEEE J. Solid-State Circuits,
33, pp. 1970- 1978, 1998
[35] T. Itakura, T. Ueno, H. Tanimoto, and T. Arai, “A 2 Vpp linear input-range fully
balanced CMOS transconductor and its application to 2.5V 2.5 MHz Gm-C LPF”,
Proceedings of IEEE CICC, pp. 509-512, 1999.
[36} S. Solis-Bustos, J. Silva-Martínez, F. maloberti, and E. Sánchez-Sinencio, “A
60dB Dynamic Range CMOS Sixth-Order 2.4HZ Low-Power Filter for Medical
Applications,” IEEE Trans. on Circuits and Systems-II, Vol 47, No. 12, pp. 13911398, December 2000.
[37] A. Veeravalli, E. Sánchez-Sinencio, and J. Silva-Martínez, “Transconductance
amplifier structures with very small transconductances: A comparative design
approach”, IEEE J. Solid-State Circuits, Vol. 37, No. 6, pp. 530-532, May 23
2002.
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J. Silva-Martinez
66
[38] B. Provost and E. Sánchez-Sinencio, “On-chip ramp generators for
mixed-signal BIST and ADC Self-Test”, accepted IEEE J. Solid-State
Circuits.
[39] P. Kallam, E. Sánchez-Sinencio, and A.I. Karesilayan, “An enhanced
adaptive Q-tuning scheme for a 100 MHz fully-symmetric OTA-Based
Filter”, accepted IEEE J. Solid-State Circuits.
[40] F. Dülger, E. Sánchez-Sinencio, and J. Silva-Martínez, “A 1.3V 5mw,
fully-integrated tunable bandpass filter at 2.1GHz in 0.35µm CMOS”,
accepted for publication IEEE J. Solid-State Circuits.
[41]A.N. Mohieldin, E. Sánchez-Sinencio, and José Silva-Martínez, “A fully
balanced pseudo differential OTA with common-mode feedforward and
inherent common-mode feedback detector”, accepted for publication
IEEE J. Solid-State Circuits.
[42] Hosticka, B.J.; Brockherde, W.; Hammerschmidt, D.; Kokozinski, R.;
“Low-voltage CMOS analog circuits“ IEEE Trans. On Circuits and
Systems I: Fundamental Theory and Applications, Vol.: 42 , Issue: 11,
Nov. 1995
E. Sanchez-Sinencio
- 133 -
J. Silva-Martinez
67
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