• Lecture 12: Flip-flops
ECEN 1400 Introduction to Analog and Digital Electronics
Lecture 12
The flip-flop
•  Set/reset flip-flop
•  The 555 timer
Robert R. McLeod, University of Colorado
http://www.electronicdesignworks.com/digital_electronics/
flip_flops/flip_flops.htm
127
• Lecture 12: Flip-flops
ECEN 1400 Introduction to Analog and Digital Electronics
Making a clock “tick”
Harmonic oscillator version
1-bit Memory
Digitizer
Oscillator
http://resonanceswavesandfields.blogspot.com/2011/03/pendulum-clock.html
Relaxation oscillator version
1 bit Memory
Charge
Discharge
Threshold
http://www.jlifeinternational.com/Garden/G079.html
Robert R. McLeod, University of Colorado
128
• Lecture 12: Flip-flops
ECEN 1400 Introduction to Analog and Digital Electronics
Set/Reset Flip Flop
Initial state
00 = HOLD Qn = Q
Final state
0
0
0
0
0
1
0
1
0
0
0
1
1
1
1
0
1
1
1
0
0
0
0
1
S R Q Q Qn
0 0 0 1
0
0 0 1 0
1
10 = SET
Qn = 1
S R Q Q Qn
1 0 0 1
1
1 0 1 0
1
01 = RESET Qn = 0
S R Q Q Qn
0 1 0 1
0
0 1 1 0
0
11 = FORBIDDEN
S R Q Q Qn
0 1 0 1
0
0 1 1 0
1
•  One of each of the two initial states is illustrated
•  The state is stable once switched
•  The R,S=1,1 input is not used because it “races”
or oscillates and is thus unstable
Robert R. McLeod, University of Colorado
http://en.wikipedia.org/wiki/Flip-flop_electronics
129
• Lecture 12: Flip-flops
ECEN 1400 Introduction to Analog and Digital Electronics
555 Oscillator/timer
External wiring
Internals
Divide VCC in thirds
Discharge
Threshold
Out
VC1
Trigger
S = VC1 > 23 VCC
VC1
R = VC1 < 13 VCC
Charge/discharge
oscillator
Digitizer
1-bit Memory
Performance
THigh = ln (2 )(RA + RB )C1 = 139 µs
VCC
TLow = ln (2 )RBC1 = 69 µs
Vout
SET
S R Q
1 0 0
2/3 VCC
VC1
HOLD
S R Q
0 0
1/3 VCC
RESET
0
S R Q
0 1 1
Time (s)
Robert R. McLeod, University of Colorado
http://www.ecircuitcenter.com/Circuits/555_Timer1/555_timer1.htm
130
• Lecture 12: Flip-flops
ECEN 1400 Introduction to Analog and Digital Electronics
Quiz 12.1
A
X
B
Q: Which of the following
combinations of inputs A,B yields the
given output X?
A:
B:
C:
D:
E:
(A=0, B=1) gives X=1
(A=1, B=0) gives X=1
(A=1, B=1) gives X=0
(A=0, B=0) gives X=1
(A=0, B=0) gives X=0
0
0
Robert R. McLeod, University of Colorado
0
1
1
131
• Lecture 12: Flip-flops
ECEN 1400 Introduction to Analog and Digital Electronics
Quiz 12.2
A
B
X
X
http://en.wikipedia.org/wiki/Flip-flop_%28electronics%29
Q: In the figure, the bars above the inputs
mean they are first inverted, then applied
to the gates. Thus if A=1, the value 0 is
applied to the upper NAND gate. Which
values of (A, B, and X) yield the final state
This is an S/R
Xn?
flip flop where
A: (A=0, B=1, X =1) gives Xn =1 the OR gates
have been
B: (A=0, B=0, X =0) gives Xn =1 replaced with the
DeMorgan
C: (A=1, B=0, X =1) gives Xn =0 equivalent. A =
S, B = R, Q = X.
D: (A=0, B=0, X =1) gives Xn =0 So (SR=01) is a
reset, yielding Qn
E: (A=0, B=1, X =1) gives Xn =0 = 0.
Robert R. McLeod, University of Colorado
132