Question 1
a)
Moore’s Law predict that the number of transistors in IC will doubled in every 12
months while keeping the same price. 80’s onwards, changed to every 18
months.
b)
i) Size or diameter of wafer used in IC production. Normally used wafer sizes
150mm, 200mm and currently 300mm.
ii) Feature size is the minimum geometry or minimum gate length employed in
certain technology node. For e.g, minimum feature size for 0.35um CMOS
technology is 0.35um. Feature size employed is related to photolitography
capability.
The smaller feature size (while wafer size remain), the more dies manufactured.
The larger wafer size (while feature size remain), the more dies manufactured.
Smaller feature size combined with larger wafer size, will produce more dies.
c)
Cost = Wafer cost + processing cost + test/packaging cost
Sales = number of good dies after packaging x sales per chip
i)
100% die yield
Cost = (200 x 1) + (300 x 1) + (die yield x nu of dies per wafer x packaging cost)
Cost = (200) + (300) + (100/100 x 100 dies per wafer x RM10 per dies)
Cost = 200 + 300 + 1000
Cost = RM 1500
Sales = number of good dies x sales per dies
Sales = 100 dies x RM60 per die
Sales = RM6000
Profit = Sales – Cost
Profit = RM6000 – RM 1500
Profit = RM4500
ii)
50% die yield
Cost = (200 x 1) + (300 x 1) + (die yield x nu of dies per wafer x packaging cost)
Cost = (200) + (300) + (50/100 x 100 dies per wafer x RM10 per dies)
Cost = 200 + 300 + 500
Cost = RM 1000
Sales = number of good dies x sales per dies
Sales = 50 dies x RM60 per die
Sales = RM3000
Profit = Sales – Cost
Profit = RM3000 – RM 1000
Profit = RM2000
Question 2
a)
Elemental s/conductor material
i)
ii)
Si
Ge
Compound s/conductor material
i)
ii)
GaAs
SiGe
GaAs, SiGe, SiC, InP
b)
Miller indices
(x,y,z) = (1, 1, ∞)
Cartesian coordinate
Take the reciprocal
= (1/1, 1/1, 1/∞)
Miller Indices
(h,k,l) = (1,1,0)
c) Resistivity is the capability of materials to allow electrons flowing through it.
Electrons only capable of carrying charge when in the conduction band. The more
electrons in the conduction band, the less material’s resistivity. The
amount of electron in the conduction band is determined by the band gap.
d)
i) In intrinsic, electrons and holes are created in pairs. Hence concentrations of
holes and electrons are equal (Mass Action Law, ni = pi). Carrier concentrations
in extrinsic materials depends on the dopant type, carriers are not created in pairs.
ii) Intrinsic material is pure material, extrinsic material is doped with impurities.
e)
When no bias voltage is applied to the gate, no current flow.
When gate is positively biased, positive charge will appear at the gate.
Positive charge at the silicon surface will be expelled from the region.
At certain voltage (Threshold Voltage), electron will be accumulated at silicon surface to
form channel, and allow the electron flow from source to drain.
.\
Question 3
a)
b)
aspect ratio = height / width
=E/D
= 24000 / 12000
=2
sidewall coverage = B /A x 100
= 2000 / 4000
= 50%
bottom coverage = C/A x 100
= 3000 / 4000
= 75%
c)
ARC layer is used to reduce the reflectivity of aluminum during photolithography
process. High reflectance will cause notching problem. TiN is widely used as ARC.
d)
To reduce contact resistance of metal / semiconductor interface. TiSi2, Wsi2 and
CoSi2 are commonly used materials.
e)
i)
ii)
iii)
iv)
v)
vi)
vii)
viii)
ix)
x)
xi)
Sputtering is the most commonly used PVD process for metalization
Involves energetic ion bombardment, which physically dislodge atoms or molecules
from the solid surface and redeposit them on the substrate as thin metal film.
Argon is normally used as sputtering atom.
When power is applied between two electrodes under low pressure, a free electron is
accelerated by the electric field.
When it collides with Ar, another free electron is generated (ionization). Ar
becomespositively charged.
The free electron repeat this process to generate more electrons.
Positively charged Ar ions are accelerated towards a negatively biased cathode,
usually called target. The target plate is normally made from the same metal that to
be deposited.
When these energetic ions hit the target surface, atoms of the target material are
physically removed from the surface by the momentum transfer of the impacting
ions.
Sputtered of atoms leave the target and travel inside vacuum chamber in the form of
metal vapor.
Eventually, some of them reach the wafer surface, adsorb and become so-called
adatoms.
The adatoms will migrate and form nucleation, condensed and form grain. The grain
will continuosly grow until forming a continuous thin film.
Question 4
a)
i) arriving angles of precursors
The larger the arriving angle, more precursor molecules will be adsorbed.
For the precursor with low surface mobility, a thicker film will be deposited at that area.
Poor step coverage can cause undesirable effects such as overhang and void.
Arriving angle can be improved by;
Reducing process pressure (longer MFP)
Tapered openings
ii) precursors surface mobility
Surface mobility is the ability of the precursors to migrate on the surface.
Surface mobility depends on precursor chemistry and substrate temperature.
Precursors chemistry will determine the physics of surface adsorption;
Chemisorption – large chemical bond (low surface mobility) > 2 eV
Physisorption – weak bonding < 0.5 Ev, easy to break, hence high surface mobility
b)
i) Color Chart
After deposition of dielectric thin film, the wafer will have different colors on the surface
depending on film thickness, refractive index and angle of light.
The reflected light from the film surface (light 1) and from the interface of thin film and
substrate (light 2) have the same frequencies but different phases.
There will be interference between the two reflected light rays causing both constructive
and destructive interference at different wavelengths, since the refractive index is a
function of wavelength.
The color seen on the wafer is determined by the constructive interference frequency
that relates to the phase difference of the two reflected lights. The thicker the film, the
larger the phase shift..
Color chart for standard material such as silicon dioxide is widely used fast oxide
thickness determination in research lab.
ii) Spectroreflectometry
Spectroreflectometry measures the reflected light intensity at different wavelengths, and
the thin film thickness can be calculated from the relation of reflected light intensity and
the wavelength of the light.
The photodetector is very sensitive in detecting the spectrum of intensity and
wavelength; therefore spectroreflectometry can obtain much higher resolution and
accuracy for thickness measurement.
The thickness can be calculated from the following equation,
1 / m – 1 / m+1 = 1 / 2nt
m and m+1 are the m-th and the m +1-th constructive interference wavelengths
respectively, n is the film refractive index, and t is the film thickness.
c)
Nonuniformity (%) = Max – Min / (2 x average) x 100 %
Max = 3435
Min = 3200
Average = 3294
Nonuniformity = 3435 – 3200 / (2 x 3294)
= 235 / 6588
= 3.5 x 10-2
In %
= 3.5 x 10-2 x 100 = 3.5 %