Digital Integrated
Circuits
A Design Perspective
Jan M. Rabaey
Anantha Chandrakasan
Borivoje Nikolic
Introduction
EE141 Integrated
© Digital
Circuits2nd
1
Introduction
What is this book all about?

Introduction to digital integrated circuits.
 CMOS devices and manufacturing technology. CMOS
inverters and gates. Propagation delay, noise margins,
and power dissipation. Sequential circuits. Arithmetic,
interconnect, and memories. Programmable logic
arrays. Design methodologies.

What will you learn?
 Understanding, designing, and optimizing digital
circuits with respect to different quality metrics: cost,
speed, power dissipation, and reliability
EE141 Integrated
© Digital
Circuits2nd
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Introduction
Digital Integrated Circuits
Introduction: Issues in digital design
 Device Physics
 The CMOS inverter
 Combinational logic structures
 Sequential logic gates
 Basic Computer Architecture
 Arithmetic building blocks
 Memories and array structures

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Introduction
Introduction
 Why
is designing digital
ICs different today than
it was before?
 Will it change in future?
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Introduction
The First Computer
The Babbage
Difference Engine
(1832)
25,000 parts
cost: £17,470
= $707,500 (2015 dollars)
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Circuits2nd
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Introduction
ENIAC - The first electronic computer (1946)
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Introduction
The Transistor Revolution
First transistor
Bell Labs, 1948
Shockley, Bradeen
& Brattain
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Introduction
The First Integrated Circuits
Bipolar logic
1960’s
ECL 3-input Gate
Motorola 1966
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Introduction
Intel 4004 Micro-Processor
1971
1000 transistors
1 MHz operation
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Introduction
Intel CORE i7 microprocessor
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Introduction
EE141 Integrated Circuits2nd
© Digital
Introduction
Moore’s Law
In
1965, Gordon Moore noted that the
number of transistors on a chip doubled
every 18 to 24 months.
He made a prediction that semiconductor
technology will double its effectiveness every
18 months
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Circuits2nd
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Introduction
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
LOG2 OF THE NUMBER OF
COMPONENTS PER INTEGRATED FUNCTION
Moore’s Law
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13
12
11
10
9
8
7
6
5
4
3
2
1
0
Electronics, April 19, 1965.
Circuits2nd
Introduction
13
Evolution in Complexity
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Circuits2nd
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Introduction
Transistor Counts
1 Billion
Transistors
K
1,000,000
100,000
10,000
1,000
i486
Pentium® III
Pentium® II
Pentium® Pro
Pentium®
i386
80286
100
8086
10
Source: Intel
1
1975
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1980
Circuits2nd
1985 1990
1995 2000
Courtesy, Intel
2005 2010
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Introduction
Moore’s law in Microprocessors
1000
2X growth in 1.96 years!
Transistors (MT)
100
10
486
1
386
286
0.1
0.01
P6
Pentium® proc
8086
8080
8008
4004
8085
0.001
1970
1980
1990
Year
2000
2010
Transistors on Lead Microprocessors double every 2 years
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Courtesy, Intel
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Introduction
Die Size Growth
Die size (mm)
100
10
8080
8008
4004
1
1970
8086
8085
1980
286
386
P6
Pentium
® proc
486
~7% growth per year
~2X growth in 10 years
1990
Year
2000
2010
Die size grows by 14% to satisfy Moore’s Law
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Introduction
Frequency
Frequency (Mhz)
10000
Doubles every
2 years
1000
100
486
10
8085
1
0.1
1970
8086 286
P6
Pentium ® proc
386
8080
8008
4004
1980
1990
Year
2000
2010
Lead Microprocessors frequency doubles every 2 years
EE141 Integrated
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Circuits2nd
Courtesy, Intel
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Introduction
Power Dissipation
100
Power (Watts)
P6
Pentium ® proc
10
8086 286
1
4004
8008
486
386
8085
8080
0.1
1971
1974
1978
1985
1992
2000
Year
Lead Microprocessors power continues to increase
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Introduction
Power will be a major problem
100000
18KW
5KW
1.5KW
500W
Power (Watts)
10000
1000
Pentium® proc
100
286
486
8086
10
386
8085
8080
8008
1 4004
0.1
1971
1974
1978 1985 1992
Year
2000 2004
2008
Power delivery and dissipation will be prohibitive
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20
Introduction
Power density
Power Density (W/cm2)
10000
Rocket
Nozzle
1000
Nuclear
Reactor
100
8086
10 4004
Hot Plate
P6
8008 8085
Pentium® proc
386
286
486
8080
1
1970
1980
1990
2000
Year
2010
Power density too high to keep junctions at low temp
EE141 Integrated
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Circuits2nd
Courtesy, Intel
21
Introduction
Not Only Microprocessors
Cell
Phone
Small
Signal RF
Power
RF
Power
Management
Analog
Baseband
Digital Baseband
(DSP + MCU)
Digital Cellular Market
(Phones Shipped)
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Introduction
Challenges in Digital Design
 DSM
 1/DSM
“Macroscopic Issues”
“Microscopic Problems”
• Ultra-high speed design
• Interconnect
• Noise, Crosstalk
• Reliability, Manufacturability
• Power Dissipation
• Clock distribution.
• Time-to-Market
• Millions of Gates
• High-Level Abstractions
• Reuse & IP: Portability
• Predictability
• etc.
Everything Looks a Little Different
…and There’s a Lot of Them!
?
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Introduction
(M)
Productivity Trends
10,000
10,000,000
100,000
100,000,000
Logic Tr./Chip
Tr./Staff Month.
10,000
10,000,000
100
100,000
Productivity
(K) Trans./Staff - Mo.
Complexity
Logic Transistor per Chip
1,000
1,000,000
1,000
1,000,000
58%/Yr. compounded
Complexity growth rate
10,00010
100
100,000
1,0001
10
10,000
x
0.1
100
x x
0.01
10
xx
x
x
1
1,000
21%/Yr. compound
Productivity growth rate
x
0.1
100
0.01
10
2009
2007
2005
2003
2001
1999
1997
1995
1993
1991
1989
1987
1985
1983
1981
0.001
1
Source: Sematech
Complexity outpaces design productivity
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Courtesy, ITRS Roadmap
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Introduction
Why Scaling?
Technology shrinks by 0.7/generation
 With every generation can integrate 2x more
functions per chip; chip cost does not increase
significantly
 Cost of a function decreases by 2x
 But …

 How to design chips with more and more functions?
 Design engineering population does not double every two
years…

Hence, a need for more efficient design methods
 Exploit different levels of abstraction
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© Digital
Circuits2nd
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Introduction
Design Abstraction Levels
SYSTEM
MODULE
+
GATE
CIRCUIT
DEVICE
G
S
n+
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n+
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Introduction
Design Metrics
 How
to evaluate performance of a digital
circuit (gate, block, …)?






Cost ~ Technology, size
Reliability ~ Design approach, power supply
Scalability
Speed (delay, operating frequency)
Power dissipation
Energy to perform a function
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Introduction
Cost of Integrated Circuits

NRE (non-recurrent engineering) costs
 design time and effort, mask generation
 one-time cost factor

Recurrent costs
 silicon processing, packaging, test
 proportional to volume
 proportional to chip area
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Introduction
NRE Cost is Increasing
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Introduction
Die Cost
Single die
Wafer
Going up to 12” (30cm)
From http://www.amd.com
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Introduction
Cost per Transistor
cost:
¢-per-transistor
1
0.1
Fabrication capital cost per transistor (Moore’s law)
0.01
0.001
0.0001
0.00001
0.000001
0.0000001
1982
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Circuits2nd
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1991
1994
1997
2000
2003
2006
2009
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2012
Introduction
Yield
No. of good chips per wafer
Y
100%
Total number of chips per wafer
Wafer cost
Die cost 
Dies per wafer  Die yield
  wafer diameter/2 2   wafer diameter
Dies per wafer 

die area
2  die area
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Introduction
Defects
 defects per unit area  die area 
die yield  1 





 is approximately 3
die cost  f (die area) 4
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Circuits2nd
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Introduction
Reliability―
Noise in Digital Integrated Circuits
v (t)
V DD
i(t)
Inductive coupling
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Capacitive coupling
Power and ground
noise
34
Introduction
DC Operation
Voltage Transfer Characteristic
V(y)
V
VOH = f(VOL)
VOL = f(VOH)
VM = f(VM)
f
OH
V(y)=V(x)
VM Switching Threshold
V OL
V OL
V
OH
V(x)
Nominal Voltage Levels
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Introduction
Regenerative Property
v0
v1
v2
v3
v4
v5
v6
A chain of inverters
Simulated response
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Introduction
Fan-in and Fan-out
N
Fan-out N
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Fan-in M
42
Introduction
The Ideal Gate
V out
Ri = 
Ro = 0
Fanout = 
NMH = NML = VDD/2
g=
V in
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Introduction
An Old-time Inverter
5.0
4.0
NM L
3.0
(V)
2.0
out
V
VM
NM H
1.0
0.0
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1.0
2.0
3.0
V in (V)
4.0
5.0
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Introduction
Delay Definitions
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Introduction
Power Dissipation
Instantaneous power:
p(t) = v(t)i(t) = Vsupplyi(t)
Peak power:
Ppeak = Vsupplyipeak
Average power:
Vsupply t T
1 t T
Pave  
p(t )dt 
isupply t dt

t
T t
T
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Introduction
Energy and Energy-Delay
Power-Delay Product (PDP) =
E = Energy per operation = Pav  tp
Energy-Delay Product (EDP) =
quality metric of gate = E  tp
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Introduction
Summary
Digital integrated circuits have come a long way
and still have quite some potential left for the
coming decades
 Some interesting challenges ahead

 Getting a clear perspective on the challenges and
potential solutions is the purpose of this book

Understanding the design metrics that govern
digital design is crucial
 Cost, reliability, speed, power and energy dissipation
EE141 Integrated
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Circuits2nd
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Introduction