Kingdom of Saudi Arabia
Ministry of Higher Education
Majmaah University
College of Engineering
Electrical Engineering Department
Exam Information
Course code:
EE415
Course Title:
Instructor:
Eng. Hussam habibeh
Section number:
Exam date:
Exam time:
From:
8:00 Am
Number of pages:
3
Total score:
VLSI
13/11/2014
To:
9:45 Am
25 points
Student’s Information
Name:
ID:
Exam Instructions:
 Read the questions carefully and several times. Writing clearly will make it possible to assess your
answers correctly.
 Any form of cheating, intention to cheating, or disruption of the exam will subject you to a disciplinary
action as specified by the university’s regulations.
 Carrying or using the mobile phone during the exam is not allowed. Using the phone during the exam
will carry a disciplinary action.
 The calculator is only permitted by the exam supervisor.
 No student can leave the exam room during the first half hour of the exam. Any student coming after
the first half hour of the exam will not be permitted to enter the exam.
 A student leaving the exam, even for legitimate reasons, may not be given a makeup exam.
Points Earned:
Question
1
2
3
4
Total
Score
Dear student, we encourage you to answer the exam the best you can and we wish you all success.
Q1-Answer the following questions (7 Mark )
1-What are the VLSI design metrics?
2- If a pond lily doubles every and it takes 30 days to completely cover a pond, on what day will the pond be
1/4 covered?
3-Doping with boron will produces faster p-type transistors
3
4-In general increasing the number of atoms in cm into silicon will increase the
Resistivity
5-The reverse bias decreases the potential drop across the junction. As a result, the magnitude of the electric
field increases and the width of the depletion region widens
6-According to Moore’s Law, how much does 2λ scale by every ~2 years?
Q2(4 Marks) 1- Sketch a static CMOS gate computing
2-Design a 4 input MUX from 2 input MUX
Q3(3 Mark) In saturation mode where (V > V and V ≥ V -V ) Prof that drain voltage no longer increases
the Ids current
gs
t
ds
gs
t
Q4(7Marks) Draw neatly and mention the IC fabrication steps of the following :