HW/SW Codesign of
Embedded Systems
Winter-Spring 2001
Computer Engineering Dept.
Sharif University of Technology
Maziar Gudarzi
What will be covered
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Introduction to Embedded Systems
HW/SW Codesign Flow
Review and Comparison of System
Specification Languages
HW Design Using SystemC
System Design Using C++/SystemC
Co-synthesis Algorithms
Brief Introduction to Other Topics in Codesign
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SoC, Component-based Design, Platform-based
Design, ASIPs , Retargettable Compilers
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Course Grading
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Exams
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Quizzes
Final exam
Homework
Project
Paper presentation (optional-additional
grade)
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What you should do
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Homework
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HW design (VHDL/Verilog, SystemC)
System design (C++/SystemC)
Algorithm Implementation
Read and summarize selected papers
Project
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Getting familiar with one of the academic codesign
tools + Implementation of a typical system on it
Other topics (after instructor approval)
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What you should do (cont.)
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For project:
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Phase zero: Select your partner(s)
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Submit list of your group members (2-3 per group)
Phase one
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Collect relating tools, papers, any other references
Submit a brief (2-3 pages) document containing
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Winter-Spring 2001
List of your collected material
Your plan for next phases
Role of each person
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What you should do (cont.)
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Phase two
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Study the references
Acquire hands-on experience with the tool
Implement a simple example of your choice
Prepare presentations of what you’ve learned
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Oral presentation using PowerPoint (15 min.) and present it
in class
Written document. Actually, one part of your final paper.
Phase three
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Implement and optimize the System-Under-Design
Report achieved results in a paper-like report, containing:
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Introduction to the methodology behind the tool (Phase 2)
Brief review of the SUD
Achieved implementation results
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Let’s be JIT (Just In-Time)
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For project:
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In 1st phase and written part of 2nd phase
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In oral presentation of 2nd phase
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5% penalty per day for being late
No late presentation is possible.
In final report
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No late submission is accepted.
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Let’s be JIT (Just In-Time)
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For homework
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5% penalty per day for being late
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8
Laboratory hours
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More than 3 hours per week is required.
Currently reserved hours:
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Saturdays
Mondays
Wednesdays
7:30-10:30
12:00-14:30
7:30-10:30
TAs
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M. Hashem-pour hashempo@yahoo.com
Sh. Sharifi
shervin0@yahoo.com
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Tools to work with
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HW design, synthesis, and simulate tools
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Renoir, ModelSim, LeonardoSpectrum
C++Builder 5.0 (for SystemC)
System design
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C++Builder 5.0
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Important dates
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Final exam
Project
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Group Members List
Resource Collection Report
Tool Familiarization Report
Final System Implementation Report
Homework
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References
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Text book:
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J. Staunstrup, W. Wolf, "Hardware/Software Codesign:
Principles and Practice", Kluwer Academic Publishers,
1997.
Other references:
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W. Wolf, “Computers as Components: Principles of
Embedded Computing System Design”, Morgan
Kaufman Publishers, 2000.
G. DeMicheli, "Hardware/Software Codesign", Kluwer
Academic Publishers, 1996.
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References (cont.)
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S. Kumar, S. Klumar, “The Codesign of Embedded
Systems: A Unified Hardware/Software Representation”,
Kluwer Academic Publishers, 1995.
H. Chang, et al, “Surviving SoC Revolution”, Kluwer
Academic Publishers, 1999.
F. Balarin et al, "Hardware/Software Codesign: The
POLIS Approach", Kluwer Academic Publishers, 1997.
Papers
from
IEEE/ACM
Conferences, and Workshops
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sponsored
journals,
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Very Important Notes
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Honor code
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Devise a plan for your project
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200% penalty for both copier and copygiver.
Very strictly follow your plan
NO LATE ORAL PRESENTATION/FINAL
REPORT WILL BE ACCEPTABLE.
NO EXCEPTION.
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