Lecture 19 - Computer Arithmetic
March 30, 2004
Sukumar Ghosh
Spring 2006
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Carry-ripple Adder
• Each cell:
ri = ai XOR bi XOR cin
cout = aicin + aibi + bicin = cin(ai + bi) + aibi
• 4-bit adder:
“Full adder cell”
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Adders (cont.)
Ripple Adder
c7
c6
c5
c4
c3
c2
b0 a0
c0
FA
s7
c1
s6
s0
Ripple adder is inherently slow because, in general
s7 must wait for c7 which must wait for c6 …
T a n, Cost a n
How do we make it faster, perhaps with more cost?
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Carry Select Adder
b7 a7
b6 a6
b5 a5
b4 a4
b3 a3
b2 a2
b1 a1
b0 a0
c0
FA
c8
0
b7 a7
b6 a6
b5 a5
0
1
b4 a4
s3
s2
s1
s0
1
FA
1
0
s7
1
0
s6
1
0
s5
1
0
s4
T = Tripple_adder / 2 + TMUX
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Carry Select Adder
• Extending Carry-select to multiple blocks
b15-b12 a15-a12
b11-b8
a11-a8
b7-b4
a7-a4
b3-b0
4-bit Adder
cout
1
0
4-bit Adder
1
0
4-bit
Adder
1 0
1 0
1 0
1 0
4-bit Adder
1
0
4-bit
Adder
1 0
1 0
1 0
a3-a0
1 0
4-bit Adder
4-bit
Adder
1 0
1 0
1 0
1 0
• What is the optimal # of blocks and # of bits/block?
– If # blocks too large delay dominated by total mux delay
– If # blocks too small delay dominated by adder delay
N stages of
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N bits
T a sqrt(N),
Cost 2*ripple + muxes
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cin
Carry Select Adder
b15-b12 a15-a12
b11-b8
a11-a8
b7-b4
a7-a4
b3-b0
4-bit Adder
cout
1
0
4-bit Adder
1
0
4-bit
Adder
1 0
1 0
1 0
1 0
4-bit Adder
1
0
4-bit
Adder
1 0
1 0
1 0
a3-a0
1 0
4-bit Adder
4-bit
Adder
1 0
1 0
1 0
cin
1 0
• Ttotal = sqrt(N) TFA
– assuming TFA = TMUX
• For ripple adder Ttotal = N TFA
• Is sqrt(N) really the optimum?
– From right to left increase size of each block to better match delays
– Ex: 64-bit adder, use block sizes [13 12 11 10 9 8 7]
• How about recursively defined carry select?
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Carry Look-ahead Adders
• For n-bit addition best we can achieve is delay a log(n)
• How do we arrange this? (think trees)
• First, reformulate basic adder stage:
carry
“propagate”
pi = ai  bi
a b ci ci+1 s
000
0
0
001
0
1
010
0
1
011
1
0
100
0
1
101
1
0
110
1
0
111
1
1
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carry “generate”
gi = ai bi
ci+1 = gi + pici
si = pi  ci
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Carry Look-ahead Adders
• Ripple adder using p and g signals:
c0
a0
b0
p0
g0
s 0 = p0  c 0
c1 = g0 + p0c0
s0
a1
b1
p1
g1
s 0 = p1  c 1
c2 = g1 + p1c1
s1
a2
b2
p2
g2
s 2 = p2  c 2
c3 = g2 + p2c2
s2
a3
b3
p3
g3
s 3 = p3  c 3
c4 = g3 + p3c3
s3
c4
• So far, no advantage over ripple adder: T a N
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Carry Look-ahead Adders
• Expand carries:
c0
c1 = g0 + p0 c0
c2 = g1 + p1c1 = g1 + p1g0 + p1p0c0
c3 = g2 + p2c2 = g2 + p2g1 + p1p2g0 + p2p1p0c0
c4 = g3 + p3c3 = g3 + p3g2 + p3p2g1 + . . .
.
.
.
• Why not implement these equations directly to avoid ripple
delay?
– Lots of gates. Redundancies (full tree for each).
– Gate with high # of inputs.
• Let’s reorganize the equations.
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Carry Look-ahead Adders
• “Group” propagate and generate signals:
pi
gi
pi+1
gi+1
pi+k
gi+k
cin
P = pi pi+1 … pi+k
G = gi+k + pi+kgi+k-1 + … + (pi+1pi+2 … pi+k)gi
cout
• P true if the group as a whole propagates a carry to cout
• G true if the group as a whole generates a carry
Cout = G + PCin
• Group P and G can be generated hierarchically.
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c0
a0
b0
a1
b1
a2
b2
Carry Look-ahead Adders
9-bit Example of hierarchically
generated P and G signals:
Pa
a
Ga
P = PaPbPc
c3 = Ga + Pac0
a3
b3
a4
b4
a5
b5
Pb
b
Gb
c6 = Gb + Pbc3
a6
b6
a7
b7
a8
b8
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Pc
G = Gc + PcGb + PbPcGa
c
Gc
c9 = G + Pc0
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c0
c0
p0
s0
p1
s1
p1
s2
p3
s3
p4
s4
p5
s5
p6
s6
p7
s7
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P8=p0p1
g0
c1= g0+p0c0
g1
c2
G8=g1+p1g0
c2=G8+P8c0
P9=p2p3
g2
8-bit Carry Look-ahead
Adder with 2-input gates.
Pc=P8P9
Gc=G9+P9G8
c4=Gc+Pcc0
c3= g2+p2c2
G9=g3+p3g2
g3
Ge=Gd+PdGc
c4
c4
Pa=p4p5
Pe=PcPd
c8=Ge+Pec0
g4
c5= g4+p4c4
g5
Ga=g5+p5g4
Pd=PaPb
c6=Ga+Pac4
c6
Pb=p6p7
Gd=Gb+PbGa
g6
c7= g6+p6c6
g7
Gb=g7+p7g6
c8
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Multiplication
A = a7 a6 a5 a4 a3 a2 a1
B = b7 b6 b5 b4 b3 b2 b1
A x B = 26.b7.A + 25.b7.A + 24.b7.A + 23.b7.A + … + b7.A
Use Carry Save Adders
What is CSA?
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Carry Save Adder
1 1 0 0 1 1
0 1 1 1 0 1
0 1 1 0 0 1
Sum
1 1 0 1 1 1
0 1 1 0 0 1
Carry computed in parallel
1 1 0 1 0 0 1
Ordinary addition
CSA
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