Bus Interface
• ISA (Industry Standard Architecture)
• VESA local bus
– (Video Electronics Standards Association)
• PCI (peripheral component interconnect)
• USB (Universal Serial Bus)
• AGP (Advanced Graphics Port)
Slide Objectives
• Detail pin connections and signal connections
on the ISA, VESA local, and PCI buses.
• Develop simple interfaces to the ISA, VESA local
and PCI buses.
• Program interface places on boards that connect
to the ISA, VESA local, and PCI buses.
• Describe operation of the USB and develop
some short programs that transfer data.
• Explain how the AGP increases the efficiency of
the graphics subsystem.
ISA
• Been around since the start of the IBM PC
(1982)
• Originally an 8-bit standard, now 16-bit. There
was a 32-bit EISA (Extended), gone
• Most PCs have an ISA slot on the mainboard
that can accept either an 8-bit of a 16-bit ISA
printed circuit card.
• 32-bit printer circuit cards are more often PCI, or
in some older 486s, the VESA cards.
ISA / EISA / VESA local
• Clocking speed 8 MHZ too slow!!
• EISA -32-bit modification of ISA (386-PentiumII
had 32-bit data buses)
• Both ISA and EISA run at 8 MHz
– too SLOW!
• VESA and PCI both run at 33 MHz.
• Most common application for EISA bus is as a
disk controller or as a video graphics adapter.
Both apps benefit from the wider bus width
because the data transfer rates for these
devices are high.
VESA local
• Much better approach to 32-bit interfacing
• Common for video and disk interfaces to
the 486 PC
PCI
• PCI -Peripheral Component Interconnect
• Only bus found in the newest Pentium II
systems. (Most systems also have ISA, but as
an interface for older 8-bit and 16-bit interface
cards).
• Has replaced VESA bus.
– Has plug and play(PnP) characteristics
– Has the ability to function with a 64-bit data bus.
• Most often used for interfacing I/O components
– Memory could be interfaced, but would operate only
at a 33MHz rate with Pentium (half the speed of the
redient local bus of the Pentium)
Plug and Play
• PCI interface contains a series of
registers, located in a small memory
device on the PCI interface, that contain
information about the board.
• This memory can provide PnP
characteristics to the ISA bus or any other
bus.
• Information in registers allows computer to
automatically configure the PCI card.
Bus Structure of the Pentium II
Pentium II Processor
Local Bus
66MHz or 100Mhz
AGP Bus
66MHz
440LX or 440BX Chip Set
AGP
Video
Memory
PCI Bus 33MHz or 66 MHz
I/O
Local
Frame
Buffer
PIIX4 Bridge
USB Bus
12Mbps
ISA Bus
8 MHz
I/O
I/O
I/O
PCI Bridge
• Not just buffers between PCI and processor
busses. INTELLIGENT!
• Capable of grouping single data requests into
bursts and then exchanging those bursts with
memory and I/O devices.
• Ability to transfer an unlimited number of bytes in
a single burst – even though processor itself
may be limited to a much smaller size (one
cache line)
– Each PCI device has a latency timer that defines
longest time that device is allowed to control the bus.
PCI Bus Operation
• The data bus lines use a multiplexing
scheme to which connector pins are
multiplexed as address and data pins.
• A PIC transaction takes place between a
master (a device takes control of the
system buses), and a target (a device that
only responds to access requests).
BUS Access
• Read cycle takes three clock pulses
– Output address
– Switch lines from address to data
– Transfer data
• Write cycle
– Address lines do not have to turned around
– Only requires two clock cycles.
Bus Commands
• 16 different commands (commands are
multiplexed on the C/BE3’-C/BE0’) lines and
output during the address phase of each bus
cycle.
–
–
–
–
–
–
–
INTA sequence
I/O read access
I/O write access
Memory read access
Memory write access
Dual addressing cycle (64 bits on 32-bit data bus)
Line memory read access (line of cache (greater than
32 bits)
DMA and interrupts
• Bus Master concept of PCI eliminates
necessity for DMA controller (still used)
• Bus master shuts down system board
buses and communicates with adapters
via bus slots.
PCI Adapters
• Support 3.3V, 5 V and Universal
• Separate slot arrangements for 3.3 and 5v.
Universal adapters can work in either slot
• Each PCI card contains a 256-byte configuration
memory. 64 bytes header (type of card,
manufacturer, revision level, current status of
card, cache line size in 32-byte units, and bus
latency). Remaining bytes are card specific.
Plug and Play
• Configuration memory of units on PCI bus
allow system to scan through devices and
assign each device a unique base address
and interrupt level.
I/O Buses
• SCSI (Small Computer Systems Interface)
– Parallel bus used to peripheral such as hard
drives, tape drives, CD_ROM players.
– 1 to 10MB/sec (PCI around 275MB/sec
transfer rate)
– Intelligent bus
• Accepts high level commands from processor and
then transfer information without host participation.
– Allows parallel processing
SCSI
• Can accomodate 16 devices(SCSI-3)
• Must have host adapter (typically no.7)
• Devices connected in a daisy chain
fashion with terminating plugs connected
to each end of cable.
USB (Universal Serial Bus)
• Current ISA sound cards use internal PC power
supply (generates a large amount of noise).
• USB allows sound cards to have their own
power supply
• Easy to connect
• Access to up to 127 different connections
through a 4 connection serial cable.
• Apps: keyboards, sound cards, simple videoretrieval devices, modems.
• Data transfer rates are 12Mbps full speed, 1.5
Mbps slow speed operation.
Physical Topology
is point-to-point
tree.
Root: primary controller
Hub: allows the connection of multiple USB devices
Endpoint: Source or sink of information within a USB device
A USB device that contains
an ENDPOINT (source/sink
of data) is called a ‘function’.
A USB device can be
just a function, just a
hub, or both a hub and a
function.
Physical connection
is point to point.
Pipes
• When attaching to a hub, host assigns a device
an address.
• Characteristics of connection make up pipe
–
–
–
–
–
–
Speed
Direction
Required bandwidth
Error-handling capability
Transfer type
Maximum packet size
• The endpoint of the device communicates with
the host. (endpoint 0 is for device initialization
and configuration)
Bus Protocol
•
•
•
•
Data transferred in packets
Synchronous serial format
Clock signal is encoded into data pattern
Packets are variable length
Includes:
– Sync field, packet id, Information field, and
CRC
Data transfers
•
•
•
•
Control
Bulk (Text data for printer)
Interrupt (mouse clicks)
Isochronous (voice, music)
USB Connector
• 4 pins
–5v
– -Data
– +Data
– Ground
• Biphase signals
– When +data are at 5.0V, -data are at zero
volts and vice versa
Physical Interface
Differential Signaling, Half duplex
Full Duplex: data transmission can occur in both
directions at the same time
Half Duplex: data transmission can go in only one
direction at a time
USB Data
• Biphase signals generated using a differential
line driver (transceiver) with noise suppression
• Uses NRZI encoding (non-return to zero,
inverted) for transmitting packets.
– Signal level does not change for transmission of logic
1s
– Signal level is inverted for every change to a logic 0
• Uses bit-stuffing for synchronization
– A logic 0 is added after 6 continuous 1s in a row
• Data is transmitted LSB to MSB.
USB Commands
• Stop and Wait Flow control used
– host must wait for ACK, NAK before
transferring additional data packets
• Sync (80h), PID sent first
• 4 Types of Packets (Data, token,
handshaking, and start-of-frame)
• 2 types of CRC used (5-bit and 16-bit)
• ACK, NAK tokens used to coordinate
transfer of packets.
PID Codes
PID
Name
Type
Description
E1h
OUT
Token
Host->function transaction
D2h
ACK
Handshake
Receiver accepts packet
C3h
Data0
Data
Data packet PID even
A5h
SOF
Token
Start of frame
69h
IN
Token
Function -> host transaction
5Ah
NAK
Handshake
Receiver does not receive packet
4Bh
Data1
Data
Data packet PID odd
3Ch
PRE
Special
Host preamble
2Dh
Setup
Token
Setup command
1Eh
Stall
Token
Stalled
Types of Packets on USB
Token
8 bits
7 bits
4 bits
5 bits
PID
ADDR
ENDP
CRC5
Start of Frame Packet
8 bits
PID
11 bits
5 bits
Frame Number
CRC5
Data Packet
8 bits
PID
Handshake Packet
8 bits
PID
1 - 1023 bits
Data
16 bits
CRC16
Accelerated Graphics Port
• Designed specifically to all high-speed
transfers between video card frame buffer
and system memory.
• Operates at bus clock frequency of the
microprocessor.
• Maximum data transfer is 528MBps(2X)
• Max data rate for 4x system is 1GBps
• PCI bus has max data rate of 100MBps