Unit 1 The Evolution of Computers 1. 2. 3. 4. 5. 6. 7. Draw and explain Von Neumann Architecture. Explain speed up techniques for the processor in brief. Explain pipelined processing of instruction in brief. Draw and explain basic organization of desktop machine? Explain BUS interconnection structure. List the elements of BUS design and explain any two of them. Represent following in Single and Double precision format. a. (178.1875)10 b. (-309.1875)10 8. Explain Booth’s Algorithm to multiply following pair of 2’s complement number. a. (15) - multiplicand b. (-6) – multiplier 9. Using Booth’s Multiplication Algorithm multiply following : Multiplicand – (30) Multiplier – (-11) 1. 2. 3. 4. 5. 6. 7. 8. Unit 2 Processor Organization Compare RISC and CISC. Explain following Addressing mode with one example a> Auto Increament b> Auto Dcreament c> Immediate d> Register Explain type of operation. Explain elements of Instruction. Draw and explain Programmer model of 8086. Explain Register Organization of 8086 Draw and explain register organization of 80386 Draw and explain register organization of i7 microprocessor. Unit 3 Data Paths and ALU 1. Perform 1100/11 using restoring algorithm. 2. Perform Division operation on the following number using non-restoring division algorithm. Dividend – 1101 Divisor – 0100 3. Draw the Flowchart for the Floating point addition and explain. 4. Write short note on Sequential ALU. 5. Explain design of ALU using Combinational circuit. 6. Explain instruction execution in four stage pipelining and write advantages for the same. Unit 4 Control Design Organization 1. Draw and explain single bus organization of CPU. 2. Compare single bus and multiple bus organization. 3. Explain sequence of operation needed to perform processor function. a> Fetching word from memory. b> Perform an Arithmetic and logical operation. c> Storing a word in memory. d> Execution of complete instruction. 4. With the help of circuit diagram explain how zin signal is generated. 5. Draw and explain Microprogrammed Control unit. 6. What are the different design methods for hardwired control unit .explain any one. 7. Explain in detail state table design method for hardwired control. 8. Compare Hardwired Control and Microprogrammed Control unit. 9. What is the difference between data hazard and instruction hazard? Give an example of each. Unit 5 Memory and I/O Organization 1. Write short note on Cache memory and explain Cache organizations. 2. Explain Mapping techniques in cache design. 3. Consider a cache consisting of 256 blocks of 16 words each, for a total of 4096 (4 k) words and assume that the main memory is addressable by a 16bit address and it consists of 4 K blocks. How many bits are there in each of TAG, BLOCK/SET and word fields for different mapping techniques? 4. Explain Cache coherency problem in detail. 5. Explain following terms a. Cache Updation policies b. Cache hit and Cache miss. 6. What is virtual memory concept (with advantages of virtual memory) and explain TLB in virtual memory organization. 7. What are different page replacement algorithms? Give details of LRU algorithm. 8. State the write policies used with virtual memory with justification. 9. Compare UMA and NUMA architecture. 10.Compare memory mapped I/O and I/O mapped I/O. 11.Compare programmed I/O and Interrupt driven I/O. 12.With the help of neat diagram explain use of DMA controller in computer system. 13.Write short note on DMA. 14.What is BUS arbitration? Describe the centralized and distributed arbitration. 15. Write short note on a. Daisy chaining b. Polling 16. Explain PCI bus with diagram. 17.Explain briefly the SCSI bus standards. 18.Write note on: USB. Unit 6 Advanced Computer Organization 1. 2. 3. 4. Explain the architecture of NVIDIA GPU. Draw & Explain the block diagram of i7 mobile version. Note on IA64 architecture. Draw & Explain the block diagram of sun ultraSparc T1 multiprocessor.