Radio Frequency (RF) Data Communications
By Danny Ton
Course: CSE 498
Professor: Gaetano Borriello
Overview






Radio Frequency (RF) Introduction
RF Characteristics
Regulations on RF Products
Virtual Wire® RF Monolithics Transceivers
RFM Features
RFM Data radio board
–
–
–
–
I/O interface
Transmitter
Receiver
AGC/Antenna switch
CSE 477 Winter 1999
Introduction
2/44
Overview (cont’d)

Packet protocol board
–
–
–
–

I/O interface
RS232 interface
Protocol microcontroller
CMOS/RS232 level converter
RFM link-layer packet protocol
– Protocol features
– Principles of operation
– Flow control
CSE 477 Winter 1999
Introduction
3/44
Radio Frequency (RF) Intro.

Where RF fits in the frequency spectrum
CSE 477 Winter 1999
Introduction
4/44
Radio Frequency (RF) Intro. (cont’d)

Wireless communication technology
– RF is an alternating current which, if supplied to an antenna, will
give rise to an electromagnetic field that propagates through
space

Cheap and widely used
– Over 40 millions systems manufactured each year utilizing lowpower wireless (RF) technology for data links, telemetry,
control and security

Wide range of applications
– Cordless and cellular telephones, radio and television broadcast
stations, hand-held computer and PDA data links, wireless barcode readers, wireless keyboards for PCs, wireless security
systems, consumer electronic remote control, etc.
CSE 477 Winter 1999
Introduction
5/44
RF Characteristics

Low power
– Typically transmit less than 1mW of power

Good operating range
– Operate over distances of 3 to 30 meters



Supports data rate up to 1-2 Mbps
Penetrates walls
Does not require a direct transmission path (as
opposed to IR)
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Introduction
6/44
Regulations On RF Products


Low-power wireless (RF) systems operate on
shared radio channels and hence are subject to
regulation (by FCC in the US)
Regulation general philosophy: Products do not
significantly interfere with licensed radio systems
– Specify limitations on fundamental power, harmonic and
spurious emission levels, transmitter frequency stability, and
transmission bandwidth

However, once certified to comply with
communication regulations, RF products do not
require a license (“air-time fee”) for operation
CSE 477 Winter 1999
Introduction
7/44
Virtual Wire® RF Monolithics Transceivers


Communication nodes capable of transmitting and
receiving data
Intended for use to implement low-power wireless
communications based on two-way half-duplex
packet transmissions
CSE 477 Winter 1999
Introduction
8/44
RFM Features


Serial interface (RS232)
Power supply
– 4.5 Vdc from three 1.5 V AAA batteries



Operating frequency: 916.50 MHz
Maximum data rate: 22.5 kbps
Operating range: up to 25 meters
– Obtained in an electrically quiet outdoor location
– Greatly influenced by building construction materials and
contents, other radio systems operating in the vicinity, and
noise generated by nearby equipment

Provide link-layer packet protocol
CSE 477 Winter 1999
Introduction
9/44
RFM Modules

Host
Radio module
– RFM data radio board
– Transmit and receive RF signals
MAX 218 IC
CMOS/RS232
RS232
module

– 8-bit ATMEL AT89C2051
microcontroller on the protocol
board
– Implement link-layer packet protocol
Level Converter
Protocol
board
8-bit ATMEL
AT89C2051
microcontroller
Protocol
module

Data radio
board
RF transmitter
and Receiver
Radio
module
RF Signals
CSE 477 Winter 1999
Protocol module
RS232 module
– Maxim MAX218 Dual RS232
transceiver on the protocol board
– Convert to and from 4.5V CMOS and
RS232 levels
– Interface to host
Introduction
10/44
Data Radio Board
CSE 477 Winter 1999
Introduction
11/44
Data Radio Board (cont’d)

Maximum data rate
–

22.5 kbps
Frequency options
– 916.5 MHz

Antenna
– Simple base-loaded monopole
soldered to the pad provided for
the 50 ohm RF input
– Alternatively, a 50-ohm coaxial
cable can be soldered to the RF
input pad and the adjacent
ground, if a remotely located
antenna is used
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Introduction
12/44
Data Radio Board (cont’d)

AGC adjustment
– Data radio boards are adjusted at RFM for an AGC voltage
between 1.75 and 1.80 V on the node between the
potentiometer, R10, and resistor R11 with no RF signal applied
– This setting doesn’t affect the sensitivity level of the receiver

AGC adjustment purpose
– The desired signal must be larger than the undesired signal for
the intelligible information to be obtained from the receiver
– AGC circuit is not to level the desired signal level but, rather,
to prevent the saturation and eventual capture of the receiver’s
demodulator by interfering in-band CW or FM signals (signals
more than 20dB above the receiver sensitivity level)
– Turning the potentiometer counter-clockwise causes AGC
voltage to increase and, thus, engages the gain control at a
lower signal level and vice versa
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Introduction
13/44
Data Radio Board - I/O Interface

Connector P1
– 8-pin connector interface to the protocol board

Pin 1
– Transmitter data input with input impedance of ~18 KΩ
– Can be driven directly by a CMOS gate
– A high level voltage turns the transmitter oscillator on and a
low level turns it off

Pin 2 and Pin 5
– VCC for the transmitter and GND

Pin 3
– PTT line that enable the transmit mode
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Introduction
14/44
Data Radio Board - I/O Interface (cont’d)
– When it is high (2.5 V minimum at 2.0 mA maximum), this line
puts the transmit/receive RF switch in the transmit mode

Pin 4
– Power line to the receiver AGC circuitry: 2.7 - 3.3 V

Pin 6
– Reference voltage output (VRef) from the hybrid receiver used
in the “low battery” detection process on the protocol board

Pin 7
– Power line to the receiver hybrid: 2.7 - 3.3 V

Pin 8
– Data output from the comparator in the receiver hybrid
– CMOS compatible and capable of driving a single CMOS gate
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Introduction
15/44
Data Radio Board - Transmitter


An HX surface mount hybrid device (HX2000)
Pin 1
– Transmitter data input (connected to Pin 1 of connector P1)

Pin 2
– Transmitter VCC power connection
– HX hybrids are specified to draw a maximum peak current of
10 - 11 mA with a VCC of 3 V. Since the transmitter is only
turned on when the data line is high, the average transmitter
current depends on the duty cycle of the incoming data

Pin 3
– Ground
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Introduction
16/44
Data Radio Board - Transmitter (cont’d)

Pin 4
– RF ouput

The RF output power of the HX is nominally 0dBm
with a 50Ω load
– The transmitter power is applied to the antenna port through
the transmit/receive switch Q1

When the PTT line is pulled high, Q1 is turned on
to connect the transmitter to the antenna, Q3 is
turned on to short the receiver input to GND and
Q2 is turned off to disconnect the receiver input
from the antenna during transmission
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Introduction
17/44
Data Radio Board - Receiver


An RX hybrid receiver (RX2056)
Pin 1
– VCC is applied to this pin from Pin 7 of connector P1
– Also connected to a 10 uF bypass capacitor, C5, which keeps the
RX internal comparator switching noise out of the data baseband amplifier circuitry in the RX

Pin 2
– Base-band data output
– Signal at Pin 2 is the demodulated filtered data before it is
applied to the comparator input, on Pin 3
– Output from this Pin is DC coupled to the internal detector
output
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Introduction
18/44
Data Radio Board - Receiver (Cont’d)

Pin 3
– Comparator input
– Output from Pin 2 is connected to this pin by the coupling
capacitor C6

Coupling capacitor C6
– Prevent the change in DC offset of the base-band amplifier
from false triggering the comparator
– Prevent the DC output from the detector, produced by an inband CW or FM interfering signal, from triggering the
comparator while allowing changes in DC level, due to the
desired signal, to pass through to the comparator input
– The value of the coupling capacitor is determined by the
longest pulse width to be encountered in the data stream
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Introduction
19/44
Data Radio Board - Receiver (Cont’d)
– The capacitor must be large enough to prevent the long data
pulses from sagging at the comparator input

Pin 4
– DC GND

Pin 5
– The comparator threshold override pin
– If it is left open, the threshold voltage for comparator is
25mV. This voltage level is very desirable for the lower
frequency, full sensitivity receivers to reduce spurious noise at
the comparator output
– If it is grounded, the threshold voltage is zero volts. This is
desirable for the 916.5 MHz receivers to obtain maximum
sensitivity possible
CSE 477 Winter 1999
Introduction
20/44
Data Radio Board - Receiver (Cont’d)
– To avoid spurious noise on the comparator output of the 916.5
MHz receivers, use a 10 MΩ resistor, R4, from Pin 3 to GND.
This resistor effectively reduces to DC offset on the
comparator output, which is equivalent to using a very low
threshold level

Pin 6
– The reference voltage output of the power supply included in
the custom IC used in the RX
– This pin must be bypassed by a 1 uF capacitor, C4, to avoid
comparator switching noise in the base-band amplifier.

Pin 7
– The comparator output or data output
– The comparator is capable of driving a single CMOS gate input
CSE 477 Winter 1999
Introduction
21/44
Data Radio Board - Receiver (Cont’d)

Pins 8 and 9
– RF grounds

Pin 10
– RF input port of the RX device
– This port is driven from a 50 Ω source
CSE 477 Winter 1999
Introduction
22/44
Data Radio Board - AGC/Antenna Switch

Issue
– The out-of-band interfering signal rejection of the amplifiersequenced receiver architecture is excellent and allows the
receiver to perform in the presence of large interfering signals
without range degradation
– However, this does not take care of in-band interference. The
majority of in-band interference encountered is CW and
primarily comes from unintentional radiators such as clock
harmonics from computers or local oscillators from
superheterodyne receivers

An AGC circuit primarily intended for CW or FM
in-band interfering signals. These signals are of
particular concern in an office environment
CSE 477 Winter 1999
Introduction
23/44
Data Radio Board - AGC/Antenna Switch
(cont’d)



The RX receiver has capacitive coupling between
the base-band amplifier output and the
comparator input
Hence, the DC level generated in the detector and
base-band amplifier by either an FM or a CW
signal is blocked from the comparator input and
only desired signal passes
However, the DC level at which the detector and
its associated base-band amplifier saturate is
limited (approximately -80 dBm for 433.92 MHz,
and -50 dBm for 916.5 MHz)
CSE 477 Winter 1999
Introduction
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Data Radio Board - AGC/Antenna Switch
(cont’d)


The AGC circuit used on the data radio board is to
prevent saturation of the detector and base-band
amplifier by keeping such in-band interfering
signals below the saturation level at the receiver
input
An RF attenuator (particularly transistors Q2 and
Q3) is placed between the antenna and the
receiver input, effectively extends the range over
which the receiver can operate w/o saturation by
40 dB (20 dB for each transistor)
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Introduction
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Data Radio Board - AGC/Antenna Switch
(cont’d)

The RF attenuators Q1, Q2, and Q3 also serve as
the transmit/receive RF switch for the radio
board
– In transmit mode, the PTT line is pulled high, overriding the
AGC circuit by directly biasing the bases of Q1 and Q3 on and
turning the base of Q2 off through R15 and U1B. This connects
the transmitter to the antenna port and disconnects the
receiver from the antenna port
– In receive mode, PTT is low, allowing the receiver to be
connected to the antenna port with its input level controlled by
the AGC circuit only
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Introduction
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Packet Protocol Board
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Introduction
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Packet Protocol Board (cont’d)

Why not connect the data radio board directly to
a computer serial port using an RS232 to CMOS
level converter?
– Error detection limited to byte parity checking: many errors go
undetected
– Greatly reduce the data radio’s range due to very poor DC
balance in the data

The protocol microcontroller provides data-link
protocol
–
–
–
–
error dectection
automatic message retransmission
message routing
link alarms and DC-balanced packet coding
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Introduction
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Packet Protocol Board (cont’d)

Node address programming
– Maximum of 15 nodes addresses, set by placing jumpers on the
double row of pins located between the two IC’s
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Introduction
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Packet Protocol Board (cont’d)

Power supply options
– 4.5 Vdc nominal from three 1.5 V AAA batteries

RS232 interface
– Level conversion from 4.5V CMOS to RS232 levels is provided
by the MAX 218 IC.
– It is possible to remove this IC and jumper socket Pin 7 to 14
and Pin 9 to 12 for direct CMOS operation

LED functions: Three LED indicators are provided
on the protocol board
– RXI indicates RF signals are being received (Diode D5)
– RF RCV indicates a valid RF packet has been received (DiodeD4)
– PC RCV indicates a message has been received from PC (Diode
D3)
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Introduction
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Packet Protocol Board - I/O Interface

Connector J1
– The I/O interface between the protocol and data radio boards
– 8 pins

Pin 1
– Carry the transmit data stream from U2-Pin 7 to the RTX input
on the data radio board

Pin 2
– Provide power to the transmitter hybrid on the radio board

Pin 3
– Provide the transmit enable signal (PTT) from PNP transitor Q2
– The data radio board requires 2 mA at 2.5 V on the PTT input
to enable the transmit mode
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Introduction
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Packet Protocol Board - I/O Interface
(cont’d)

Pin 4
– Provide power to the receiver AGC circuitry


Pin 5 - GND
Pin 6
– The reference voltage input (VREF) from the hybrid receiver to
the protocol board, used in the low battery detection process

Pin 7
– Provide power to the receiver hybrid

Pin 8
– Receiver output signal (RRX) from the data radio board
– FET Q1 provides the required high input impedance buffer
between this signal and the input to U2
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Introduction
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Packet Protocol Board - RS232 Interface

Connector J2
– 9-pin female connector configured to appear as a DCE (modem)
– The protocol board implements software flow control, so only
Pins 2 and 3 carry active signal

Pin 2 (RD or PTX)
– Send data to the host computer

Pin 3 (TD or PRX)
– Receive data from the host computer


Pins 4 and 6 (DTR & DSR) are connected; Pins 1, 7,
and 8 are also connected
Pin 5 - GND
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Introduction
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Packet Protocol Board
Protocol Microcontroller


Implements the link-layer protocol
An 8-bit ATMEL AT89C2051 Microcontroller (U2)
–
–
–
–


Operates from an 22.118 MHz quartz crystal
2 Kbytes of flash PEROM memory and 128 bytes of RAM
Two 16-bit timers
A hardware serial port
The timers and hardware serial port makes it
especially suitable as a link-layer packet controller
The timers, serial port and input interrupts remain
active while the processor is in the power-saving
idle mode, allowing the link-layer protocol to be
implemented on a low average current budget
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Introduction
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Packet Protocol Board
Protocol Microcontroller (cont’d)

Inputs to the microcontroller
–
–
–
–

Outputs from the microcontroller
–
–
–
–
–

Node programming pins ID0 - ID3 (Pins 14, 15, 16, and 17)
The buffered receive data (RRX) on Pin 6
The CMOS-level input from the host computer (Pin 2)
The reference voltage (VREF) input on Pin 13
The transmit data on Pin 7
The data output to the host computer on Pin 3
The transmit enable signal on Pin 19
The RS232-transceiver control on Pin 18
The LED outputs on Pins 8 (RXI), 9 (RF RCV) and 11 (PC RCV)
Diode D2 and capacitor C7 form the power-up
reset circuit for the microcontroller
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Introduction
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Packet Protocol Board
CMOS/RS232 Level Converter




Conversion to and from RS232 and 4.5V CMOS
logic levels is done by a Maxim MAX218 Dual
RS232 Transceiver (U1)
The operation of MAX218 is controlled by the
microcontroller (U2) to minimize average current
consumption
L1, D1, and C5 operate in conjunction with the IC’s
switch-mode power supply to generate +/-6.5 V
for the transmitter and receiver conversions
Pin 3 on the MAX 218
– Controls the switched-mode supply via U2 Pin 18
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Introduction
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Packet Protocol Board
CMOS/RS232 Level Converter (cont’d)



The RS232 serial input signal from J2-Pin 3 is
input on U1-Pin 12 and is converted to a 3V CMOS
level (note inversion) and output on U1-Pin 9
The CMOS serial output signal from U2-Pin 2 is
input on U1-Pin 9 and converted to an RS232
output (note inversion) on U1-Pin 12. This signal is
found on J2-Pin 3
Bypass RS232 conversion for direct CMOS
operation by removing U1 from its socket and
placing one jumper in socket Pins 7 and 14 and a
second jumper in socket Pins 9 and 12
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Introduction
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RFM Link-Layer Packet Protocol


Firmware running on the protocol board
Provide automatic, verified, error-free
transmission of messages between Virtual Wire®
radio nodes
– Radio packet format

Provide link-layer interface between a Virtual
Wire® transceiver and its host processor via
serial connection
– RS232 packet format
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Introduction
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RFM Link-Layer Packet Protocol (cont’d)
Start Symbol
(0x55)

Radio packet format
– To/From:
To/From
Packet number
Data Size
Message Data
•
•
•
•
To (higher 4 bits): receiver node address
From (lower 4 bits): sender node address
0x00: broadcast packet
15 different node addresses available
– Packet number byte: 1-7
– Data size byte:
•
Number of actual data bytes
– Message data
16-bit FCS
•
ASCII or binary, up to 32 bytes
– 16-bit FCS (Frame Check Sequence)
Radio packet
•
•
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16-bit ISO 3309 error detection calculation to
test message integrity
The calculation is based on all bits in the
message following the start symbol
Introduction
39/44
RFM Link-Layer Packet Protocol (cont’d)

– Radio packet format without the
Start symbol and the 16-bit FCS
To/From
Packet number
Data Size
RS232-side packet format

Example of a RS232-side packet
from node 3 to node 2, with one
is the packet number, containing
3 bytes of data
23 01 03 02 1C 03
Message Data
RS232-side packet
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Introduction
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RFM Link-Layer Packet Protocol (cont’d)
To/From

Packet number
0xEn
(n=1to 8)
ACK
To/From
Packet number
0xDD
NAK
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

Automatic packet retransmission until
acknowledgment is received; 8 retries
with semi-random back-off delays (0,
120, 240, or 360 ms)
ACK and NAK alarm messages to host
Operation on both the RS232 side and
the radio side is half-duplex
– The protocol software services one input line
at a time (radio or RS232 receive line)
– Since the protocol does not support
hardware flow control, host software will
have to do some timekeeping to interface to
the protocol software (avoid sending data if
RFM is busy)
Introduction
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Theory of Operation

Operation of RS232 serial connections
– 19.2 kbps
– Eight data bits (byte), one stop bit, and no parity bit

Radio operation
– Transmission rate of 22.5 kbps, using 12-bit dc-balanced symbol
representing the data byte
– Radio receiver is slightly “squelched” when not receiving data,
and will output occasional random positive noise spikes

Messages are sent and received from the RS232
interface in standard asynchronous format via
PTX and PRX
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Introduction
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Theory of Operation (cont’d)

I/O lines on the protocol microcontroller
– RRX - radio receive line (J1-8)
– RTX - radio transmit line (J1-1)
– PTT - radio transmit/receive control line, high on transmit
(J1-3)
– PRX - RS232 receive line (J2-3)
– PTX - RS232 transmit line (J2-2)
– RXI, RF RCV, PC RCV - three LED control lines
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Introduction
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Theory of Operation (cont’d)




The protocol software continually tests the RRX
and the PRX lines searching for a start bit
When the start bit is detected on one of the input
lines (radio or RS232), the software will attempt
to receive a message on that input line
If error is detected, the message will be
discarded and the software will resume testing
the input lines
If a valid message is received on the PRX input
line, the software will format a radio packet from
the message and queue the packet for xmission
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Introduction
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Theory of Operation (cont’d)
Receiver
Node
Sender
Node
Host
#1

#1
ACK on # 1

ACK on # 1
#2
#2
Radio ACK: | 0x55 | RS232 ACK | FCS |
ACK on # 2

ACK on # 2
RS232-side
Packets
Radio
Packets
Normal operation
CSE 477 Winter 1999
Each byte xmitted by the radio is
converted into a 12 bit, dcbalanced symbol for best noise
immunity
The queued packet is xmitted
(RTX line with PTT high), and the
software then looks for a “packet
received” ACK (on the RRX line)
On acknowledgement of the
queued packet, an ACK (less Start
symbol and FCS) is sent to host on
PTX line, and the queued packet is
discarded. The software then
resumes testing the input lines
Introduction
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Theory of Operation (cont’d)
Receiver
Node
Sender
Node
Host
#1

Try 1 on pkt #1
120ms
Try 2 on pkt #1
Random delays
between tries
(Dropped)
Try 8 on pkt #1
NAK on # 1
#1
RS232-side
Packets
Radio
Packets

If an acknowledgement packet is
not received in 120ms, the
packet is then resent after a
randomly selected delay of 0,
120, 240 or 360ms.
If the packed is not
acknowledged after a total of
eight tries, the software will
send a NAK message to host on
the PTX line, discard the queued
packet, and resume testing the
input lines
Link-failure operation
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Introduction
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Theory of Operation (cont’d)


When a start symbol is detected on the RRX line,
the software will attempt to receive and verify a
message by checking for a correct TO/FROM
address, a valid packet sequence number, and a
valid number of data bytes (or “ACK” character),
and a correct FCS calculation
If the message is not valid, it is discarded and
testing the input lines is resumed
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Theory of Operation (cont’d)


If the packet is verified and the “TO” nibble
matches, the TO/FROM address, packet sequence
number, number of data bytes and the data bytes
of the message (i.e a RS232-side packet) are sent
out on the PTX line, and a radio ACK is
transmitted back on the RTX line.
If an acknowledged packet is received a second
time (based on the current value of the message
sequence counter), it is reacked on RTX but not
retransmitted on PTX
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Theory of Operation (cont’d)


The software will accept message packets and
acknowledgement packets in any sesquence
Broadcasting
– The TO/FROM address of 0x00 is treated as a “broadcast”
packet. In this case, a received packet is sent out on the PTX
line if the number of data bytes are in a valid range and the
FCS calculation matches.
– A broadcast packet is not acknowledged by the receiving
node(s)
– In the broadcast mode, the packet is transmitted eight times
to enhance probability or reception.
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Introduction
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Flow Control



The protocol software does not support flow
control
If a start bit is detected on either RRX or PRX,
the software receives and acts on the information
on that input line and doesn’t service the other
input line until it has received and acted on the
data of the first input line
Host application will have to do some timekeeping
to make sure that the RFM is not busy. This is
done by sending just the To/From address byte to
the RFM
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Introduction
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Flow Control (cont’d)



If this byte is echoed back within 50ms, host
application has control of the PRX interrupt
process and can send the rest of the packet in the
following 200ms
Else, it can assume that the RFM is busy on an
RRX interrupt either receiving a packet or tripped
by receiver output noise. The host program should
hold off about 100ms and retry.
An inbound packet can occur at any time, so any
character with the high nibble equal to the local
node address or any 0x00 byte should be
processed to test for a valid message
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Introduction
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Sample Codes
RFSend(Byte ToFrom, Char* Data)
{
FIRST:
SerSend(ToFrom, 1);


SECOND:
begin = TimGetTicks();
do {
end = TimGetTicks();
SerReceiveCheck(&numBytes);
} while(numBytes < 0 && (end-begin/100) < .05);
THIRD:
if(numBytes > 0) {
SerReceive(rcvQueue, numBytes);
if(rcvQueue[0] == ToFrom) {
SerSend(pktNum, 1);
SerSend(StrLen(data), 1);
SerSend(data, StrLen(data));
CSE 477 Winter 1999


Introduction
FIRST:
Send ToFrom byte to RFM
SECOND:
Check to see if anything is
echoed back in 50ms
THIRD:
Check to see if this byte is the
ToFrom byte
If it is, then RFM is ready for
the rest of the packet: packet
number, data size, and actual
data; else, can assume that RFM
is busy.
Note: assume data size is less
than 32 bytes, which is the
maximum number of bytes that a
packet can take
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Sample Codes (cont’d)
FOURTH:
SerReceive(rcvQueue, 3);
switch(rcvQueue[2]) {
case 0xE1:
case 0xE2:
case 0xE3:
case 0xE4:
case 0xE5:
case 0xE6:
case 0xE7:
case 0xE8: if(++pktNum >= 8) pktNum = 1;
return true;
case 0xDD: return false;
}

FOURTH:
Receive the echo-back packet (3
bytes in size)
If the last byte is 0xEn where n =
1 - 8 (the number of retries),
then the packet is the ACK, and
data is successfully sent and
received; Else, if the last byte is
0xDD, it is the NAK, signaling a
link failure
}
}
return false;
}
CSE 477 Winter 1999
Introduction
53/44
Sample Codes (cont’d)
RFReceive(Byte localAddr, Byte* From, Byte* PktNum, Char*

retData)
{
FIRST:
SerReceiveCheck(&numBytes);
if (numBytes > 3) {
SerReceive(rcvQueue, 1);

SECOND:
if ((rcvQueue[0] >> 4) == localAddr) {
SerReceive(rcvQueue+1, 2);
*From = rcvQueue[0] & 0x0F; // Get FROM nibble
*PktNum = rcvQueue[1];
SerReceive(rcvQueue+3, rcvQueue[2]);
StrCopy(retData, rcvQueue+3);
return true;
}
}
return false;
}
CSE 477 Winter 1999
Introduction
FIRST:
Check the serial receive queue
to see whether at least 3
bytes have been received
(To/From, packet number,
packet size)
SECOND:
Get the first byte to see if it
is equal to the local node
address
If it is, get the next 2 bytes:
packet number and packet size,
and then get the rest of the
packet based on the packet
size received;
Else, do nothing
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