National Instruments MIMO/OFDM Prototype
Hardware Description
May 25, 2004
By
Amit Gupta
Antonio Forenza
Robert W. Heath, Jr.
Wireless Networking and Communications Group (WNCG)
Department of Electrical and Computer Engineering
The University of Texas at Austin
1 University Station C0803
Austin, TX 78712-0240 USA
Phone: +1-512-425-1305
Fax: +1-512-471-6512
{amitg, forenza, rheath}@ece.utexas.edu}
Table of Contents
1
HARDWARE OVERVIEW ................................................................................................................ 3
1.1
1.2
2
DESCRIPTION OF THE PXI CHASSIS .......................................................................................... 4
2.1
2.2
2.3
2.4
2.5
3
Transmitter ................................................................................................................................... 5
Receiver ........................................................................................................................................ 5
Device Drivers .............................................................................................................................. 6
Clock Synchronization ................................................................................................................. 6
Data Synchronization ................................................................................................................... 6
HARDWARE LIMITATIONS ........................................................................................................... 7
3.1
3.2
4
PXI Chassis .................................................................................................................................. 3
DC Power Supply ......................................................................................................................... 4
Phase Offset.................................................................................................................................. 7
Not a Real-time System ................................................................................................................ 7
LIST OF ADDITIONAL PARTS FOR THE NI HARDWARE ...................................................... 7
4.1
4.2
Parts Purchased............................................................................................................................. 7
Planned Purchases ........................................................................................................................ 8
1 Hardware Overview
The framework of the NI software/hardware used to implement the MIMO/OFDM
system prototype is depicted in Figure 1. The hardware consists essentially of three
devices: two PXI chassis and the DC power supply. Hereafter we provide brief
description of these devices.
Digital
LabVIEW VI
Receive
Antenna
NI PXI-5421
Arbitrary
Waveform
Generator
(100 million
samples per
second)
NI PXI-5600
Down-Converter
Carrier
Frequency
250 kHz – 2.7
GHz
Figure 1
Analog
Analog
NI PXI-5610
Up-Converter
Carrier Frequency
250 kHz – 2.7GHz
NI PXI-5620
High Speed
Digitizer
(64 million
samples per
second)
Digital
Transmit
Antenna
LabVIEW VI
NI software/hardware framework
1.1 PXI Chassis
In Figure 2 is a picture of the hardware. The hardware is housed in two18-slot PXI
chassis. The two transmit units and the two receive units are placed in separate PXI
chassis. Each chassis is connected to a PC through a fiber optic cable which connects the
chassis’ MXI-3 card to a PCI card in the PC. The MXI-3 card allows the components in
the chassis to be connected directly to the PCI bus of the PC; therefore, the PXI chassis
must be turned on before the PCs are booted so that the PCs will correctly recognize the
PXI hardware at boot up. More details on the transmit/receive PXI chassis are provided
in the next section.
DC Power
Supply
For Amps
Transmitter
Chassis
Receiver
Chassis
Figure 2
Picture of NI hardware
1.2 DC Power Supply
We found that using low-noise amplifiers (LNA) at the receiver end of the system was
the only way to provide us with a signal which was strong enough to be correctly
decoded at the receiver. The amplifiers that we used were Minicircuits ZQL2700MLNW amplifiers. On each of the receiver units before the signal reached the
digitizer we employed a LNA. The LNAs need to be supplied 15 volts of DC power—
which is why we have a DC power supply.
2 Description of the PXI Chassis
In Figure 3 is a picture of the PXI chassis. One slot is used to link the NI hardware to the
software (LabVIEW). Moreover, three slots are employed for the transmitter unit and
four for the receiver unit. Note, in Figure 3 transmit and receive slots are located in the
same chassis only for demonstration purposes. However, in the latest version of the
prototype one chassis contains the transmit units and the other one the receive units, as
mentioned before.
Link to Computer
Receiver
Down-converter
Figure 3
Transmitter
ADC
DAC
Up-converter
Picture of the PXI chassis
2.1 Transmitter
The transmit unit consists of two parts – an upconverter (PXI 5610) and an arbitrary
waveform generator (PXI-5421.) When used together the unit is called the PXI-5670
Signal Generator. The arbitrary waveform generator (ARB) runs at a maximum sampling
rate of 100 MSamples/s. When used in conjunction with the upconverter, the ARB takes
the discrete I-Q waveform created in LabVIEW and then creates a continuous waveform
at an IF of 25MHz which it sends to the upconverter. The upconverter then creates and
transmits the desired RF signal. The upconverter can transmit on a maximum frequency
of 2.7 GHz.
2.2 Receiver
The receiver also consists of two units. The first component is the downconverter (PXI5600) and the second is the high speed digitizer (PXI-5620.) The downconverter also has
a maximum frequency of 2.7 GHz and it downconverts the received signal to an IF of 15
MHz. It can receive a maximum bandwidth of 20 MHz. The digitizer operates at a
maximum sampling frequency of 64MSamples/s. The digitizer is equipped with a digital
downconverter chip (DDC) that can carry out digital downconversion from IF when the
bandwidth of the signal is less than1.25Mhz. Otherwise if the bandwidth of the signal is
greater than 1.25 MHz then the downconversion occurs in software, which is
considerably slower.
2.3 Device Drivers
The transmit and receive units both consists of two pieces of hardware. There are two
different ways of programming each unit. With the receiver, you can use the RF Signal
Analyzer (RFSA) drivers to program the downconverter and digitizer together as a single
entity or you can use the NI-Tuner drivers to program the downconverter and the NIScope drivers to program the Digitizer. When first using the hardware it is generally a
better idea to begin by using the RFSA drivers since they are simple to use. As a tradeoff
though, the ease of use comes at the cost of flexibility and robustness. Many of the
systems parameters are automatically controlled by the drivers and as a result full control
of all the hardware’s parameters is lost.
Using the two separate drivers gives the user much of that control back and parameters
such as the sampling rate and IF frequency can now be changed. However, of course, the
classic tradeoff is incurred as the hardware is a little more difficult to program. So far for
my applications I have stuck to using the combined RFSA driver set. For the transmitter
a similar driver breakdown applies. For the combined unit the RF Signal Generator
drivers (RFSG) are used. Individually the ARB uses the NI-FGEN driver while the
upconverter can be programmed using the same RFSG drivers as the combined unit.
2.4 Clock Synchronization
A 10 MHz reference clock is used to synchronize the upconverter/ARB at the transmitter
sided to the downconverter/Digitizer at the receiver side. A connection on the front of
the hardware devices synchronizes those components together. In order to carry out
carrier synchronization, the clocks on the transmit unit and the receive units can also be
synchronized together through two basic different configurations. The first is through the
backplane of the PXI chassis—this of course only works of both the transmitter and
receiver are in the same PXI chassis. The unit which is in slot 2 of the PXI chassis can be
set to synchronize the 10 MHz reference clock which the chassis comes equipped with
(actually, ONLY the unit in slot 2 of the PXI chassis can set the chassis reference clock).
Usually it makes most sense to have the receive unit in slot 2 of the chassis and to
synchronize according to the receivers clock. The transmit unit can then synchronize
according to the PXI chassis reference clock.
The other setup is to use the external connections to synchronize the carrier frequencies
of the transmitter and receiver. Connecting the 10 MHz clock out on the downconverter
to the clock reference in input of the upconverter will also allow for similar
synchronization. NI documentation tells us that this type of synchronization is more
accurate the PXI backplane synchronization.
2.5 Data Synchronization
In order to carry out timing synchronization, a digital trigger is sent from transmitter to
receiver to signify when signal transmission has begun. A trigger is sent externally using
the PF1 connection on both the Digitizer and the ARB. You cannot send a trigger using
the PXI backplane because the backplane is not connected all the way along all of the
slots. The vertical bars on the front of the case in between the slot numbers demarcate
the various PXI connections. The clock reference is one of the few signals which are
available to all slots, but the trigger lines are not.
The operation of the data synchronization is also controlled in the software. There is a
reference position input to the “niScope configure horizontal timing.VI” at the receiver
which determines how the trigger operates. The input should be a decimal between 0 and
1 and it refers to the percentage of data which is acquired pre-trigger versus the
percentage of data which is acquired post-trigger. Theoretically for the trigger to work as
expected, the value should be set to 0 so that no pre-trigger data is acquired and that all
data is post-trigger data. In reality, this does not happen. When the reference position is
set to 0, some of the data is lost pre-trigger. Therefore it should be set to a very small
value greater than 0 (we use 8.2x10^-6.) Depending on your application the only way to
set this correctly is by trial and error.
3 Hardware Limitations
3.1 Phase Offset
When synchronizing the clocks of the transmitter and the receiver, the clock’s frequency
will be locked, however the phase will not be. As a result there will be a constant phase
shift between the transmitter and receiver. This phase shift will be random, but it will be
constant for the whole acquisition period. For the OFDM application, this phase offset
was not a problem as it is accounted for through channel estimation.
3.2 Not a Real-time System
One of the largest limitations of the current system is that it is not a real-time system.
Data can only be acquired in chunks and not through a continuous acquisition. This is
because the digitizer is not able to downconvert the signal from IF to baseband in
hardware but instead does it through software. This downconversion is computationally
intensive and requires substantial processing time. A baseband system which does not
use the RF hardware should require less computation and may be able to implemented in
a real-time system.
4 List of Additional Parts for the NI Hardware
4.1
Parts Purchased
4.1.1 Cables and Connectors
From SM Electronics
http://www.smelectronics.us/
SMA HFLEX cables
6 - 24'' long, .141'' diameter, Part #HF141-24-0101
6 - 48'' long, .141'' diameter, Part #HF141-48-0101
6 - 72'' long, .086'' diameter, Part #HF086-72-0101
6 - 6'' long, .086'' diameter, Part #HF086-06-0101
SMA Formable Semi-rigid cables
4 - 6'' long, .086'' diameter, Part #HC086-06-0101
SMA Flexible 26.5Ghz cables
6 - 12'' long, Part #RF085H-0101-12
4.1.2 Adapters
SMA/SMA Straight 18Ghz Adapters
4 - SMA Female/Female Au(Gold) Plating, Part #4951
4 - SMA Female/Female Bulkhead Au Plating, Part #5205/Au
SMA-TNC Adapters
6 - SMA/Female - TNC/Female adapter, Part #5018
4.1.3 Splitters
From www.minicircuits.com
ZMSC-3-2 with an SMA connector, a 3-way power divider. Quantity 2
4.1.4 Antennas
There they have under their PCS and Dual Band Cellular Mobile Antenna
section they have Andrew Antenna Specialist Magnetic Mount Antennas with a
TNC connector, Item #97938
900mhz/1.8Ghz
Here is a direct link to the antenna
http://www.tessco.com/products/inv_display.jsp?gsg=36110&selsku=97938&cs=1
2.4Ghz Antennas
http://www.tessco.com/products/inv_display.jsp?gsg=36061&selsku=79798&cs=1
4.1.4 Amplifiers
Low Noise Amp
http://www.minicircuits.com/dg03-172.pdf
ZQL-2700MLNW (this is the one we currently have)
4.2
Planned Purchases
4.2.1 Amplifiers
From minicircuits
ZKL-2R7 http://www.minicircuits.com/cgi-bin/spec?cat=amplifier&model=ZKL2R7&pix=by493.gif&bv=4
4.2.2 Cables
www.pasternack.com
SMA-SMA low loss double shielded coax cables (Model No. PE3138)