Y86 Instruction Set Architecture Y86 Arithmetic and Logical

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Y86 Instruction Set Architecture
Y86 Arithmetic and Logical Instructions
Add
addl rA, rB
6 0 rA rB
[rA] + [rB]  rB; [PC]+2 PC
6 1 rA rB
[rB] − [rA]  rB; [PC]+2 PC
andl rA, rB
6 2 rA rB
[rA] & [rB]  rB; [PC]+2 PC
Exclusive-Or
xorl rA, rB
6 3 rA rB
[rA] ^ [rB]  rB; [PC]+2 PC
Subtract
RF: Integer registers
0 %eax
6 %esi
CC: Condition
codes
1 %ecx
7 %edi
ZF SF OF
2 %edx
4 %esp
3 %ebx
5 %ebp
subl rA, rB
Main Memory
And
byte addressable
array
• code, user data
•
PC
 ZF flag to 1 if the result is zero, to 0 otherwise,
 SF flag to the value of the most significant bit of the result,
 OF flag to 1 if there is 2’s complement overflow, 0 otherwise.
Y86 Instruction Set Architecture
1
Register-to-Register Move Instructions
Move Unconditionally
rrmovl rA, rB
2 0 rA rB
Move When Less or Equal
2 1 rA rB
cmovle rA, rB
Move When Less
cmovl rA, rB
2 2 rA rB
Move When Equal
cmove rA, rB
2 3 rA rB
Move When Not Equal
cmovne rA, rB
2 4 rA rB
Move When Greater or Equal
2 5 rA rB
cmovge rA, rB
Move When Greater
cmovg rA, rB
Y86 Instruction Set Architecture
2
Y86 Immediate & Memory Move Instructions
 rrmovl instruction copies value
from source register rA to
destination register rB, i.e.
[rA] rB
Move Immediate to Register
irmovl V, rB
3 0 0xFrB
V
V  rB
Move Register to Memory
 All other reg-to-reg move
instructions conditionally copy
value from source register rA
to destination register rB,
based on values of condition
codes. See Slide 6.
rmmovl rA, D(rB) 4 0 rA rB
D
[rA]  Memory[[rB]+D]
Move Memory to Register
mrmovl D(rB), rA 5 0 rA rB
D
Memory[[rB]+D]  rA
 All these instructions increment PC by 6, i.e.
[PC] + 6  PC
 All these instructions
increment PC by 2, i.e.
[PC] + 2 PC
2 6 rA rB
Y86 Instruction Set Architecture
3
Y86 Instruction Set Architecture
4
1
Y86 Jump Instructions
Jump Unconditionally
jmp Destination 7 0
Destiantion
 jmp instruction copies value
from its Destination field to
PC, i.e. [Destiantion] PC
Jump When Less or Equal
jle Destination 7 1
Destination
Jump When Less
jl Destination 7 2
Destination
Jump When Equal
je Destination 7 3
Destination
Y86 Jump Instructions (cont.)
 Each other jump instruction
copies a value from its
Destination field to PC if
jump condition is satisfied,
otherwise PC value is
incremented by 5 (the length
of jump instruction)
Jump When Not Equal
jne Destination 7 4
Destination
Jump When Greater or Equal
jge Destination 7 5
Destination
Jump When Greater
jg Destination 7 6
•
Move conditions are the same as these jump conditions.
Desinationt
Y86 Instruction Set Architecture
5
Y86 Stack Effecting Instructions
pushl rA
• jle instruction (jump when Less or Equal)
 jump condition: (SF^OF) | ZF
• jl instruction (jump when Less)
 jump condition: SF^OF
• je instruction (jump when Equal)
 jump condition: ZF
• jne instruction (jump when Not Equal)
 jump condition: ~ZF
• jge instruction (jump when Greater or Equal)
 jump condition: ~(SF^OF)
• jg instruction (jump when Greater)
 jump condition: ~(SF^OF) & ~ZF
A 0 rA0xF
popl rA
 Memory[%esp]  rA
 rA  Memory[%esp]
 [%esp]+4  %esp
 [PC] + 2  PC
 [PC] + 2  PC
6
Useful x-86 Instructions
• cmpl instruction is used for setting of condition codes.
B 0 rA0xF
 [%esp]‒4  %esp
Y86 Instruction Set Architecture
 Format: cmpl src2, src1; like computing (a – b) without
setting destination, where [src2]  b and [src1]  a
• testl instruction is also used for setting of condition codes.
 Format: testl src2, src1; like computing a & b without setting
call Destination 8 0
Destination
destination, where [src2]  b and [src1]  a
 pushes value PC+5 (the address of the next
 OF and CF set to 0.
instruction, i.e. returning address) onto stack
 [Destination]  PC
ret
9 0
 [%esp]  PC
• leal instruction is a variant of the movl instruction; used to
nop
compactly describe common arithmetic operations
 Format: leal c1(%r1,%r2,s), %r3
 effect: c1 + [%r1] + [%r2] * s  %r3
 c1 any integer, s=1,2,4 or 8; c1, %r1, %r2 & s optional.
1 0
 [PC] +1  PC
 [%esp]+4  %esp
Y86 Instruction Set Architecture
7
x-86 Instructions
8
2
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