KHAZAR UNİVERSİTY
School of Engineering and Applied Science
Department of Computer Science
COMPUTER ARCHITECTURE
Identification
Prerequisites
Language
Compulsory/Elective
Text books and course
materials
Department
Program
Subject
Term
Instructor
Classroom/hours
Computer Science
Undergraduate
CMS 308 Computer Architecture (3 credits)
Spring, 2015
Associate Professor Ramiz Ahmadov
11 Mehseti str. (Neftchilar campus), Room #402N,
CMS 303 Digital Logic
English
Required
Core Textbook:
1. Thomas L. Floyd . Digital Fundamentals, Tenth Edition- Pearson Edication
International, 2009.
Supplementary:
2. M. Morris Mano. Computer system architecture. California State
University -Fifth Edition, 2005.
Web Resources :
http://www.cs.wisc.edu/~arch/www/tools.html , http://www.cs.tcd.ie/ ,
http://www-2.cs.cmu.edu/~mihaib/whoswwho/photos.html.
Teaching methods
Evaluation Criteria
Case analysis
Group discussion
Lab
Lecture
Course paper
Others
Methods
Midterm Exam
Case studies
Class Participation
Quizzes
Project
Presentation
Laboratory Work (Assignments)
Final Exam
Other
Total
+
+
Date/deadlines
Percentage (%)
30%
10%
20%
40%
100%
Course objectives
Generic Objective of the Course:
to meet curriculum requirements of the School of Engineering and Applied
Sciences;
Specific Objectives of the Course :
 to support the students academically, to improve their chance of
realizing their potential ;
 to encourage students participation and interaction and fostering and
atmosphere of to learns and respect;
 to develop an understanding of the theory of Digital Systems.
 to build background for the student's further the development of the
computer hardware.
Learning outcomes
By the end of course the students should be able:
 to take apart the basic components and supplementary devices of the
computers.
 to analyze of the action principles of the digital components and units
of the computer .
 to know the memory and input-output organization and their element
bases.
Course outline
Concept of computer architecture; computer hardware; computer
organization; the architecture of a basic microcomputer; personal computers;
microprocessor architecture; sequential circuits; flip-flop input equations;
decoders; NAND gate decoders; encoders; multiplexers; registers; registers
with parallel load;shift registers; bidirectional shift register with parallel load;
register-transfer and micro operations; register-transfer language; bus and
memory transfer; common bus; arithmetic micro operations; binary adder;
binary adder-subtractor ; binary incrementer; logic micro operations; shift
micro operations; arithmetic logic shift unit; central processing unit; general
register organization; Central Processing Unit; introduction to CPU; major
components of CPU; general register organization; bus organization for CPU
register; control word, ALU; memory organization; memory hierarchy; main
memory; input-output processor (IOP); block diagram of a computer with I/O
processor; CPU-IOP communication; microprocessor and coprocessor;
memory connection to CPU; input-output organization; peripheral devices;
input-output interface; connection of a I/O bus to input-output devices;
Week
Tentative Schedule
Date
Topics
Textbook/Assignments
1
Introduction to the Digital Computers. Concept of
computer architecture. The basic Computer. Basic
computer block-diagram. Computer hardware. Computer
software. The Computer system. The architecture of a
basic microcomputer
[1]
Chapter 13,
[2]
Chapter 1
2
Digital components of the computers. Integrated
circuits. Microprocessor integrated circuits. Personal
computers. Microprocessor architecture . The major
functional parts of a microprocessor. Internal architecture
of a typical microprocessor.
[1]
Chapter 13,14,
[2]
Chapter 2
3
Basic Combinational Logic circuits. Implementing
Combinational Logic. Sequential circuits. Flip-flop input
equations. Block-diagram of a clocked synchronous
sequential circuit. State table for Sequential circuits.
[1]
Chapter 5,7
[2]
Chapter 1
4
Decoders. Enable input. The basic Binary decoder.
NAND gate Decoders. Decoder expansion. Logic and
block diagrams, truth tables of a n x m Decoders.
[1]
Chapter 6,
[2]
Chapter 2
5
Encoders.The-8-line-to-3-line encoder. Multiplexers,
data selector. Logic symbol for Multiplexer, quadruple
2x1 Multiplexers. Registers, register load; Register with
parallel load; logic and block diagrams; truth and
function tables.
[1]
Chapter 6,8,
[2]
Chapter 2
6
Shift registers, serial input. Basic shift register
operations. Serial In/Serial Out shift registers. Serial
[1]
Chapter 8,9
7
8
9
10
11
In/Parallel Out shift registers. Bidirectional shift register
with parallel load ; function table and block diagram.
Binary counters, logic diagram and excitation table.
Quiz.
Register transfer and Microoperations. Register transfer
Language. Register transfer, control function. Block
diagram and timing diagram. Basic symbols for Register
transfers.
Midterm exam
Bus and Memory transfer, common bus, bus system for
four registers; bus selection; function table for bus;
Three-state Bus Buffers, bus line with three-state
buffers; memory transfer; memory read; memory write.
[2]
Chapter 1,2
Arithmetic Microoperations ; categories of arithmetic
micro- operations; add / subtract micro operations. Table
of arithmetic micro operations. Binary adder; binary
adder-subtract or ; binary incrementer; theirs block
diagrams. Arithmetic circuit, function table.
[1]
Chapter 6,13
Logic Micro operations; special symbols, list of a logic
micro operations. Hardware implementation, logic
circuit. Some applications, selective-set, selectivecomplement, selective-clear, the mark operation, the
clear operation
Shift Micro operations; logical shift; circular shift;
arithmetic Shift; combinational circuit shifter.
Arithmetic Logic Shift Unit. Function table for
Arithmetic Logic Shift Unit
12
13
14
15
TBA
Central Processing Unit. Introduction to CPU. Major
components of CPU. General register organization; bus
organization for CPU register; control word, ALU.
Register set with common ALU; Encoding of ALU
Operations.
Quiz.
Memory and storage. Memory organization. Memory
Unit; RAM, ROM Types of ROMs, PROM, EPROM,
the Flash memory. Memory hierarchy. Memory modules.
Main memory. Magnetic Hard disks. Compact disk (CD).
CD-R;CD-RW, DVD-ROM
Input-output organization. Peripheral devices. Inputoutput Interface. Serial I/O Interface Buses. Parallel I/O
Interface Buses. Connection of a I/O bus to input-output
devices. Input-output Processor (IOP). CPU-IOP
communication. Microprocessor and coprocessor.
Categories of microprocessor.
Final exam
[1]
Chapter 9
[2]
Chapter 4
[1]
Chapter 13,
[2]
Chapter 4
[2]
Chapter 4
[1]
Chapter 4,
[2]
Chapter 4
[1]
Chapter 13
[2]
Chapter 4
[1]
Chapter 13
[2]
Chapter 8
[1]
Chapter 10,
[2]
Chapter 2,12
[1]
Chapter13,
[2]
Chapter 1, 2