OpenSPARC Primer 2
Xilinx ML505-V5LX110T Evaluation Board
The Virtex-5 OpenSPARC Evaluation
Platform from Digilent is provided for
hosting the OpenSparc T1 opensource microprocessor. The Xilinx
XUPV5-LX110T is a general purpose
development board powered by the
Virtex-5 FPGA from Xilinx. The
information about the Evaluation
board must not be confused with the
OpenSPARC implementation of this
board. The software Demos available
from the Xilinx are not the software
Demos created from the OpenSPARC
project. Xilinx do provide details of
the board hardware and Vertex 5
FPGA which can be useful. The hardware is detailed in the document located at the following
web site http://www.xilinx.com/support/documentation/boards_and_kits/ug347.pdf. Below is
a pictorial showing the devices connected to the vertex 5 on the evaluation board.
The Reference designs provided by Xilinx on their web site are used with a MircoBlaze
processor or PowerPC
processor and are not
compatible with the
OpenSPARC use of this
board. The OpenSPARC
design does use the
MicroBlaze processor,
however firmware has
been added and is part
of the EDK project
(discussed later) to use
the MicroBlaze as a
memory interface to
the rest of the board.
This can be seen below.
The T1 Core has a layer
of firmware called
ccx2mb
which
interfaces the T1 Core bus to the MircoBlaze Core. Then the MicroBlaze core communicates to
the system bus. For more details on the firmware layer and MircoBlaze operation see section
6.1 of the OpenSPARCT1_DVGuide located under the folder “doc” in the top level directory of
the OpenSPARC package.
Xilinx Virtex 5 FPGA
Virtex-5 FPGAs are 65nm FPGA family fabricated in 1.0v, triple-oxide process technology,
providing up to 330,000 logic cells, 1,200 I/O pins, 48 low power transceivers, and built-in
PowerPC 440, PCIe endpoint and Ethernet MAC blocks. This is a rather large FPGA and is
needed for the size of the OpenSPARCT1 processor RTLs. For more details of the Vertex 5 visit
http://www.xilinx.com/products/virtex5/index.htm.
Xilinx EDK
The Xilinx Embedded Development Kit (EDK) is a suite of tools and Intellectual Property (IP)
that enables designers to do a complete embedded processor system for implementation in a
Xilinx FPGAs. Xilinx's EDK supports the embedded PowerPC 405 and 440 cores in Virtex-II Pro,
Virtex-4 and Virtex-5 chips and the Microblaze core. The Xilinx Platform Studio (XPS) is part of
the EDK development environment or GUI used for designing the hardware portion of the
embedded processor system. Platform Studio Software Development Kit (SDK) is the other part
of EDK which is an integrated development environment which compliments XPS and is used
for C/C++ embedded software application creation and verification. The OpenSPARC T1 EDK
project should be ready to go. The directory where the EDK project can be found is in the top
level directory under \design\system\edk. If using the ML505/ML509 evaluation board then the
EDK project file name is “system.xmp”. To generate a bitstream for a Xilinx FPGA, there is a
simple two-step process which is covered in the following tutorials and
OpenSPARCT1_DVGuide. EDK can be installed either on multiple operating systems either UNIX
based or Windows based. For more details of the EDK software visit
http://www.xilinx.com/support/documentation/sw_manuals/edk_ctt.pdf.
System ACE:
System ACE CF uses memory based on the CompactFlash Association standard, providing a
very flexible, high-density, two-piece configuration solution comprised of a CF card and the
System ACE CF controller. The CF card interface can accommodate removable CompactFlash
(CF) cards, currently ranging from 32 MB to 4 GB, or Hitachi Microdrives, currently ranging from
2 GB to 6 GB. The System ACE CF controller has built-in control logic with a variety of
specialized interfaces. This device is the interface to the CF card, the JTAG chain containing one
or more FPGA devices, an external board test environment, and a system processor. The
default configuration mode takes bitstream data from the memory module and configures a
chain of FPGAs via JTAG. There is also a Boundary-Scan test and programming interface to aid
with system prototyping, testing, and debugging. The Compact Flash interface is the source of
configuration data. Below is a pictorial of the System ACE hardware interfaces. OpenSPARC
Xilinx evaluation board has an ACE controller and uses the CF card to configure the FPGA on the
board using ACE files which are generated through EDK debugger, included scripts from
OpenSPARC package, or impact tool as part of the Xilinx suite. Building the ACE file will be
cover in the tutorials that follow.
Telnet Programs
TELNET (TErminaL NETwork) is a network protocol used on the Internet or local area
networks to provide a bidirectional interactive text-oriented communications facility via a
virtual terminal connection. User data is interspersed in-band with TELNET control information
in an 8-bit byte oriented data connection over the Transmission Control Protocol (TCP). Telnet
was developed in 1969 beginning with RFC 15, extended in RFC 854, and standardized as
Internet Engineering Task Force (IETF) Internet Standard STD 8, one of the first Internet
standards (Wikipedia, Telnet, April 2010).
Hyperterminal:
Hyper Terminal is communications software developed by Hilgraeve and was included in all
versions of Microsoft Windows until the release of Windows Vista. HyperTerminal is a terminal
emulation program that supports communications over TCP/IP networks, Dial-Up Modems, and
serial COM ports. Hyper terminal provides the user the ability of connecting and transferring files
between the two computers over TCP/IP network to systems on the Internet or to networks using
Telnet or Secure Shell (SSH). Hyperterminal can talk directly to many different types of devices using
serial COM ports and can be used with the OpenSPARC evaluation board for serial communications
with the board.
Tera Term:
Tera Term is an open-source software terminal emulator program similar to
Hyperterminal. It emulates different types of terminals such as DEC VT100 to DEC VT382
type devices. It supports telnet, SSH 1 & 2 and serial port connections. This can be
downloaded for free from http://hp.vector.co.jp/authors/VA002416/teraterm.html.
Cygwin
Cygwin is included as part of the Xilinx EDK install. Cywin is not however a tool
developed by Xilinx. Cygwin began development in 1995 at Cygnus Solutions and is now a part
of Red Hat. Cygwin is a Linux-like environment for Windows. Cygwin is a Linux-like environment
for Windows consisting of two parts:
1. A DLL (cygwin1.dll) which acts as a Linux API emulation layer providing substantial
Linux API functionality.
2. A collection of tools which provide Linux look and feel.
The Cygwin DLL currently works with all recent, commercially released x86 32 bit and 64 bit
versions of Windows except for Windows CE. Cygwin is not a way to run native linux apps on
Windows. Cygwin is not a way to magically make native Windows apps aware of UNIX ®
functionality, like signals, ptys, etc. You have to rebuild your application from source if you want
it to run on Windows. The API follows the Single Unix Specification
(http://www.opengroup.org/onlinepubs/009695399/nfindex.html) as much as possible. The
major difference between Cygwin and Linux is the C library being newlib instead of glib (Red
Hat, Cygwin’s user manual, 2010).
With Cygwin installed, users have access to many standard UNIX utilities. They can be used
from one of the provided shells such as bash or from the Windows Command Prompt.
Additionally, programmers may write Win32 console or GUI applications that make use of the
standard Microsoft Win32 API and/or the Cygwin API. As a result, it is possible to easily port
many significant UNIX programs without the need for extensive changes to the source code.
This includes configuring and building most of the available GNU software including the
development tools within the Cygwin distribution (Red Hat, Cygwin’s user manual, 2010).
References:
1. Xilinx Inc. (2010), Virtex-5 FPGA Family, Retrieved from
http://www.xilinx.com/products/virtex5/index.htm. Retrieved on April 3, 2010.
2. Digilent, Inc., Virtex-5 OpenSPARC Evaluation Platform, Retrieved from
http://www.digilentinc.com/Products/Detail.cfm?NavTop=2&NavSub=599&Prod=XUPV5
Retrieved on April 3, 2010.
3. Xilinx Inc. (2010), Virtex-5 LXT FPGA ML505 Evaluation Platform
http://www.xilinx.com/products/devkits/HW-V5-ML505-UNI-G.htm Retrieved on April 3,
2010.
4. Xilinx Inc. (2010), ML505/ML506/ML507 Evaluation Platform: Users Guide, October 7, 2009
http://www.xilinx.com/support/documentation/boards_and_kits/ug347.pdf
5. Xilinx Inc. (2010), System ACE Compact Flash Solution, October 1, 2008,
http://www.xilinx.com/support/documentation/data_sheets/ds080.pdf
6. Knipper Gary, Xilinx Inc. (2010), System configuration Solution for Xilinx, October 1, 2008,
http://www.xilinx.com/support/documentation/white_papers/wp151.pdf
7. Cygwin, Home Page, http://www.cygwin.com/. Retrieved on April 3, 2010.
8. Red Hat, Inc. (2010), Cygwin User's Guide, Retrieved from http://cygwin.com/cygwin-ugnet/index.html. Retrieved on April 3, 2010.
9. Hilgraeve Inc., Hyperterminal Home Page, Retrieved from
http://www.hilgraeve.com/hyperterminal.html. Retrieved on April 3, 2010.
10. Xilinx Inc. (2010). Embedded System Tools Reference Guide EDK 11.3.1 Retrieved from
http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/est_rm.pdf Retrieved
on Sept 26, 2009.
11. Wikimedia Foundation, Inc. (April 3, 2010), Telnet. Retrieved from
http://en.wikipedia.org/wiki/Telnet
12. Xilinx, Inc. (2009), Xilinx University Program XUPV5-LX110T Development System. Retrieved
from http://www.xilinx.com/univ/xupv5-lx110t.htm