Application Brief SSYA009A - February 2000 – Revised May 2000 MicroStar Junior Made Easy Mixed Signal Products ABSTRACT This application brief provides a high level overview of the MicroStar Junior package and its installation and use for thermal dissipation. What is the MicroStar Junior Package? The MicroStar Junior package is a polyimide film-based ball grid array (BGA) package. Like other BGA packages, the MicroStar Junior package uses solder alloy balls as the interconnect between the package substrate and the board on which the package is soldered. Figure 1 shows the structure of TI’s MicroStar Junior package. Encapsulant Chip Wire bond Die paste How does the MicroStar Junior Package Dissipate Heat? The MicroStar Junior Package dissipates heat by using the shaded balls in the middle of the package, indicated in Figures 2(a) and 2(b), for thermal dissipation through vias to the ground plane. Only the outside row(s) of balls is used for electrical connections in this package. This eases routing requirements as compared with other larger BGA packages. For simplicity, the remainder of this document will concentrate solely on a single outer-row signal connection package. Although, the same basic rules apply for the dual outer-row signal connection package. GQE PACKAGE (TOP VIEW) Cu pattern Index Index Single Outer-Row (a) Dual Outer-Row (b) Via Solder Alloy ball Flex substrate Figure 1. Structure of TI’s MicroStar Junior Package Figure 2. Top View of MicroStar Junior Package – Outer Row(s) routed for signal MicroStar Junior is a trademark of Texas Instruments. 1 SSYA009A MicroStar Junior Assembly Process 1. For single outer-row signal routing, prepare the PCB with a top side land pattern as shown in Figure 3. Each circular land, represented by shaded circles, corresponds to a ball on the outside edge of the package as shown in Figure 4. The diameter of the lands is shown in Table 1. 0.5 mm Ball Pitch Copper Land 0.28 mm (non solder mask defined) 2. Place vias between the positions where the balls will contact the PCB, as shown in Figures 6 and 7. Do not place the vias directly under the ball locations. These vias should be 0.30-mm (max) in diameter and extend from the top mounting surface to the internal ground plane(s) as shown in Figure 5. Cross-sectional view Internal Copper Plane Via (0.30 mm) Layer 1 Layer 2 Figure 5. Via Structure Via 0.30 mm (max) Internal Copper Plane Solid Copper Fill Via 0.30 mm (max) Figure 3. PCB Layer 1 (top view) MicroStar Junior package Package Ball Via Copper Land Top Side Thermal Pad A B PCB Figure 6. PCB Ground Plane Layers (top view) (Not to scale) A = Via diameter on package B = Land diameter on PCB Ratio A/B should equal 1.0 for optimum reliability. Figure 4. Package and PCB Land Pattern (side view) Via 0.30 mm (max) Table 1. Ball Pitch vs Diameter of Lands 2 BALL PITCH LAND DIAMETER 0.5 mm 0.28 mm 0.65 mm 0.33 mm MicroStar Junior Made Easy Figure 7. Drill Pattern SSYA009A 3. When connecting the vias to the ground plane, do not use the typical web or spoke via connection methodology. Web connections have a high thermal resistance that is useful for slowing heat transfer during soldering operations. This makes the soldering of vias that have web connections easier. However, in this application, low thermal resistance is desired for the most efficient heat transfer. Therefore, the vias should make their connection to the internal ground plane with a complete connection around the entire circumference of the plated hole as shown in Figure 8. The 0.30-mm vias should be plated with at least 1 ounce of copper so the holes will be completely filled. For thinner copper, smaller vias should be used. Be aware that the viscosity of the plating solution may prevent adequate flow through small vias. Thereby leaving the center of the via unplated or open. If the copper does not completely fill the via, epoxy or solder mask should be used to fill the remaining holes to prevent wicking. Exposed Copper Land Solder Mask Via Covered With Solder Mask Figure 9. Solder Mask (top view) 5. Apply solder paste to the exposed thermal lands shown in Figure 10. Proper placement of the solder paste is important as this will properly center the IC during the solder reflow operation. Solder Paste Solder Mask Solid Via RECOMMENDED Web or Spoke Via NOT RECOMMENDED Via Connection Figure 8. Via Connection 4. As shown in Figure 9 and Figure 11, the top side solder mask should leave the lands exposed. The exposed copper lands should be aligned with the balls and sized according to the land diameters sizes listed in Table 1. The 0.3-mm vias between the lands should be covered with solder mask. Figure 10. Solder Paste (top view) 6. When these preparatory steps are in place, the MicroStar Junior IC is simply placed in position and run through the solder reflow operation as any standard surface-mount component. The result is a part that is properly installed. NOTE: This is a thermally enhanced PCB construction and care must be taken to ensure solder reflow temperatures are achieved at the component location. It is best to verify that the PCB vendor has the process capabilities to achieve a proper thermally conductive solution. MicroStar Junior Made Easy 3 SSYA009A Signal Pads Top Side Thermal Pad Solder Mask Signal Pads Solder Mask Vias PCB GND Plane PCB Power Plane Power Plane Bottom Side Thermal Pad PCB Solder Mask Figure 11. PCB Side View For detailed information on MicroStar BGA packages, see SSYZ015A MicroStar BGA Packaging Reference Guide. 4 MicroStar Junior Made Easy IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. 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