Name________________________________ EET 252 Lab #4 Introduction to Quartus II Software Introduction In the steps below you’ll use Altera’s Quartus II software to program a simple Boolean expression into a programmable logic device. This exercise will illustrate the steps of entering a design, simulating it, and burning it onto a programmable chip. The expression that we’ll use is X = AB + CD. Using a straight edge, create the truth table for this expression in the space below. You’ll need this later to verify that your chip is working correctly. Part 0. Starting Quartus II The first time you start Quartus II, you’ll see several dialog boxes that will never appear again after this first start-up. Follow the steps below to get Quartus up and running. Procedure 1. From your computer’s Start menu, go into the Altera folder and start the program named Quartus II 9.0 sp2 Web Edition. EET 252 Lab #4- Page 1 Revised 4/26/2012 2. You should soon see the “Look and Feel” dialog box shown below. Select Quartus II and press OK. 3. You should soon see the dialog box shown below. Select Run the Quartus II software and press OK. 4. You should soon see the “Getting Started” screen shown below. I find this screen annoying and not very useful, so I recommend checking the box in the lower left corner that says “Don’t show this screen again.” Then close this screen by clicking the X in its upper right corner. 5. You should see a message in red telling you that Quartus is checking for informational updates. Wait for this message to disappear. EET 252 Lab #4- Page 2 Revised 4/26/2012 6. At last, you’re into Quartus and your screen should look as shown below. (You might see a small “Tips and Tricks” window. I recommend closing it.) Maximize the window so that it fills your computer screen. Part 1. Creating a Project Any design task using Quartus involves the creation of a large number of files. You create some of these files yourself, such as: • A block diagram/schematic file, whose filename ends in .bdf. • A vector waveform file, whose filename ends in .vwf. In addition to these files that you create, the Quartus software automatically creates many others. To keep everything organized, all of these files are stored in a “project,” which corresponds roughly to a folder on your computer’s drive. So whenever you start working on a new design, your first step will be to create a new project. Procedure 1. Choose File > New Project Wizard. You’ll see an Introduction screen. Click the Next button. 2. You’ll see the page 1 dialog box asking you for three things: a working directory, a project name, and a top-level entity name. 3. For the working directory, use the button labeled … to browse to your flash drive (or your desktop), and then create a new folder named BooleanSchematic. Click EET 252 Lab #4- Page 3 Revised 4/26/2012 the Open button to return to the dialog box, which now should look something like this: 4. To keep things simple, use the same name (BooleanSchematic) for the project name and the name of the top-level design entity. So your filled-in dialog box should look something like this: 5. Press the Next button, and you’ll see the page 2 dialog box, which lets you add files to your project. We don’t have any files to add, so just press the Next button. 6. The page 3 dialog box appears, asking us to specify the chip onto which we will burn our design. Fill in this dialog box as shown below. • In the Family drop-down box, select MAX7000S. • For Target device, select the Specific device radio button. • Under Available devices, select EPM7128SLC84-7. • Press the Next button. 7. The page 4 dialog box appears, letting us specify other electronic-design automation tools (EDA tools) that we’ll be using in conjunction with Quartus. Since we won’t use any other EDA tools, just press the Next button. EET 252 Lab #4- Page 4 Revised 4/26/2012 8. The page 5 dialog box appears, asking us to confirm everything we’ve entered. It should look like this, except that your project directory will be different: 9. Press the Finish button. Part 2. Creating a Block Diagram/Schematic File Using Quartus, there are two main ways to enter a digital design. The first way, which you’ll learn now, is to draw a schematic diagram, much as you would in Multisim. When you do this, you save the diagram in a file called a block diagram/schematic file. The other way, which you’ll learn later, is to type a description of your design using a special language called VHDL. In this part of the lab you’ll use the schematic-diagram method to implement the Boolean equation: X = AB + CD Procedure 1. In the Quartus menus, select File > New. 2. In the resulting dialog box, select Block Diagram/Schematic File and press OK. A new window named Block1.bdf will open. 3. Let’s start by saving this new file as part of our project. Select File > Save As… from the menus and fill in the dialog box as shown below. • Give this file a name of BooleanSchematic. • Make sure that Save as type is set to Block Diagram/Schematic File (*.bdf). EET 252 Lab #4- Page 5 Revised 4/26/2012 • • Also make sure that there’s a checkmark in the Add file to current project box. Then press the Save button. You’ve now got an empty workspace in which you’ll draw your schematic diagram. This is very much like drawing a schematic diagram in Multisim, although of course there are minor differences that you’ll get used to as you practice. 4. Right-click your mouse anywhere in the empty workspace. 5. In the shortcut menu that appears, select Insert > Symbol. 6. In the Name box, type and2. (As you can probably guess, this is the name for a two-input AND gate.) The press the OK button. 7. Move your mouse to wherever you’d like to place the AND gate, and then press your left mouse button. 8. Repeat the steps above to place another two-input AND gate, a two-input OR gate (which is called or2), and an inverter (which is called not). 9. Next you’ll place four input pins and one output pin. • Right-click in the empty workspace. • Select Insert > Symbol. • In the Name box, type input. Then press OK. • Place the input pin to the left of the gates. • Repeat for three more input pins and one output pin. Arrange the symbols so that your workspace looks similar to this: 10. To change the name of an input pin or output pin, simply double-click its current name. Do this now, renaming your input pins to a, b, c, and d (from top to bottom). Also rename your output pin to x. 11. Now you must wire these gates and pins to each other. This is similar to drawing wires in Multisim, but it’s a little different. In Multisim, to draw a wire, you click and release the mouse button, and then move the mouse. In Quartus, you must EET 252 Lab #4- Page 6 Revised 4/26/2012 hold the mouse button down as you move the mouse; don’t release the mouse button until you’ve reached the point that you want the wire to go to. Do this now, wiring your symbols together so that your drawing looks like this: 12. Save your file by selecting File > Save from the menus. Part 3. Compiling the Project Next you’ll compile your design. In this step, Quartus does a number of things. It checks your design for errors. It simplifies the expressions in your design, similar to what you could do manually with Boolean algebra or K-maps. It also generates the code needed to program your design into the specific chip that you selected earlier. Procedure 1. Select Processing > Start Compilation from the menus. Compilation will take a minute or so, during which you should see a spinning hourglass in the screen’s lower right corner. Eventually, you should see this message: “Full compilation was successful (1 warning).” Warnings are okay; but if you have any errors, then you’ve done something wrong above and need to fix it before you proceed. 2. Press the OK button. Part 4. Simulating Your Design At this point you could download your design onto the chip. But first, you should simulate it in software to make sure that your design will produce the correct output(s). Quartus has an easy-to-use tool called a waveform editor. This tool lets you specify the input combinations that you want to test, and then displays the simulated output(s) for each of these inputs combinations. In many cases you’ll catch mistakes at this point, which you can correct before you burn the design onto the chip. This will save you time, since Quartus can go through all the possible input combinations in the “virtual world” faster than you can go through all the combinations in the real world. To simulate your design in Quartus you must first create a vector waveform file. Procedure 1. Select File > New from the menus. In the resulting dialog box, select Vector Waveform File, and then press OK. In the same area where previously you drew your circuit diagram, you will now have a blank timing diagram. EET 252 Lab #4- Page 7 Revised 4/26/2012 2. Let’s start by saving this new file as part of our project. Select File > Save As… from the menus and fill in the dialog box as shown below. • Give this file a name of BooleanSchematic. • Make sure that Save as type is set to Vector Waveform File (*.vwf). • Also make sure that there’s a checkmark in the Add file to current project box. • Then press the Save button. Next you must set up the timing for your simulation, which involves telling Quartus two things: • How often it should change the input values. (This is called the grid size.) In the steps below, we’ll set the grid size to 1 µs. • How long the simulation should run. (This is called the end time.) In our case, we have four input variables, and we want to simulate all possible combinations of these four inputs. That’s a total of 16 possible combinations. Therefore, since we’re allowing 1 µs for each input combination, our end time will be 16 µs. 3. Select Edit > Grid Size… from the menus. In the resulting dialog box, set Time Period to 1 and set the unit to us. Then press OK. 4. Select Edit > End time… from the menus. In the resulting dialog box, set Time to 16 and set the unit to us. Then press OK. 5. To make the entire 16 µs range visible in the window, select View > Fit In Window from the menus. Your window should now look like this: Next we need to add the input and output variables that we want to simulate. EET 252 Lab #4- Page 8 Revised 4/26/2012 6. Near the left edge of the blank timing diagram, double-click in the blank area under the word Name. The following dialog box should open: 7. Type a in the Name: box and press OK. 8. Repeat the previous two steps several times to add b, c, d, and x in the Name column underneath a. There are several ways that we could tell Quartus to step through all of the possible input combinations for a, b, c, and d. Probably the easiest way is to tell Quartus to treat each of these inputs as a clock, with each input having a period twice as long as the input before it. In reality, we don’t plan to use these four inputs as clock inputs. But this is an easy way to get Quartus to step through all possible input combinations. 9. Highlight the variable name a in the Name column by clicking it. 10. Select Edit > Value > Clock from the menus. In the resulting dialog box, set Time Period to 16 and set the unit to us. Then press OK. 11. Similarly, select b and make it a clock with a period of 8 µs. 12. Then select c and make it a clock with a period of 4 µs. 13. Finally, select d and make it a clock with a period of 2 µs. At this point your timing diagram should look as shown below. Notice that a, b, c, and d step through all possible combinations. Since we haven’t run the simulation yet, the value of output variable x is unknown, as indicated by the crossed diagonal lines. EET 252 Lab #4- Page 9 Revised 4/26/2012 14. Save your file by selecting File > Save from the menus. Now that we’ve done the work of setting up the combinations of input variables to be simulated, it’s time to tell Quartus to perform the simulation. 15. Select Processing > Start Simulation from the menus. After a delay, during which you should see the spinning hourglass the lower right corner, you should see the message “Simulator was successful.” Press OK. 16. To see the entire simulation, select View > Fit In Window from the menus. When you do, your simulation results should look like this: 17. Using the truth table that you created at the beginning of this lab, verify that the output waveform is correct for x = ab + cd. Then show me your simulation results. ___________________ Part 5. Assigning Input and Output Pin Numbers So far you’ve simulated your design, and you’ve also (in Part 1) told Quartus that you plan to download this design onto an Altera MAX EPM7128SLC84-7 chip. Before you actually download the design to the chip, you must tell Quartus which pins on the chip to use for your four inputs (a, b, c, d) and your one output (x). On the Altera UP-1 Programmer board, locate the MAX chip. Notice that it is surrounded by four black plastic headers. These headers contain sockets (holes) into which you can plug wires to make connections to the pins on the MAX chip. The MAX chip has 84 pins. Some of these pins are reserved for special purposes. The others are available for you to program as either input pins or output pins. For your reference, the last page of this lab has a diagram showing the locations of the pins. It also shows which of the pins you are allowed to use. Take a look at this page now. On the Altera UP-1 Programmer board, locate the bank of DIP switches near the MAX chip. We’ll use four of these switches to enter the values of our inputs a, b, c, and d. Notice that on the side of the MAX chip closest to the DIP switches, the first pin is numbered 33. EET 252 Lab #4- Page 10 Revised 4/26/2012 Also locate the bank of eight red LEDs closest to the MAX chip. We’ll use one of these LEDs to display our output x. Notice that on the side of the MAX chip closest to the LEDs, the first pin is numbered 54. Let’s use the following pin assignments: Variable a b c d x Pin number 33 34 35 36 54 Procedure 1. On the Altera UP-1 Programmer board, use jumper wires to connect the leftmost four DIP switches to pins 33, 34, 35, and 36 on the chip. Consult the diagram on the last page of this lab to identify the pin locations. Use another wire to connect an LED to pin 54. 2. In Quartus, select Assignments > Pins from the menus. You should see the Assignment Editor window shown below. Notice that near the bottom of this window, your input and output names are listed in the Node Name column. 3. Click in the Location column of the first row (the row whose Node Name is a). 4. Type 33 and press your keyboard’s Enter key. EET 252 Lab #4- Page 11 Revised 4/26/2012 5. Repeat the previous two steps several times, entering the pin numbers for your other inputs and outputs (34 for b, 35 for c, 36 for d, and 54 for x). Skip over the rows for TCK, TDI, and so on. The Assignment Editor window should look like this (I’ve enlarged the bottom area so that we can see all of the node names): 6. Close the Assignment Editor window. Select File > Save Project from the menus. 7. In the window displaying your .bdf file (which should still be open behind several other files), you should now see the pin numbers that you’ve assigned to the input and output nodes, as shown below. 8. Compile your design again by selecting Processing > Start Compilation from the menus. After a delay, you should get a message telling you that compilation was successful (with 1 warning). Press the OK button. EET 252 Lab #4- Page 12 Revised 4/26/2012 Part 6. Downloading Your Design to the Chip Now you’re ready to program the chip! Procedure 1. On the Altera UP-1 Programmer board, make sure that the four configuration jumpers are all in the top position. These jumpers tell the board which of the chips (the MAX or the FLEX) we want to program. 2. Makes sure that one end of the ByteBlaster cable is plugged into your computer’s parallel port, and the other end is plugged into the Altera UP-1 Programmer board. 3. Make sure that the power cord is plugged into a wall socket, and the other end is plugged into the Altera UP-1 Programmer board. Turn the UP-1’s power switch ON. The UP-1’s green LED labeled POWER should light up. 4. In Quartus, select Tools > Programmer from the menus. The dialog box shown below will open. The first time you use your computer to program the UP-1, you must complete the following steps to configure the hardware connection. 5. Press the Hardware Setup… button. The Hardware Setup dialog box shown below will open. EET 252 Lab #4- Page 13 Revised 4/26/2012 Notice that after the words “Currently selected hardware,” it says “No Hardware.” Once you’ve performed the next couple of steps, it will say “ByteBlaster” here, and in the future you shouldn’t have to perform these steps again when you want to program the chip. 6. Press the Add Hardware… button. An Add Hardware dialog box will open. • For Hardware type, select ByteBlasterMV or ByteBlaster II. • For Port, select LPT1. (This refers to the printer port on your computer.) • Press OK. 7. In the Hardware Setup window, press the Close button. 8. Back in the main dialog box, click the checkbox under the words Program/Configure. The press the Start button. You should see a progress bar telling you the status of the download. The download should complete with no error messages. Part 7. Testing the Programmed Chip Recall that on the first page of this lab you drew the truth table for the expression that you’ve just burned onto the chip. Now let’s verify that the chip behaves as expected. Procedure 1. Examine the DIP switches on the UP-1. Notice the label with the word ON and an arrow pointing down. You should ignore this label. The switches produce a 0 when they’re in the DOWN position, and they produce a 1 when they’re in the UP position (just as you’d probably expect). 2. DO NOT use a pencil to set the DIP switches, since graphite from the pencil would foul the switch contacts and cause the switch to fail. Use your fingernail or a small screwdriver instead. EET 252 Lab #4- Page 14 Revised 4/26/2012 3. The red LEDs are active-low. A lit LED indicates a 0, and a dark LED indicates a 1. (Of course, if you didn’t like this active-low behavior, you could easily modify it in Quartus by adding an inverter to the end of your schematic diagram.) 4. Use the DIP switches to run through all possible combinations of the input variables. Using a straight-edge, record your results in the form of a truth table below. 5. After you’ve verified that your truth table matches the one you predicted on the first page of this lab, show me your working circuit. ___________________ One of the advantages of programmable logic is that it lets you quickly modify your design if you’re not happy with the way it’s working. For example, an annoying feature of the circuit above is that, since the LED on the UP1 board is active-low, the LED lights up when you send it a 0 and it goes dark when you send it a 1. Let’s fix that right now! 6. Modify Your Design: In your .bdf file, add an inverter right before the output pin. This will cause the LED to behave the way we’d normally expect it to behave. Then recompile, download, and test your circuit. (You can skip the simulation step because you already know that the circuit works correctly except for the pesky inverted output.) Show me your working circuit. ___________________ EET 252 Lab #4- Page 15 Revised 4/26/2012 7. Close this project by selecting File > Close Project from the menus. Part 8. Programming a Sequential Circuit You’ve learned how to use Quartus to program the MAX chip to implement a simple combinational circuit. (Remember, combinational circuits contain logic gates but no flip-flops, counters, shift registers, or other clocked components.) In similar fashion you could implement combinational circuits of much greater complexity. You can also implement sequential circuits. Quartus’s block diagram editor lets you build circuits containing flip-flops, counters, and other sequential components. This means that you can design a complicated digital circuit containing gates, counters, shift registers, and so on, and then burn your entire design onto a single MAX chip. This process is much faster and more efficient than connecting individual 74XX chips. That’s why programmable logic chips have almost entirely replaced fixed logic chips in the design of new digital systems. Your next task is to program the MAX chip to behave like a 7493 MOD-16 counter. This will require running through most of the process above, with the changes noted below. Procedure 8. Create a New Project: Following the steps that you performed above in Part 1 of this lab, create a new project called CounterSchematic. 9. Create the Block Diagram/Schematic File: Following the steps that you performed above in Part 2, create a new .bdf file that has a 7493 wired to operate as a MOD-16 counter. Two new symbols that you’ll need for your design are the ones called 7493 and GND. Your design will need one input (for the clock input) and four outputs (for the counter’s four bits, which we’ll want to display on LEDs). Name your input CLKA. Name your outputs QA, QB, QC, and QD. 10. Compile the Project: Compile your design as you did above in Part 3. You should get three warnings, but no errors. 11. Simulate Your Design: Following the steps that you performed above in Part 4, create a .vwf file. Configure it to a have a grid size of 1 µs and an end time of 16 µs. Also configure the CLKA input to behave as a clock with a time period of 1 µs. When you run the simulation, you should find that the four output bits behave in the manner expected for a MOD-16 counter. Show me your simulation results. ___________________ 12. Assign Input and Output Pin Numbers: Referring to the pin diagram on the last page of this lab, choose an available pin on the MAX to use for your clock input. Also choose four available pins close to the LEDs to use for your outputs. EET 252 Lab #4- Page 16 Revised 4/26/2012 Following the steps that you performed above in Part 5, assign your chosen pin numbers and then recompile your design. 13. Download Your Design to the Chip: Following the steps that you performed above in Part 6 (but you shouldn’t have to add the hardware again), burn your design onto the MAX chip. 14. Test the Programmed Chip: a. On the UP1 board, run wires between four LEDs and the four output pins that you selected on the MAX chip. b. We’ll use the red trainer’s TTL output to provide the clock for our circuit. First we must establish a common ground between the trainer and the Altera UP1 board. With the UP1 board’s power turned off and the trainer’s power turned off, locate the JTAG_OUT header on the UP1 board. Referring to the second diagram on the last page of this lab, locate one of the GND sockets in the JTAG_OUT header. Then run a black wire from this socket to the trainer’s GND terminal. Caution: The UP-1 board does not have short-circuit protection, so be very careful not to short power to ground. c. Run a wire from the trainer’s TTL MODE terminal to the input pin that you selected on the MAX chip. d. Set the frequency of the trainer’s function generator to its lowest possible value. e. Turn on the UP1’s power and the trainer’s power. You should find that the four LEDs count up as a MOD-16 counter. (Remember that the LEDs are active low. This means that, for example, all four LEDs are lit for a count of 0.) f. Show me your working circuit. ___________________ EET 252 Lab #4- Page 17 Revised 4/26/2012 Appendix: Altera UP1 Header Numbering MAX Headers: Surrounding the MAX chip are four headers that let you connect wires to the chip’s pins. The diagram below shows which sockets in the headers you should use to connect to specific pins. (There are also labels on the board showing some of these pin numbers.) Notes: • The letter x indicates no connection to a pin. • Strikethrough (such as 13) indicates reserved pins that you cannot use. • All other pins are I/O pins that you can use as either inputs or outputs. 11 9 7 5 3 1 83 81 79 77 75 x 10 8 6 4 2 84 82 80 78 76 12 14 16 18 20 22 24 26 28 30 32 13 15 17 19 21 23 25 27 29 31 x x 73 71 69 67 65 63 61 59 57 55 ALTERA MAX EPM7128SLC84-7 74 72 70 68 66 64 62 60 58 56 54 34 36 38 40 42 44 46 48 50 52 x 33 35 37 39 41 43 45 47 49 51 53 JTAG_OUT Header: The 10-pin header labeled JTAG_OUT provides power (+5 V) and ground connections, as shown below. Do not plug wires into any of the other seven sockets on this header, as they are reserved for special functions. Caution: This board does not have shortcircuit protection, so be very careful not to short power to ground. 1 GND VCC GND EET 252 Lab #4- Page 18 Revised 4/26/2012