AU9321
USB Compact Flash Card Reader
Technical Reference Manual
Revision 1.1
© 1997-2002 Alcor Micro Corp.
All Rights Reserved
Copyright Notice
Copyright 1997 - 2002
Alcor Micro Corp.
All Rights Reserved.
Trademark Acknowledgements
The company and product names mentioned in this document may be the trademarks or registered trademarks of their manufacturers.
Disclaimer
Alcor Micro Corp. reserves the right to change this product without prior notice.
Alcor Micro Corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document.
Specifications are subject to change without prior notice.
Contact Information:
Web site: http://www.alcormicro.com/
Taiwan
Alcor Micro Corp.
4F-1, No 200 Kang Chien Rd., Nei Hu,
Taipei, Taiwan, R.O.C.
Phone: 886-2-8751-1984
Fax: 886-2-2659-7723
Santa Clara Office
2901 Tasman Drive, Suite 206
Santa Clara, CA 95054
USA
Phone: (408) 845-9300
Fax: (408) 845-9086
Los Angeles Office
9400 Seventh St., Bldg. A2
Rancho Cucamonga, CA 91730
USA
Phone: (909) 483-9900
Fax: (909) 944-0464
Table of Contents
1.0
Introduction--------------------------------------------------------------------------------------
1
1.1 Description----------------------------------------------------------------------------------
1
1.2 Features--------------------------------------------------------------------------------------
1
2.0
Application Block Diagram-----------------------------------------------------------------
3
3.0
Pin Assignment--------------------------------------------------------------------------------
5
4.0
System Architecture and Reference Design-----------------------------------------
7
4.1 AU9320 Block Diagram------------------------------------------------------------------
7
4.2 Sample Schematics------------------------------------------------------------------------
8
Electrical Characteristics-------------------------------------------------------------------
9
5.1 Recommended Operating Conditions-------------------------------------------------
9
5.2 General DC Characteristics ------------------------------------------------------------
9
5.3 DC Electrical Characteristic for 3.3---------------------------------------------------
9
5.0
5.4 Crystal Oscillator Circuit Setup for Characteristics ------------------------------ 10
5.5 ESD Test Results -------------------------------------------------------------------------- 11
5.6 Latch-Up Test Results ------------------------------------------------------------------- 12
6.0
Mechanical Information---------------------------------------------------------------------- 15
TABLE OF CONTENTS
i
TABLE OF CONTENTS
i
1.0 Introduction
1.1 Description
The AU9321 is a single chip integrated USB Compact Flash (CF) card reader controller. It
can be used as a removable storage disk in enormous data exchange applications between PC
and PC or PC and various consumer electronic devices.
The AU9321 can read of CF card’s contents created by handheld consumer electronic devices
such as digital camera, MP3 player, PDA and mobile phone… etc. It provides a faster and
convenient way of data transfer scheme to meet the emerging need of a data exchange center
between PC and various consumer devices. With AU9320, users’ experience will be further
enhanced by the Plug-and-Play nature built into latest operation systems such as Windows
2000/XP and Mac OS X.
Because of the multiple sectors transfer up to 4G bytes and the single chip integration,
AU9321 will be the most powerful and cost efficient CF card reader controller solution in the
market.
1.2 Features
Fully compliant with USB v1.1 specification and USB Device Class Definition for
Mass Storage, Bulk-Transport v1.0
Fully compliant with Compact Flash (CF) v1.4 Specification.
Work with default driver from Windows ME, Windows 2000, Windows XP, Mac
OS 9.1, and Mac OS X. Windows 98 is supported by vendor driver from Alcor.
Ping-pong FIFO implementation for concurrent bus operation
Support multiple sectors transfer up to 4G byte to optimize performance
Support optional external EEPROM for USB VID, PID and string customization
Capable of handling 8 sets of built-in PID, VID and strings to minimize inventory
control and improve lead production lead time
LED for bus activity monitoring
Integrated power switch and power management circuit to meet USB 500uA power
consumption during suspend with CF card in the slot.
Runs at 12MHz, built-in 48 MHz PLL
Built-in 3.3V regulator
48-pin LQFP package
INTRODUCTION
1
INTRODUCTION
2
2.0 Application Block Diagram
Following is the application diagram of a typical flash memory card reader using AU9321. By
connecting the reader to a PC through USB bus, the AU9321 is acting as a bridge between the
flash memory card from digital camera, MP3 player, PDA or mobile phone and PC.
Digital Camera
PC with USB Host Controller
MP3 Player
CF Cards
PDA
USB Flash
Card Reader
Moble Phones
PC
APPLICATION BLOCK DIAGRAM
3
APPLICATION BLOCK DIAGRAM
4
3.0 Pin Assignment
The AU9321 is packed in 48-LQFP form factor. The following figure shows signal name for
each pin and the table in the following page describes each pin in detail.
CTI
GPO7
GPO6
GPI2
GPI1
GPI0
CFAD1
CFAD0
CFCDN
IORDN
IOWRN
CT2
48
47
46
45
44
43
42
41
40
39
38
37
VCCK
VCCA
3
34
CFAD2
GNDA
4
33
CFAD3
VCC2CF
5
32
CFAD9
VCC5V
6
31
CFOEN
VCC3V
7
30
CFWTN
USB_DM
8
29
CFRST
USB_DP
9
28
GND
RSTN
10
27
GND
GNDIO
11
26
GND
CFPD
PD
12
25
GND
17
18
19
20
21
22
23
24
CFD2
16
GND
15
CF
WEN
14
EEP
CLK
EEP
DATA
13
CFD1
35
CFD0
2
CFD7
XTAL 2
CFD6
GNDK
CFD5
36
CFD4
1
CFD3
XTAL 1
PIN ASSIGNMENT
5
Table 3-1. Pin Descriptions
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Name
XTAL1
XTAL2
VCCA
GNDA
VCC2CF
VCC5V
VCC3V
USB_DM
USB_DP
RSTN
GNDIO
CFPD
EEPDATA
EEPCLK
CFWEN
GND
CFD3
CFD4
CFD5
CFD6
CFD7
CFD0
CFD1
CFD2
GND
GND
GND
GND
CFRST
CFWTN
CFOEN
CFAD9
CFAD3
CFAD2
VCCK
GNDK
CT2
IOWRN
IORDN
CFCDN
CFAD0
CFAD1
GPI0
GPI1
GPI2
GPO6
GPO7
CT1
IO Type
Input
Output
Power
Ground
Power
Power
Output
Input/Output
Input/Output
Input
Ground
Power
Input/Output
Output
Output
Ground
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Ground
Ground
Ground
Ground
Output
Input
Output
Output
Output
Output
Power
Ground
Output
Output
Input
Output
Output
Input
Input
Input
Output
Output
Description
Crystal Oscillator Input (12MHz)
Crystal Oscillator Output (12MHz)
Analog Vcc, Connected to 3.3V
Connected to Ground
CF Power
5V Power Supply
Regulated 3.3V out
USB DUSB D+
Hardware reset (Active Low)
Ground
Power Down
EEPROM Data
EEPROM Clock
Arribute write enable
Ground
Compact Flash Data 3
Compact Flash Data 4
Compact Flash Data 5
Compact Flash Data 6
Compact Flash Data 7
Compact Flash data 0
Compact Flash data 1
Compact Flash data 2
Ground
Ground
Ground
Ground
Compact Flash reset signal
Compact Flash wait signal
Compact Flash output enable
Compact Flash address 9
Compact Flash address 3
Compact Flash address 2
Kernel Vcc
Kernel Ground
Connected to Ground
Compact Flash I/O write signal
Compact Flash I/O read signal
Compact Flash Card Detect
Compact Flash address 0
Compact Flash address 1
General Purpose I (*1)
General Purpose I (*1)
General Purpose I
General Purpose Output
General Purpose Output, used for LED activity
Connected to Ground
PIN ASSIGNMENT
6
4.0 System Architecture and
Reference Design
4.1 AU9321 Block Diagram
USB
Upstream
Port
XCVR
Alcor Micro - AU9321 Flash Memory Card Reader Block Diagram
USB
SIE
Processor
3.3 V
Card
Power
CF control
FIFO
RAM
EEPROM
Control
ROM
3.3 V
Voltage
Regulator
/Power Switch
CF
Reset
POR
12MHz
XTAL
EEPROM
SYSTEM ARCHITECTURE AND REFERENCE DESIGN
7
4.2 Sample Schematics
VCC
FB
J1
VCC
DATADATA+
GND
FGND1
C1
C2
0.1UF
10UF
U3
VCC3.3
F1
R1
FB
C3
F2
C4
1UF
0.1UF
1.5K
1
2
3
4
5
R3
R4
VCC3.3
XTAL1
XTAL2
VCCA
GNDA
VCC2CF
VCC5V
1
2
3
4
5
6
7
39
8
39
9
RSTN 10
GNDIO 11
12
EEPDATA 13
EEPCLK 14
CFWEN 15
16
CFD3
17
CFD4
18
CFD5
19
CFD6
20
CFD7
21
CFD0
22
CFD1
23
CFD2
24
VCC
XTAL1
XTAL2
VCCA
GNDA
VCC2CF
VCC5V
VCC3V
USB_DM
USB_DP
RSTN
GNDIO
CFPD
EEPDATA
EEPCLK
CFWEN
GND
CFD3
CFD4
CFD5
CFD6
CFD7
CFD0
CFD1
CFD2
CT1
GPO7
GPO6
GPI2
GPI1
GPI0
CFAD1
CFAD0
CFCDN
CFRDN
CFWRN
CT2
GNDK
VCCK
CFAD2
CFAD3
CFAD9
CFOEN
CFWTN
CFRST
GND
GND
GND
GND
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
CT1
GPO7
VCC3.3
Q1
HBC807 or compatible
R2
CFAD1
CFAD0
CFCDN
CFRDN
CFWRN
R11
100K
330
CARD POWER
GNDK
VCCK
CFAD2
CFAD3
CFAD9
CFOEN
CFWTN
CFRST
R12
VCC2CF
R5
R10
1K
Q2
1N9013
1M
R9
100K
10K
CFD0
CFD1
CFD2
CFD3
CFD4
CFD5
CFD6
CFD7
AU9321-48PIN
R13
R14
R15
R16
R17
R18
R19
R20
10K
10K
10K
10K
10K
10K
10K
10K
CARD POWER
CARD POWER
VCC3.3
J1
CFD4
CFD6
CFOEN
CFAD3
CFAD1
CFD0
CFD2
CFCDN
TP
CFWRN
INTRQ
CFRST
C13
0.1UF
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
GND
CFdata4
CFdata6
CE1N
-OE
CFaddr8
VCC
CFaddr5
CFaddr3
CFaddr1
CFdata0
CFdata2
CDN
CFdata11
CFdata13
CFdata15
VS1
IOWRN
INTRQ
CSEL
RESET
INDACK
SPKR
CFdata8
CFdata10
CFdata3
CFdata5
CFdata7
CFaddr10
CFaddr9
CFaddr7
CFaddr6
CFaddr4
CFaddr2
CFaddr0
CFdata1
IOIS16
CDN
CFdata12
CFdata14
CE2N
IORDN
WEN
VCC
VS2
WAITN
REGN
STSCHG
CFdata9
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
CFD3
CFD5
CFD7
R6
CFAD9
VCC3.3
U2
8
7 VCC A0
A1
6 WP
A2
5 SCL
SDA GND
10K
VCC3.3
EEPCLK
EEPDATA
CFAD2
CFAD0
CFD1
ACTIVITY LED GPO7
D1
330
R7
C5
1
2
3
4
24C01A or compatible
0.1UF
TP
VCC
CARD POWER
VCC5V
VCC3.3
CFRDN
CFWEN
FB
C8
F3
VCCA
0.1UF
C6
CFWTN TP
GNDIO
C7
0.1UF
FB
F4
0.1UF
GNDA
C9
18PF
XTAL1
R8
CF CONNECTOR
VCC3.3
FB
Disclaimer: This schematic is for reference only.
Alcor Micro Corp. makes no warranty for the use of its
products and bears no responsibility for any error that
appear in this document. Specifications are subject to
change without notice.
F5
C10
0.1UF
FB
VCCK
C12
18PF
1M
Y1
12MHZ
XTAL2
C11
F6
0.1UF
GNDK
Size
A4
Document Number
Date:
Wednesday , July 24, 2002
Rev
1.1
AU9321 Demostration schematic
SYSTEM ARCHITECTURE AND REFERENCE DESIGN
Sheet
1
of
8
1
5.0 Electrical Characteristics
5.0 Recommended Operating Conditions
SYMBOL
VCC
VIN
TOPR
TSTG
PARAMETER
Power Supply
Input Voltage
Operating Temperature
Storage Temperature
MIN
4.75
0
0
-40
TYP
5
MAX
5.25
VCC
85
125
UNITS
V
V
O
C
O
C
5.1 General DC Characteristics
SYMBOL
IIL
IIH
IOZ
CIN
COUT
CBID
PARAMETER
Input low current
Input high current
Tri-state leakage current
Input capacitance
Output capacitance
Bi-directional buffer capacitance
CONDITIONS
no pull-up or pull-down
no pull-up or pull-down
MIN
-1
-1
-10
TYP
MAX
1
1
10
5
5
5
UNITS
µA
µA
µA
ρF
ρF
ρF
5.2 DC Electrical Characteristics for 3.3 volts operation
SYMBOL
VIL
VIH
VOL
VOH
RI
PARAMETER
Input Low Voltage
Input Hight Voltage
Output low voltage
Output high voltage
Input Pull-up/down resistance
CONDITIONS
CMOS
CMOS
IOL=4mA, 16mA
IOH=4mA,16mA
Vil=0V or Vih=VCC
MIN
TYP
MAX
0.9
UNITS
V
V
V
V
KΩ
2.3
0.4
2.4
10k/200k
ELECTRICAL CHARACTERISTICS
9
5.4 Crystal Oscillator Circuit Setup for Characteristics
The following setup was used to measure the open loop voltage gain for crystal oscillator
circuits. The feedback resistor serves to bias the circuit at its quiescent operating point and
the AC coupling capacitor, Cs, is much larger than C1 and C2.
ELECTRICAL CHARACTERISTICS
10
5.5 ESD Test Results
Test Description : ESD Testing was performed on a Zapmaster system using the HumanBody –Model (HBM) and Machine-Model (MM), according to MIL_STD 883 and EIAJ
IC_121 respectively.
Human-Body-Model stress devices by sudden application of a high
voltage supplied
by a 100 PF capacitor through 1.5 Kohm resistance.
Machine-Model stresses devices by sudden application of a high voltage supplied by a
200 PF capacitor through very low (0 ohm) resistance
Test circuit & condition
Zap Interval : 1 second
Number of Zaps : 3 positive and 3 negative at room temperature
Critera : I-V Curve Tracing
Model
HBM
MM
Model
Vdd, Vss, I/C
Vdd, Vss, I/C
S/S
15
15
TARGET
4000V
200V
Results
Pass
Pass
ELECTRICAL CHARACTERISTICS
11
5.6 Latch-Up Test Results
Test Description: Latch-Up testing was performed at room ambient using an
IMCS-4600 system which applies a stepped voltage to one pin per device with
all other pins open except Vdd and Vss which were biased to 5 Volts and
ground respectively.
Testing was started at 5.0 V (Positive) or 0 V(Negative), and the DUT was
biased for 0.5 seconds.
If neither the PUT current supply nor the device current supply reached the
predefined limit (DUT=0 mA , Icc=100 mA), then the voltage was increased
by 0.1 Volts and the pin was tested again.
This procedure was recommended by the JEDEC JC-40.2 CMOS Logic
standardization committee.
Notes:
1. DUT: Device Under Test.
2. PUT: Pin Under Test.
Icc Measurement
m
V Supply
1 Source
Vcc
Pin
under
+
Untested
Input Tied
to V supply
DUT
Untested
Output Open
Circuit
+
GND
Trigger
Source
Test Circuit : Positive Input/ output Overvoltage /Overcurrent
ELECTRICAL CHARACTERISTICS
12
Icc M easurem ent
mA
1 Source
+
U ntested
Input T ied
to V supply
V Supply
V cc
Pin
under
test
U ntested
O utput O pen
Circuit
DUT
+
GND
T rigger
Source
T est Circuit : Negative Input/ O utput O vervoltage /O vercurrent
Icc Measurement
mA
V Supply
Vcc
All Input Tied
to V supply
Untested
Output Open
Circuit
DUT
+
GND
Supply Voltage test
Latch–Up Data
Model
Voltage
Model
+
+
-
Current
Vdd-Vxx
Voltage (v)/ Current (mA)
11.0
11.0
200
200
9.0
S/S
5
Results
Pass
5
5
Pass
ELECTRICAL CHARACTERISTICS
13
ELECTRICAL CHARACTERISTICS
14
6.0 Mechanical Information
body size
lead
D1
E1
count
7
7
48
A1
A2
L1
b
c
e
0.1
1.4
1
0.2
0.127
0.5
A1
stand-off
A2
body thickness
L1
lead length
b
lead width
c
lead thickness
e
lead pitch
MECHANICAL INFORMATION
15
