Analog Integrated Circuits and Signal Processing
Passive, Constant Resistance,
Broadband Delay Filter
Dr. John Choma*
Professor of Electrical Engineering &
*University of Southern California
Department of Electrical Engineering-Electrophysics
University Park: Mail Code: 0271
Los Angeles, California 90089–0271
213–740–4692 [USC Office]
213–740–7581 [USC Fax]
818–384–1552 [Cell]
johnc@usc.edu
ABSTRACT:
This paper addresses the synthesis of an alternative to the Bessel-Thomson delay filter.
The new filter is forged of building blocks familiar to filter designers, while affording the
RF designer the luxury of a designable delay that is not inversely dependent on filter
bandwidth. Furthermore, the architecture has the desirable attribute of the relative
simplicity and low device count that derives from only a second-order realization. In the
case of a monolithic realization, excessive chip surface area is therefore not consumed,
and the matching error inherent to large numbers of passive devices is minimized. Finally, the new filter has a range of designable delay that is larger than its BesselThomson counterpart due to the purposeful incorporation of right half plane zeros in the
transfer function. The paper begins with a tutorial to ensure reader understanding of the
building blocks for the proposed filter. The tutorial is followed by a design example.
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Manuscript Received:
;
Choma
Revised:
FOOTNOTES:
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FIGURE CAPTIONS
Fig. (1).
Schematic Diagram Of A Bridge Network That Can Be Designed To
Deliver Constant Input Impedance, Zin(s), Independent Of Signal Frequency.
Fig. (2).
(a). A Left L-Section Capable Of Establishing Constant Input Impedance, Zin(s), Independent Of Signal Frequency. (b). The Right L-Section Counterpart To The Network In (a).
Fig. (3).
A Tee Network Capable Of Establishing Constant Input Impedance,
Zin(s), Independent Of Signal Frequency.
Fig. (4).
A Cascade Interconnection Of A Constant Resistance Bridge Network
With A Constant Resistance Right L-Section Circuit.
Fig. (5).
Normalized Allpass Bridge Network Whose Voltage Transfer Function, Vo/Vi, Is H1(s), As Given By (21).
Fig. (6).
(a). The Topology Of Impedance Za2(s) In The Tee Or L-Section
Subcircuits Of The Delay Filter. (b). The Structure Of Impedance
Zb2(s) In The Tee Or L-Section Subcircuits Of The Delay Filter.
Fig. (7).
Normalized Circuit Realization Of The Allpass Delay Filter Whose
Transfer Function, Normalized To The Zero Frequency Transfer
Value, Is Stipulated By (20).
Fig. (8).
Magnitude Response Of The Proposed Delay Filter For Various Values Of The Filter Quality Factor, Q. The Normalized Frequency, y, Is
The Radial Signal Frequency, ω, Divided By The Self-Resonant Frequency, ωp. The Magnitude Scale Is Normalized To The Zero Frequency Transfer Function Magnitude, H(0).
Fig. (9).
Normalized Delay Frequency Response As A Function Of The
Normalized Signal Frequency, y.
Fig. (10). Signal Frequency Passband, Displayed Normalized To The Filter SelfResonant Frequency, ωp, And As A Function Of Quality Factor, Q,
Over Which The Filter Delay Degenerates To No More Than 80% Of
Its Low Frequency Value.
Fig. (11). Delay Overshoot Of The Proposed Filter As A Function Of The Filter
Quality Factor, Q. Superimposed On This Plot Is A Least Mean
Square Linear Approximation To The Overshoot Characteristic.
Fig. (12). Realization Of The Delay Filter Corresponding To The Considered
Design Example. All Resistances In The Network Are In Ohms, All
Inductances Are In Nanohenries, And All Capacitances Are In
Femtofarads.
Fig. (13). HSPICE Simulation Of The Delay Response For The Filter Whose
Schematic Diagram Appears In Figure (12).
Fig. (14). HSPICE Simulation Of The I/O Magnitude Response For The Filter
Whose Schematic Diagram Appears In Figure (12).
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INTRODUCTION
In the high performance linear amplifiers, filters, and digital signal processing cells
pervasive of modern communication systems, distortionless transmission between the applied
signal and resultant output response is an omnipresent engineering goal. “Distortionless” signal
transmission is herewith taken to mean that the wave shape of the output response is identical to
that of the applied input excitation to within a factor of a multiplicative constant. System output
responses that are delayed in the time domain by a constant amount, but otherwise mirror the input excitation, are also viewed as distortionless. It follows that the idealized design goal of any
linear distortionless network is the assurance that the output response, say y(t), to an applied input signal, x(t), is given in the steady state by the simple relationship,
y(t)  Kx( t  Tdo ) ,
(1)
where K, the gain of the system, and Tdo, the time delay implicit to transmitting the input signal
to the network output port, are constants. Specifically, K and Tdo are invariant with the frequency spectrum implicit to the input signal, x(t). While a system projecting the idealized input to- output (I/O) relationship of (1) is physically unrealizable, specific system applications allow
invoking acceptable approximations of the subject relationship. For example, constant I/O delay
is relatively unimportant in electronic audio channels because the human ear can readily perceive
only signal amplitude fluctuations, thereby rendering constant K far more important than constant Tdo. In video systems, the operational situation is the direct opposite of audio channels; that
is, constant Tdo is a significantly more critical design objective than is constant K. On the other
hand, non-constant time delay is a serious problem in almost all digital communication systems,
in that delay variations with input signal frequency incur potentially significant pulse dispersion,
which causes a time domain interference of pulses of interest with neighboring pulses[1].
If Y(s) is the Laplace transform of y(t) and if X(s) designates the Laplace transform of
x(t), the frequency domain equivalent of (1) is
Y(s)  K X (s) e sTdo ,
(2)
which suggests a network transfer function, H(jω), in the sinusoidal steady state of
H(jω) 
Y(jω)
 K e jωTdo .
X (jω)
(3)
The suggested constant gain magnitude and linear phase response in the frequency domain supports the contention that (1) infers a physically unrealizable network or system. The implication
of this engineering reality is that the subject frequency domain transfer characteristic can be
emulated only by the transfer function,
H(jω)  H(jω) e jφ(ω) ,
(4)
where |H(jω)| is understood to be constant K if |H(jω)| is independent of radial frequency ω, and
φ(ω) is the I/O phase angle response of the considered system. A broadband system achieves
|H(jω)| ≈ K to within a user-defined error over a designable, finitely wide frequency passband.
Moreover, since the steady state delay response, D(ω), which is commonly referenced as group
delay or envelope delay, is
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D(ω)  
Choma
dφ(ω)
,
dω
(5)
constant I/O delay is seen to require a phase response exhibiting linear phase lag. Specifically,
constant I/O time delay in the amount of Tdo is adequately approximated in the steady state if the
system is designed to produce the lagging phase response, φ(ω) ≈ –ωTdo over an acceptably
broad passband.
The most common approximation of constant delay in electrical and electronic circuits
is the Bessel-Thomson filter, which realizes a maximally flat delay (MFD) response over the
passband of interest[2]. In a lowpass, nth order network realization of a transfer function delivering MFD, the first (n – 1) frequency derivatives of delay response D(ω) are zero at ω = 0.
Accordingly, the nominally constant, and indeed maximum, delay produced by such a realization
is the zero frequency value, D(0) = Tdo, of the delay response.
Despite its laudable delay response attributes and widespread utilization, the BesselThomson filter suffers from a serious shortcoming. In particular, the observable 3-dB bandwidth
of the Bessel-Thomson filter is, to within crude first order, inversely proportional to the desired
value of the zero frequency delay. This shortfall stems from the fact that the Bessel-Thomson
filter is a minimum phase network having no finite frequency zeros. Because of the lack of finite
frequency zeros, the phase response, and thus the delay characteristic, of the Bessel-Thomson
structure derives solely from its pole locations in the complex frequency plane. Indeed, the zero
frequency delay in a lowpass Bessel-Thomson filter is precisely equal to the coefficient of the
first order term in a monic representation of its characteristic polynomial. It is easily shown that
this coefficient is, in turn, identically equal to the sum of inverse pole frequencies, which clearly
gives rise to the nominal inverse dependence between zero frequency delay and 3-dB bandwidth[3].
This paper exploits constant resistance, lowpass lattice networks to forge a synthesis
procedure for a viable alternative to the classic Bessel-Thomson delay filter[4]. Although the
alternative proposed herein does not necessarily deliver a maximally flat delay response, it does
afford its user the flexibility of specifying an allowable positive or negative delay error over frequency with respect to the desired zero frequency delay. The absence of a strictly maximally flat
delay characteristic is mitigated by two engineering attributes that derive from a filter realization
premised on a non-minimal phase architecture. First, the designable amount of zero frequency
delay can be larger than that afforded by the Bessel-Thomson filter since both the poles and
incorporated right half plane zeros of the circuit realization contribute to the phase and delay
responses. Second, and because of the presence of right half plane zeros, acceptable delays over
relatively broad frequency ranges can be achieved with only a second order structure. In contrast, broadband performance in the Bessel-Thomson filter mandates progressively higher filter
order. The third, and perhaps most significant, attribute of the new delay filter is that through a
judicious selection of the natural frequency associated with the right half plane zeros, the desired
zero frequency delay is rendered relatively insensitive to the 3-dB bandwidth of the filter magnitude response.
2.0.
DELAY FILTER TRANSFER CHARACTERISTICS
The transfer function, H(s), of a non-minimal phase, allpass, second order circuit is
expressible as
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
2 
 s  
s

 1  Qω   ω  
z
 z ,
H(s)  H(0) 
2

 s  
s
1 

 

Qω p  ω p  


(6)
where H(0) is the zero frequency value of the function, ωp is the undamped natural, or self-resonant, frequency of the circuit, Q is the circuit quality factor, and ωz is the undamped natural frequency associated with the zeros of the network. Obviously, |H(0)| ≤ 1 if the circuit undergoing
consideration is a passive structure. In the sinusoidal steady state, (6) becomes
2

 y
1    
α

H(jy)  H(0)
 1  y2 

 y 
j

 Qα   ,
 y 
j  
 Q  
(7)
where
y  ω ωp
(8)
is the signal frequency normalized to the circuit self resonant frequency, and
α  ωz ω p .
(9)
From either (6) or (7), note that for infinitely large frequencies, the value of the transfer function
is H(0)/α2. Thus, if the circuit defined mathematically by (7) is to emulate allpass performance
to within 3 dB of attenuation, α2 must be no larger than root two.
Assuming H(0) > 0, the phase response corresponding to (7) is
 y Qα 
 y Q 
  tan 1 
φ(y)   tan 1 
.
1  y2 
1   y α 2 




(10)
Using (5) and (8), the delay response, D(y), in terms of normalized frequency y can be shown to
derive from
2
 1 
 y 

1



  
 α  
 Qα  


1
2
  1 y
Q
 
ω p D(y) 

,
2
4
 1
 2
 1
 y 
 y
4
1 
 2 y  y
1 
 2    
 Q2

 Q2
 α 
α




(11)
which confirms a zero frequency group delay of
D(0) 
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1 
1
1   .
ωpQ 
α
(12)
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It is interesting to note that if ωz = ωp, which implies α = 1, the normalized magnitude,
|H(j0)/H(0)|, of the transfer characteristic in (7) features zero attenuation for all signal frequencies. If in addition to α = 1, Q2 = 1/3, (11) collapses to
ω p D(y)
Q 2 =1 3, α=1


2 3 1  y2
1  y 2  y4
,
(13)
which is a maximally flat delay function featuring a zero frequency group delay that is twice that
afforded by a conventional second order Bessel-Thomson filter. But unlike the second order
Bessel-Thomson filter, the allpass realization boasts zero attenuation with respect to the zero
frequency transfer function value over all frequencies, independent of the amount of zero frequency delay.
3.0.
FILTER REALIZATION STRATEGY
{
R
Vo
Fig. (1).
3.1.
Zb(s)
Za(s)
Zin(s)

Vi

Za(s)
Zb(s)
The simplest strategy for realizing the filter whose transfer function is given by (6) exploits the application of suitable constant resistance structures; that is, networks characterized by
frequency invariant driving point input impedance functions. To this end, a cursory review of
the properties of such structures is in order.
Schematic Diagram Of A Bridge Network That Can Be Designed To Deliver
Constant Input Impedance, Zin(s),
Independent Of Signal Frequency.
CONSTANT RESISTANCE BRIDGE
Figure (1) depicts a bridge configuration terminated at its output port in a resistance, R,
and comprised of the indicated interconnection of two impedances, Za(s), and two impedances,
Zb(s). A straightforward, but somewhat laborious, analysis of this circuit confirms that the input
impedance, Zin(s), is identical to R, independent of Za(s) and Zb(s), and thus signal frequency, if
Z a (s)Zb (s)  R 2 ;
(14)
that is, Zb(s) must be chosen so that it is the product of the square of the terminating load resistance, R, and the admittance corresponding to Za(s). Further analysis confirms that if (14) is
satisfied, the transfer function of the bridge is
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Vo (s)
1  Z a (s) R
1  R Zb (s)


.
Vi (s)
1  Z a (s) R
1  R Zb (s)
(15)
Observe that if Za(s) is a lossless impedance, which implies that Zb(s) is likewise lossless, the
network at hand delivers an allpass magnitude response.
3.2.
CONSTANT RESISTANCE L-SECTIONS
The left L-section circuit shown in Figure (2a) and the right L-section network in Figure (2b) are also capable of producing Zin(s) ≡ R, independent of signal frequency. For both of
these topologies, the requisite criterion for constant driving point input impedance remains that
postured by (14). Under this impedance constraint, the transfer function for either circuit is
Zin(s)
R
Vi
Vo
Za(s)
Z (s)
in
R
Vi
Zb(s)
Zb(s)
R
(a).
Fig. (2).
Vo
Za(s)
R
(b).
(a). A Left L-Section Capable Of Establishing Constant Input Impedance, Zin(s),
Independent Of Signal Frequency. (b). The Right L-Section Counterpart To The
Network In (a).
Vo (s)
1
1


.
Vi (s)
1  Z a (s) R
1  R Zb (s)
(16)
Unlike the bridge configuration, which is an allpass structure when Za(s) is a lossless impedance,
neither of the two L-sections display allpass magnitude responses even when Za(s), and hence
Zb(s), is a lossless impedance. Moreover, neither of the L-sections is lossless, since a branch
resistance equal to the terminating load resistance, R, appears in their respective topologies. A
distinct advantage of the L-section structures is their ability to maintain a common ground between their respective input and output ports. In contrast, the bridge topology produces a single
ended output response to a differentially applied input excitation.
3.3.
CONSTANT RESISTANCE TEE-SECTION
Like the L-sections in Figure (2), Zin(s) ≡ R in the tee structure of Figure (3), if impedances Za(s) and Zb(s) abide by (14). When (14) is satisfied, (16) remains applicable for the voltage transfer ratio of the tee.
It should be understood that a cascade of any two or more of the foregoing constant
resistance networks results in an overall transfer function that is identically the product of the
transfer ratios of the individual sections. For example, consider Figure (4), which depicts a
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cascade of the bridge configuration in Figure (1) with the right L-section network offered in Figure (2b). Let the bridge network be designed so that when its output port is terminated in a resistance, R, Za1(s)Zb1(s) = R2. This design strategy ensures that the driving point input impedance
to the bridge is R. Similarly, the driving point input impedance of the right L-section is identical
to R if this section is implemented with Za2(s)Zb2(s) = R2, where R is the resistance incident with
the L-section output port. Upon cascading the subject two circuits, the effective load imposed on
the bridge remains identical to the load resistance, R, originally connected to its output port in the
course of setting the bridge input resistance equal to R. In effect, the maintenance of constant
resistance at the input port of the second network precludes this second network from altering the
transfer function of the first circuit. It also ensures that the first circuit does not perturb the transfer characteristics of the second. Accordingly, the voltage transfer function, Vo(s)/Vs(s), of the
cascade in Figure (4) is
Za(s)
Zin(s)
R
R
Vo
Zb(s)
Vi


Fig. (4).
H(s) 
Zb1 (s)

V2
Vo
Za2 (s)
R
A Cascade Interconnection Of A Constant Resistance Bridge Network With A Constant Resistance Right L-Section Circuit.
Vo (s)
V (s) V (s) V (s)
 i  2  o
Vs (s)
Vs (s) Vi (s) V2 (s)
 R   1  Z a1 (s) R  

1
 


.
 R  Rs   1  Z a1 (s) R   1  Z a2 (s) R 
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R
Zb2 (s)
Vs
Za1 (s)
Vi
Z2 (s)
=R
Zin(s)
=R

Rs
A Tee Network Capable Of
Establishing Constant Input
Impedance, Zin(s), Independent
Of Signal Frequency.
Za1 (s)
Zb1 (s)
Fig. (3).
R
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The obvious advantage to a constant resistance strategy for passive filter synthesis is
that a relatively complex transfer function can be appropriately augmented and/or decomposed
into a product of transfer function factors that allow for straightforward network realizations.
Each of these factors corresponds to a network whose design entails little more than the
appropriate interconnection of synthesized two-terminal impedances. The cascade interconnection of the individual networks can then proceed without fear of interstage loading effects to
deliver the originally desired I/O transfer function. The shortfall to the technique is that the
process of decomposing a transfer function into two or more transfer function factors leads to a
cascaded circuit whose overall component count is invariably non-minimal. Although component count is rarely an issue with active devices deployed in analog integrated circuits, the need
to lay out numerous passive elements, and particularly inductors and small capacitances, can present daunting challenges[5],[6].
4.0.
DELAY FILTER REALIZATION
The constant resistance strategy sets the stage for dealing effectively with the realization of the delay filter whose transfer function is given by (6). To this end, it is convenient to
normalize the self-resonant frequency, ωp, to one radian-per-second and the ultimately desired
terminating load resistance, R, to one ohm, with the result that (6) becomes, in normalized format,
2

s
s 
1 
  
Qα  α  
H(s)  H(0) 
.

s
2 
s
 1

Q


(18)
In the topological realization that follows, this normalization implies that all resistances must be
multiplied by R ohms, all inductances must be scaled by a factor of R/ωp henries, and all
capacitances must be multiplied by 1/ωpR farads[7]. Moreover, the normalized value of the zero
frequency group delay is
D(0) 
1
1
1   ,
Q
α
(19)
which, by comparison with (12), means that the true delay requires that D(0) in (19) be multiplied by 1/ωp.
4.1.
FILTER SYNTHESIS
The synthesis task begins by augmenting (18) through multiplication of the numerator
and the denominator on the right hand side by the conjugate of the numerator; that is,

1 
H(s)
 

H(0)
1 

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2
2
s
s
 s  
s 
   1 
  
Qα  α   
Qα  α  


2 
s
 s   1  s  s2 
 
Q

Qα  α   
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 H1 (s) H 2 (s)  .
(20)
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The first constituent transfer function in this expression mirrors the I/O relationship of an allpass
network. It can be rewritten as
1
H 1 (s) 
1
s Qα
1  s α
s Qα
2
1  s α
2
,
(21)
which is advantageous in that this mathematical form mirrors that of the bridge network voltage
transfer relationship in (15). With R = 1 Ω, a comparison of (21) and (15) yields
Z a1 (s) 
s Qα
1  s α
2
1

Qα
Qs

s
α
.
(22)
It follows that the normalized impedance, Za1(s), in the requisite bridge circuit of Figure (1) is the
shunt interconnection of a normalized inductance, 1/Qα, and a normalized capacitance, Q/α.
Recalling (14),
Zb1 (s) 
1
Qα
Qs


,
Z a1 (s)
s
α
(23)
which implies a series interconnection of a normalized capacitance, 1/Qα, and a normalized
inductance, Q/α. The resultant bridge realization is depicted in Figure (5).
1
Q
Q

{
Zin(s)
=1

Vi

1
Vo
Q

Fig. (5).
Q

1
Q
1
Q
1
Q
Q

Normalized Allpass Bridge Network
Whose Voltage Transfer Function, Vo/Vi, Is
H1(s), As Given By (21).
The second transfer function, H2(s), in (20) can be expressed as
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s
s
1
 
Qα  α 
H 2 (s) 
s
1
 s2
Q
Choma
2
1

1


 α  1 s
s
2

  α 1  
 α Q
α
1
s
s
 
Qα  α 
2
.
(24)
2
Recalling (16) as the transfer function of the previously considered L-sections and tee network
and the stipulation that resistance R is normalized to one ohm, (24) suggests the need to realize
an impedance, Za2(s), given by


 α  1 s
s
2

  α 1  
 α Q
α
Z a2 (s) 
s
s
 
1
Qα  α 
2
.
2
(25)
The impedance, Za2(s), is realizable with positive resistances, capacitances, and inductances if
and only if the numerator and denominator polynomials on the right hand side of (24) satisfy the
Hurwitz criteria[8]. It can be shown that the application of this necessary and sufficient realization criteria produces the design constraints, α ≥ 1 and
Q 
1
α 1
.
(26)
Apart from satisfying the Hurwitz condition,
Q 
1
(27)
α 1
affords a relatively simple continued fraction expansion of (25) that captures a passive Za2(s)
realization featuring a component count that is smaller than the realization resulting from the
invocation of the general constraint stipulated by (26). Specifically,
Z a2 (s) 
1
 1  Q2

 1  2Q 2

Q
 
s

 1  2Q 2

 Q4


1
,

1  Q 2 1  2Q 2



Q5s

(28)

where (27) has been used to eliminate parameter α in the impedance expression. Figure (6a)
gives the normalized impedance realization implied by (28). The normalized topological structure of Zb2(s), which is simply the inverse of impedance Za2(s) in the tee or either of the two Lsections, is offered in Figure (6b).
Any of the networks in Figures (2) and (3) can now be exploited to synthesize a network that yields the second constituent transfer function, H2(s) in (20). To this end, let the left
L-section in Figure (2a) be selected. The resultant normalized delay topology, formed by
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cascading the bridge configuration in Figure (5) with the network in Figure (2a), is the circuit offered in Figure (7). In this realization, (27) is used once again to eliminate parameter α from the
branch element definitions in the bridge.
2
{
Za2 (s)
(12Q )
4
Q
(12Q 2)
Q(1Q 2)
Q5
(1Q 2)(12Q 2)
(a).
2
(12Q )
2
Q(1Q )
{
Zb2 (s)
Q
5
2
Q
2
4
2
(1Q )(12Q )
(12Q )
(b).
Fig. (6).
Q
1 Q 2
3
{
Zin(s)
=1

Vi

Q
1 Q 2
3
Q
2
1 Q
Fig. (7).
4.2.
(a). The Topology Of Impedance Za2(s) In The Tee Or
L-Section Subcircuits Of The Delay Filter. (b). The
Structure Of Impedance Zb2(s) In The Tee Or L-Section Subcircuits Of The Delay Filter.
5
3
Q
(12Q 2)
Q
4
2
2
2
Q
(1Q )(12Q )
1 Q
Vo
Q
2
1 Q
Q
2
1 Q
2
(12Q )
2
Q(1Q )
1
Q
1 Q 2
1
(12Q 2)
2
Q(1Q )
Q
5
3
(1Q 2)(12Q 2)
Q
2
1 Q
Q
4
2
(12Q )
Normalized Circuit Realization Of The Allpass Delay Filter Whose Transfer
Function, Normalized To The Zero Frequency Transfer Value, Is Stipulated By
(20).
FORMULATION OF FILTER DESIGN STRATEGY
Having forged an appropriate topology for the desired delay filter, the remaining tasks
are the development of a suitable design strategy and the computation of requisite branch eleJune 2006
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ment values in the structure of Figure (7). To these ends, only two design degrees of freedom
prevail. The first is the self-resonant frequency, ωp, to which the zero frequency delay is inversely proportional. From (12) and (27), the zero frequency delay metric, cast exclusively in
terms of ωp and quality factor Q, is
D(0) 

1
ωpQ 1  Q 2

.
(29)
The second design variable is Q, which in conjunction with (27), sets the passband of the magnitude response of the filter, the amount of peaking in the delay response, and the passband over
which the delay response remains flat to within user-defined tolerance. Because of the algebraic
complexity of both the magnitude and the delay responses, closed form analyses focused on
ascertaining optimal Q must succumb to computer-based investigations of pertinent analytical
results.
To the foregoing end, Figure (8) depicts the filter magnitude response implied by either
(6) or (7). As expected, the magnitude response does not degenerate to 3-dB under its zero frequency value for sufficiently large Q. Indeed, recall that α2 smaller than root two precludes 3-dB
of magnitude attenuation. From (27), this constraint on parameter α implies that Q ≥ 0.676 ensures an allpass magnitude response to within a deviation that does not exceed 3-dB.
Normalized Magnitude
1.2
Q = 0.6
1.0
0.8
Q = 0.7
0.6
Q = 0.5
0.4
Q = 0.3
0.2
0.0
0.01
0.03
0.10
0.32
1.00
3.16
10.00
Normalized Frequency, y
Fig. (8).
June 2006
Magnitude Response Of The Proposed Delay Filter For Various Values Of The
Filter Quality Factor, Q. The Normalized Frequency, y, Is The Radial Signal
Frequency, ω, Divided By The Self-Resonant Frequency, ωp. The Magnitude
Scale Is Normalized To The Zero Frequency Transfer Function Magnitude, H(0).
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Figure (9) offers the normalized filter delay, D(y)/D(0), as a function of the normalized
signal frequency, y, for several values of the filter quality factor, Q. Observe that progressively
larger Q-values incur correspondingly larger peaks in the delay responses. Furthermore, the
value of Q strongly influences the passband width over which the filter delay remains within
user-defined bounds. Typically, a delay response remaining constant to within ±20% proves
acceptable in many electronic system applications. Accepting the propriety of this contention,
Figure (10) portrays the passband width, normalized to the self-resonant frequency, ωp, over
which the normalized filter delay remains above 80% of its zero frequency value. Note that for
0.66 ≤ Q ≤ 0.71, the delay does not degrade to its arbitrarily invoked 80% cutoff metric until a
signal frequency of roughly 20% above the filter self-resonant frequency is reached.
Normalized Delay,  p D(y)
1.4
Q = 0.8
Q = 0.7
1.2
1.0
0.8
0.6
Q = 0.5
Q = 0.3
0.4
0.2
0.0
0.01
0.03
0.10
0.32
1.00
3.16
10.00
Normalized Frequency, y
Fig. (9).
Normalized Delay Frequency Response As A Function Of The Normalized Signal Frequency, y.
A delay passband stipulation in the absence of a delineated delay peaking percentage
corresponding to the desired passband comprises a hollow design specification. Accordingly, it
is essential that a plot be submitted to convey the percentage delay overshoot, with respect to the
zero frequency delay, as a function of the quality factor, Q. To this end, consider Figure (11),
which portrays this delay overshoot, say Md, as a function of filter quality factor, Q. Observing
that the dependence of Md on Q is almost linear over the considered range of quality factors, a
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least mean square error linear approximation to the curve proves expedient for design-oriented
applications. This approximation, which is depicted as the dashed curve in Figure (11), is
M d  206.8 Q  125.7 ,
(30)
where it is understood that an inserted quality factor, Q, returns Md in percent with respect to the
zero frequency value of the filter delay.
Normalized 80% Delay Passband
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.60
0.63
0.66
0.69
0.72
0.75
0.78
0.81
0.84
0.87
0.90
Quality Factor, Q
Fig. (10). Signal Frequency Passband, Displayed Normalized To The Filter Self-Resonant Frequency, ωp, And As A Function Of Quality Factor, Q, Over Which
The Filter Delay Degenerates To No More Than 80% Of Its Low Frequency
Value.
5.0.
DESIGN EXAMPLE
In an attempt to confirm the propriety of the foregoing analyses and corresponding design-oriented approximations, consider the task of realizing a passive delay filter offering a delay, Td0 = [D(0)] of 25 pSEC, such that the peaking (Md) in the delay response is not to exceed
15% over the filter passband. The filter is to be terminated at its output port in a resistance (R) of
300 Ω, while the Thévenin resistance (Rs) of its signal source is 50 Ω. The mismatch between
filter load resistance and signal source resistance obviously compromises maximum power transfer from signal -to- load. But as is often the case in RF applications that require passive delay
blocks, maximum power transfer is not a pivotal design issue.
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Delay Filter
(1).
(2).
(3).
(4).
USC Viterbi School of Engineering
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From (30), the requisite quality factor, Q, of the filter is Q ≈ 0.6804.
At this juncture, the values of all elements in the normalized filter realization shown in
Figure (7) can be computed.
Using (29), the filter is found to require a self-resonant frequency of ωp = 2π(17.4 GHz).
The reference values of resistance, inductance, and capacitance can now be determined
respectively as Rα = R = 300 Ω, Lα = Rα/ωp = 2.741 nH, and Cα = 1/ωpRα = 30.452 fF.
Accordingly, each normalized resistance, inductance, and capacitance computed in Step
Two of this design procedure must now be multiplied by Ra, Lα, and Cα, respectively, to
arrive at the final design realization. This finalized structure, complete with a 50 Ω signal source drive, is offered in Figure (12).
Delay Overshoot, M d , In %
70
60
Least Min. Squares
Linear Approximation
50
40
Delay
Overshoot
30
20
10
0
0.60
0.63
0.66
0.69
0.72
0.75
0.78
0.81
0.84
0.87
0.90
Quality Factor, Q
Fig. (11). Delay Overshoot Of The Proposed Filter As A Function Of The Filter Quality
Factor, Q. Superimposed On This Plot Is A Least Mean Square Linear
Approximation To The Overshoot Characteristic.
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17.9
38.6
50
103.9
111.4
Vo
3.5
300
0.6
300
(Load)
1.6

6.2
Vs

Choma
38.6
17.9
10.0
3.5
866.3
1.6
Fig. (12). Realization Of The Delay Filter Corresponding To The Considered Design
Example. All Resistances In The Network Are In Ohms, All Inductances
Are In Nanohenries, And All Capacitances Are In Femtofarads.
HSPICE simulations of the delay and magnitude responses for the considered delay filter are offered in Figures (13) and (14), respectively.
Fig. (13). HSPICE Simulation Of The Delay Response For The Filter Whose Schematic Diagram Appears In Figure (12).
(1).
June 2006
The simulation from which the delay response plotted in Figure (13) derives shows a
low frequency delay of 25.29 pSEC, which is 1.16% larger than the design goal of 25
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pSEC. This slight error can be attributed to the fact that all branch element values of the
filter have been rounded to their respective nearest tenth of a value.
The peak value of envelope delay is 28.82 pSEC, which is 15.28% above the zero frequency delay and 0.24% above the target peak.
The delay does not diminish to 80% of its low frequency value until the signal frequency reaches 20.46 GHz, which is 17.45% larger than the filter self-resonant frequency, fp = 17.4 GHz.
The simulation from which the magnitude response pictured in Figure (14) derives indicates a low frequency I/O transmission of –1.34 dB. This measurement suggests an
input impedance seen by the signal source of 300 Ω, since 300/350 = 0.857 = –1.34 dB.
The fact that this response value is maintained over a relatively broad frequency passband further confirms the anticipated result that the input impedance driven by the signal source is a broadband 300 ohms.
At 100 GHz, the magnitude response flattens and the I/O transmission factor is –3.93
dB, which is only –2.59 dB below the low frequency transmission value. In other
words, the magnitude response of the filter does not deteriorate to 3 dB below its low
frequency value for all signal frequencies up through at least 100 GHz.
(2).
(3).
(4).
(5).
Fig. (14). HSPICE Simulation Of The I/O Magnitude Response For The Filter Whose Schematic Diagram Appears In Figure (12).
6.0.
CONCLUSION
A second order alternative to classic Bessel-Thomson filter topologies has been developed analytically. The alternative incorporates second order right half plane zeros to increase the
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envelope delay traditionally afforded by Bessel-Thomson architectures. Moreover, the incorporated zeros achieve the laudable characteristic of a delay that is nominally independent of signal
frequency over relatively wide passbands. An example filter designed for 25 pSEC delay at low
frequencies is presented and verified through HSPICE simulations. This delay is constant to
within ±20% to beyond 20 GHz, while the magnitude response of the realized filter never drops
to 3-dB under its low frequency gain value. In addition to a delay rendered independent of bandwidth, the low (second) order example realization allows for relative design simplicity, which is
synergistic with such fundamental RF chip design goals as minimization of mismatch errors,
reduction of potential crosstalk among energy storage elements, and reduction of chip surface
area.
A potential disadvantage of the example filter realization is its inability to maintain a
common ground between the input and output ports of the delay configuration. While this shortfall assuredly precludes its utilization in single ended electronic systems, it does not limit its
utility in a wide variety of communication systems and the analog signal processing components
of adaptive networks. To wit, the circuits underpinning many of these systems and networks,
which invariably function as single ended structures, are often realized as balanced differential
topologies. Accordingly, the need for differential -to- single ended conversion necessarily arises
and to this end, the delay filter considered in this work provides such conversion with the added
bonus of realizing requisite envelope delay characteristics.
6.0.
[1].
[2].
[3].
[4].
[5].
[6].
[7].
[8].
June 2006
REFERENCES
B. P. Lathi, Modern Digital and Analog Communication Systems. New York: Oxford University Press, 1998, pp. 102-106.
W-K. Chen, Passive and Active Filters: Theory and Implementations. New York: John Wiley
and Sons, 1986, pp. 84-91.
J. Choma, Jr. and S. A. Witherspoon, “Computationally Efficient Estimation of Frequency
Response and Driving Point Impedance in Wideband Analog Amplifiers,” IEEE Trans. on Circuits and Systems, vol. CAS-37, pp. 720-728, June 1990.
N. Balabanian and T. A. Bickart, Electrical Network Theory. New York: John Wiley & Sons,
Inc., 1969, pp. 406-414 and pp. 461-462.
T. H. Lee, and S. S. Wong, “CMOS RF Integrated Circuits at 5 GHZ and Beyond,” Proc.
IEEE, vol. 88, pp. 1560-1571, Oct. 2000.
C. P. Yue and S. S. Wong, “On-Chip Spiral Inductors With Patterned Ground Shields for SiBased RF IC’s,” IEEE J. Solid-State Circuits, vol. 33, pp. 743-752, May 1998.
J. Choma, Jr., Electrical Networks: Theory and Analysis. New York: Wiley-Interscience, 1985,
pp. 655-657.
G. C. Temes and J. W. LaPatra, Circuit Synthesis and Design. New York: McGraw-Hill Book
Company, 1977, pp. 44-49.
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