RESEARCH PROPOSAL
PERFORMANCE EVALUATION OF EDGE DETECTION
IMPLEMENTATIONS ON AN FPGA AND IN SOFTWARE
USING HAND MADE EDGED IMAGES
Student: Irwan Ramli
LMCP (ID 100107648)
Supervisor: Dr. Grant Wigley
School of Computer and Information Science
UNIVERSITY OF SOUTH AUSTRALIA
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Abstract
Edge detection is one of the most important parts of image processing, analysis, and
recognition. It is used to produce something like a line drawing of an image. The process
of detecting edge should be done correctly, the exact edge should not be missed, and the
non-edge should not be recognized as an edge, and the edge should be located on the
right place (He & Zhang 2007).
There are three ideas to evaluate the performance of the edge detectors; the comparison
method should be done using the real images, the evaluation method should produce
results that correlate with the perceived quality of edge images, and the edge detectors
should be evaluate within a vision system performing a task (Heath et al. 1997). Since the
decision of the correctness is much better decided by human than machines, this
motivates this proposed research to compare the result of edged image that produced by
two edge detection algorithms; an improved Canny edge detector (He & Zhang 2007) and
a new edge detection approach based on image context analysis (Yu & Chang 2006) to
the hand edged image that produced by human which are defined in advance in both
software and FPGA based.
Some methodologies need to be conducted to achieve the objective of this proposed
research, such as defining the hand made edged image, studying the algorithms that will
be used in the implementation on both software and FPGA based, and evaluating the
correctness of the edged image produced by each algorithm. This proposed research is
supposed to have a good impact for future work such as images or objects recognition or
identification.
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Table of contents
Abstract .............................................................................................................................................. 2
Table of contents ................................................................................................................................ 3
1. Introduction .................................................................................................................................. 4
1.1
Motivation .............................................................................................................................. 5
1.2
Research Question ................................................................................................................ 7
1.3
Scope and Contribution ......................................................................................................... 7
2. Literature Review ......................................................................................................................... 8
2.1
Performance evaluation of edge detection on software ........................................................ 8
2.2
The implementation of the edge detection algorithm on FPGA ............................................ 9
2.3
The performance comparison between the implementation of edge detection algorithm on
FPGA based and software based ................................................................................................ 11
2.4
Advanced implementation of image processing algorithm and reconfigured FPGA ........... 13
3. Methodology .............................................................................................................................. 14
3.1
Hand made edged image .................................................................................................... 14
3.2
Edge detection algorithms ................................................................................................... 15
3.2.1
The introduction of the improved Canny edge detection algorithm ........................... 15
3.2.1.1
Self-adaptive threshold value setting .................................................................. 16
3.2.1.2
The methodology of improved Canny algorithm ................................................. 16
3.2.2
A new edge detection approach based on image context analysis .......................... 18
3.2.2.1
GAP predictor ...................................................................................................... 18
3.2.2.2
The methodology of new approach of edge detection algorithm based on image
context analysis ................................................................................................................... 19
3.3
The correctness evaluation of edge position....................................................................... 21
3.4
Expected outcomes ............................................................................................................. 21
3.5
Future work.......................................................................................................................... 22
4. Schedule .................................................................................................................................... 23
5. References ................................................................................................................................. 25
6. Bibliography ............................................................................................................................... 28
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1. Introduction
Edge detection is one of the most important parts of image processing, analysis, and
recognition. It is used to produce something like a line drawing of an image. The real
object that has various colors on its surface can be captured to produce an image, and the
result of this could be different depend on the intensity of the light and the angel of the
capturing device when the object is being captured. This has a big impact on producing
the edge of the image that has been captured, while the process of detecting edge should
be done correctly, the exact edge should not be missed, and the non-edge should not be
recognized as an edge, and the edge should be located on the right place (He & Zhang
2007).
The edge detection algorithm has been developed since more than four decades ago, and
they are classified into five categories (Sharifi, Fathy & Mahmoudi 2002). Those are:
1. Gradient or Classical edge detectors, which contains classical operators and uses
first directional derivative operation such as Sobel (1970), Prewit (1970), Kirsch
(1971), Robinson (1977), Frei-Chen (1977), Deatsch and Fram (1978), Nevatia
and Babu (1980), Ikonomopoulus (1982), Davies (1986), Kitchen and Malin
(1989), Hancock and Kittler (1990), Woodhall and Linguist (1998), and Young-won
and Upda (1999).
2. Zero crossing, which uses second derivative and includes Laplacian operator.
3. Laplacian of Gaussian (LoG), which combines Gaussian filtering with the
Laplacian.
4. Gaussian edge detectors, which is symmetric along the edge and reduce the noise
by smoothing the images.
5. Colored edge detectors, which are divided into three categories output fusion
method.
Sharifi, Fathy & Mahmoudi (2002) clarify some advantages and disadvantages of each
edge detector above as well. The advantage of Gradient or Classical edge detectors is the
simplest algorithm, but they are sensitive to noise and inaccurate in detecting the edges.
While the Zero crossing has an advantage by having the fixed characteristics in its all
direction, but it is sensitive to noise as well. Laplacian of Gaussian can be used to find the
correct places of the edges and to test wider area around the pixel, but it can not finding
the orientation of edge because of using the Laplacian filter. Another detector is Gaussian
which uses probability to find the error rate, localization and response, to improve signal to
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the noise ratio, and gives better detection especially in noise conditions, but the
computational process is very complex and time consuming. The last one is Colored edge
detector which is more accurate in detection the edges and more efficient in object
recognition, but the computational process is very complex as well.
Nowadays, the use of edge detection which has a significant impact on image processing
that has been implemented in many areas; it is not only in academic areas but also in
industries. For example, a goal of achieving 100% quality assurance of all parts,
subassemblies, and finished goods is an obligation for mass-production manufacturing
facilities. Since the inspection is done by human, it will give a big time consuming, and
increase the processes’ costs (Rosas, de Luca & Santillan 2005). But, by the image
processing application, those problems can be solved, and automatic systems can handle
the human responsibilities in the inspection.
The automatic systems that can be used to handle the human activities should have a
very small error, or very close to zero. It should have a capability to doing its process with
high speed processor. While since it was developed, the image processing algorithms
have been implemented based on software. Nowadays, the high performance machines
are needed to do the computational processes that become more complex due to the
needs of good quality in the detection process. Due to this, the FPGA is one attractive
alternative solution.
There is one the most important thing before deciding to choose the edge detection
algorithm for images or objects identification or inspection to handle the human activities.
That is the need of evaluation in term of the accuracy of the edge detection results.
1.1 Motivation
Shin et al. (2001) say that due to the ease of to have reliable pixel-based ground truth is
motivated them to using the synthetic images in their research, but Heath et al. (1997)
claim that there are three ideas to evaluate the edge detector methods; the comparison
method should be done using the real images, the evaluation method should produce
results that correlate with the perceived quality of edge images, and the edge detectors
should be evaluate within a vision system performing a task. It is clear that for this
proposed research, the real images that will be captured from the real objects should be
used. Even though the performance analysis is difficult to be done, some minimum factors
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could be involved in the process, such as the algorithm itself, the type of images used, the
edge detector parameters used, and the methods to evaluate the edge detectors.
Due to the advantage of rapid prototyping and ease of verification, the FPGA is a good
choice to implement the image processing (Hsiao et al. 2006). Some related works tried to
compared the performance of edge detection in term of speed evaluation between an
FPGA based and software based such as (Daggu Venkateshwar & Muthukumar 2004),
(Muthukumar & Rao 2004), and (Wenhao & Kui 2008), and some others have just
compared the performance of each algorithm based on software by using the different
ways of evaluation, such as Shin et al. (2001), Sharify, Fathy, & Mahmoudy (2002), and
Yu, Y-H, and Chang (2000). While Verderber, Zemva & Trost (2001), Hirai et al. (2005),
Pei-Yung et al. (2005), Rosas, de Luca & Santillan (2005), Jay (2006), Abbasi & Abbasi
(2007), Bin Mohamed Shukor, Lo Hai & Sebastian (2007), and Yasri, Hamid & Yap (2008)
just tried to implement the edge detection algorithm on the FPGA. On the other hand,
some works related to the implementation of image processing based on reconfigurable
hardware have been done as well (Hsiao et al. (2006), Lapalme, Amer & Wang (2006),
and Lorca, Kessal & Demigny (1997)).
An improved Canny edge detector that uses the self-adaptive threshold method has been
conducted in term of performance analysis by doing comparison between software and
hardware based such as (Wenhao & Kui 2008), while a new edge detection approach
based on image context analysis has just been implemented on the software based, and
claimed as a better algorithm compared with others (Yu & Chang 2006). These two
previous work (Yu & Chang 2006) and (Wenhao & Kui 2008) which are claimed have a
better performance with no comparison between them influence this proposed research to
implement these new approach, and doing the correctness comparisons in term of
performance analysis on both hardware (FPGA) and software based.
Due to the decision of the correctness is much better made by human compared with
machines, this is motivated this proposed research to compare the result of edged image
that produced by those two edge detection algorithms to the hand edged image that
produced by human which are defined in advance in both software and FPGA based.
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1.2 Research Question
The edge detection application is very useful in computer vision research area. The need
of high speed computational process of image processing, pattern recognition, or object
inspection lead this proposed research to apply the edge detection algorithm into an
FPGA which has the ability of parallelizing the processes, high computational density, and
the availability of large amount of memory (Bin Mohamed Shukor, Lo Hai & Sebastian
(2007), and Abbasi & Abbasi (2007)).
Even though the FPGA has the high speed computational process compared to the
computers, the correctness of the result of the edge detection algorithm should be
measured as well. This is an important part before deciding to implement the object or
pattern recognition into the FPGA or computer based in the next step of image
processing. To answer this, the proposed research has a main question; how precise are
the edge detection algorithms to find the exact edges of the image? When the result of
this proposed research is achieved, the next step of image processing like an image or
object recognition or identification can use the best algorithm rather than doing any other
comparison.
1.3 Scope and Contribution
Due to some previous works related to performance analysis and evaluation between
some edge detection algorithms have been implemented and show that Canny edge
detector has a good performance compared with others, while there is no comparison
between an improved Canny edge detector that has been implemented by Wenhao & Kui
(2008) and a new edge detection approach based on context analysis that has been done
by Yu & Chang (2006), this proposed research will use those two new improved
algorithms in both FPGA and software based. The hand made edged image will be used
in this proposed research to compare the correctness of the edge detection result of those
two algorithms.
The result of this proposed research could give a contribution in deciding which algorithm
can be used in term of object or image recognition or inspection for further works.
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2. Literature Review
Some related works are discussed in this section. Firstly, some previous works related to
the performance evaluation of some edge detection algorithms will be presented, and then
followed by some works related to the implementation of edge detection on the FPGA, the
comparison of the performance of some edge detection algorithms on FPGA and software
based. Some related works on the implementation of new approach in edge detection
area will be provided, and finally, some works related to reconfigurable FPGA will be
presented in this proposed research to prove that an FPGA is a good choice in
implementing image processing due to it some good capabilities compared to computers
or general purposed microprocessors.
2.1 Performance evaluation of edge detection on software
Heath et al. (1997) claim that even though it is difficult to access the performance of edge
detection algorithm, there are at least four minimum factors that are considered to
measure its performance; those are the algorithm itself, the type of image used, the edge
detector used, and the method to evaluate the edge detectors. There are some previous
ways used to evaluate the edge detection method. First of all, a theoretical evaluation
instead of algorithm and then evaluation using ground truth method. Theoretical
evaluation is applying a mathematical analysis instead of its algorithm that is being
applied to the images. This method is used to characterize the input signals and the noise,
but this evaluation method is being difficult for very complex algorithm of modern edge
detection methods. While the evaluation method using ground truth is used to compare
the differences between the detected edge and the ground truth. This is applied by
measuring the ratio of the number of the correctly detected edge pixels divided by the
number of detected edge pixels and the fraction of a line covered by edge pixels. But this
method depends on the ground truth that make it just relies on the synthetic images or
simple real images because these kinds of images make it easy to specify the ground
truth. Liu & Haralick (2000) says that the algorithm that has the best performance is the
one whose output is closest to the judgment. They used the assignment based method
and the distance based method to compare the declared edge map with the ground truth
edge map, while the performance are measured by the number of misdetected edge
pixels, number of false alarms, and the root-mean-squared errors of localization error for
those two methods.
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On the other work (Shin et al. 2001) has compared and evaluated eight edge detection
algorithms; Anisotropic, Bergholm, Canny, Heitger, Rothwell, Sarkar, Sobel, and Susan
using from motion task algorithm. This algorithm determines the structure of a scene and
the motion of the camera. The performance of edge detector is measured by how
accurate the SFM (Structure from Motion) motion recovers the known structure and
motion from the edge detection of the image sequences. To minimize the objective
function that measures disparity between the projected-3D line and its corresponding
observed-2D line, the SFM algorithm iterates searching for the structure and motion
estimates. The SFM generates the initial random guess of camera position for each
iteration using the initial motion information, and this algorithm usually manages to
converge to a solution but after a great number of iterations. To speed up the optimization
process, the ground truth has been used as a good initial guess. The result shows that the
Canny edge detector is the best test performance and the best robustness in
convergence. It is also faster in executing the algorithm. While Sharifi, Fathy & Mahmoudi
(2002) classify and compare five edge detectors such as gradient edge detectors, zero
crossing, Laplacian of Gaussian (LoG), Gaussian, and Colored edge detectors. They used
signal to noise ratio (SNR) and average risk (AVR) as parameters in comparison the
performance. Sharifi, Fathy & Mahmoudi (2002) claim that Canny edge detector has the
best performance compared with others, but it requires more computational process.
2.2 The implementation of the edge detection algorithm on FPGA
The work of the real-time implementation (Bin Mohamed Shukor, Lo Hai & Sebastian
2007) is motivated by the potential of FPGA by having parallel and high computational
density compared to general purpose microprocessor. Their implementation shows the
edge of the objects can be produced in real time by comparing the first and second input
pixel at the same time. They used Altera Quartus II on DE2 FPGA development board,
and 1.5 MP Terasic CMOS camera. There are some steps need to be done in their
implementation, first of all is loading the image data from SDRAM, secondly is setting the
gray scale level, then detecting the edge on horizontal and vertical axis, continued by
combining that horizontal and vertical edge results, and finally, load the image data from
the SRAM to the on board memory of FPGA that can be shown on the screen. While
Abbasi & Abbasi (2007) say that due to the availability of large memory of FPGA was
motivated them to implement the edge detection algorithm on it. They used Sobel edge
detection algorithm which is based on a first derivative operation and the simplest one to
implement it on the FPGA. With the size of 512 x 512 test images which has 256 gray
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scale, they system can calculate the edge of the image in 2.65ms with 99.49 MHz clock.
On the other hand, the performance analysis has been investigated in the implementation
of edge detection based on Sobel edge detection algorithm on FPGA. This shows that it
can be operated successfully at 27 MHz clock (Yasri, Hamid & Yap 2008).
Another advanced work (Rafla 2007) implements Soble edge detection algorithm
combined with the genetic algorithm to perform the reconfiguration operation on the same
FPGA. This means the needs of the architecture that can change its behavior dynamically
to adapt the changes in the surrounding environment. The process is started by selecting
a set of chromosomes stored in an array of registers, and then a fitness value calculated
using the outputs of a pre-specified set of inputs and the threshold. This process is
repeated for all other configurations in the initial population and a new better population is
generated. This just shows that the FPGA can accept some kinds of the bit stream
configuration that has been produced. There are no any performance evaluations in this
project.
The work on real-time vision (Hirai et al. 2005) is one example of the implementation of
edge detection on the FPGA whereas they designed a special logic circuit for vision
algorithm and then implemented that logic circuit on an FPGA. The hardware they used is
a FPGA board Xilinx Vertex 2000-E, a video decoder and encoder, SRAM, and PC
interface. While the algorithms they used are designed using C/C++, and the CycleC is
used as the system compiler to translate the C/C++ language into HDL description. There
are three vision algorithms are used in the implementation such as the computation of the
image gravity center, detection of object orientation using a radial projection, and the
computation of Hugh transform. The comparison between the algorithm which running on
FPGA and on software based are no shown in this project.
Canny cited in (Pei-Yung et al. 2005) says that there are three important factors to
evaluate the performance of edge detection; the ability to resist noise, the ability to mark
edge points as close as to the center of the true edge, and the connectivity and
completeness of detected edges. In their research, they compared non-gradient based
LGT (Local and Global Threshold) and gradient-based ADM (Absolute Difference Mask)
algorithm. The LGT is a threshold-based algorithm which locates edge points of images
using statistical and global threshold values, while the ADM algorithm is a noise-immune
three stage algorithm that are passing the inputted images through the semi-Gaussian
smoothing unit, and then that image is used to detect the edge strength and edge
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detection, and finally the edge points of the original images is obtained using those edge
strength and edge detection. The comparison shows that LGT algorithm is more sensitive
to the fore-scene edge, while ADM algorithm provides more complete edge mapping of
the original images.
Other kind of related work has been done by implementing the 2D DFT (Discrete Fourier
Transform) (Verderber, Zemva & Trost 2001). This will be an efficient way for filtering an
image if the size of image is relatively small (8 x 8) pixels. Due to this, to process the large
size of image, it should be divided into some pieces depend on its size. The partial images
are then converted 2D DFT domain, and then applying a filtering process by doing point
by point multiplication. The filtered partial image is then converted back to spatial domain
by implementing 2D IDFT (Inverse Discrete Fourier Transform) operation. At the end, the
partial images combined back together to be one single image. This algorithm has been
implemented on the software based first, and then implemented on the FPGA without any
comparison in term of performance between them. The result shows the algorithm is
executed successfully in real time processing, but the problem is the delay between circuit
block within the FPGA and all internal signals. This can be solved by synchronization
between them.
The advantage of the FPGA’s capabilities of parallel processing to reduce the time
needed has been investigated to handle the human inspection in manufacturing industries
(Rosas, de Luca & Santillan 2005). This research used two external memories which are
connected to one FPGA. The first external memory is used to store the image that is read
by a CMOS sensor, and the second one is to store the image that is processed by the
FPGA, while the Sobel edge detector was used in their implementation.
2.3 The performance comparison between the implementation of
edge detection algorithm on FPGA based and software based
The specific hardware implementation offers much greater speed than a software
implementation, and with the VLSI (Very Large Scale Integrated) the hardware technology
has become an attractive alternative (Muthukumar & Rao 2004), and HDL (Hardware
Design Language) has been used traditionally to configure the FPGA. A new C like
hardware design language called Handle-C that is introduced by Celoxica has been used
to implement the edge detection algorithm on FPGA in their research. Muthukumar & Rao
(2004) has done the comparison between three different image processing algorithms;
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Median filter, Gaussian convolution, and edge detection. Those algorithms are compared
based on running on FPGA and software. First of all, the Median filter is used in their
implementation due to its capability to remove impulse noise effectively. This filter is
operated by sliding a window of odd size (3 x 3) over an image. The value of the pixel
image are sorted as a sample at each window position, and the median value of the
sample is taken as the output and replace the value of the pixel image at that position.
The result shows that the algorithm can be executed successfully on the FPGA 19.92 time
faster than on computer based Pentium III 1300MHz. Then the Gaussian convolution
algorithm uses a window with some finite size to scan over an image, and the weight sum
of the input pixels within the window are the result value of the convolution process. This
algorithm shows that it is 11.83 times faster running on the FPGA compared with running
on computer based Pentium III 1300MHz. Finally, the basic edge detection algorithm has
been implemented within four stages; image smoothing, vertical and horizontal gradient
calculation, directional non maximum suppression, and threshold. The result of this
algorithm shows that FPGA has 11.19 times faster compared with computer based
Pentium III 1300MHz.
On the other research, Daggu Venkateshwar & Muthukumar (2004) get similar
comparison, and claim that the implementation of edge detection on reconfigurable
hardware can minimize the time-to-market costs, enable rapid prototyping of complex
algorithms, and simplify debugging and verification processes. Some general steps of
edge detection algorithm such as image smoothing, vertical and horizontal gradient
calculation, and threshold should be implemented similar to the implementation on the
software based. The Gaussian convolution and 2-D first derivative operator has been
used respectively in implementing image smoothing. The input of 2-D first derivative is
based on the output of Gaussian convolution. The result shows that the edge detection
running on FPGA is 22.38 times faster than running on computer based Pentium III
1300MHz, and this algorithm is exactly 2 times faster compared to (Muthukumar & Rao
2004).
On the other hand, due to the threshold in the traditional edge detection algorithm should
be set manually, the self-adapted threshold Canny has been proposed to solve that
problem (Wenhao & Kui 2008). This algorithm uses a flat that is shown between the
background peak and the first edge peak in the histogram. The flat part is located by
convert the gradient magnitude histogram into difference histogram. This is one method
that can be implemented in this proposed research.
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2.4 Advanced implementation of image processing algorithm and
reconfigured FPGA
Some other advance works related to the implementation of image processing on the
FPGA have been implemented. Draper et al. (2000) improved the image processing
algorithm using the SA-C, this is a single-assignment variant of the C programming
language. The algorithm is written using SA-C and then converted automatically into HDL
and compiled into the FPGA. While the design of hardware that make it has a capability to
processing an image using a high-resolution CCD sensor has been implemented by
Hussmann & Ho (2003).
In term of the reconfigurable architecture of an FPGA, a hardware architecture of the
Sobel edge detection algorithm has been presented on the project named FPGA in a
vehicle collision avoidance system (VCAS) (Li, Zhao & Wang 2003), and on the line
detection system (Dongkyun et al. 2008). While the architecture of lane detection has
been done by Pankiewicz, Powiertowski & Roszak (2008), a method for modeling and
FPGA implementation of non-static has been applied by Nikolov, Stefanov & Deprettere
(2005), and the issues arising due to the resource constraints of the FPGA has been
investigated by Memik, Katsaggelos & Sarrafzadeh (2003). These all show that an FPGA
is the best alternative to implement the image processing compared with the computer
regarding some issues such as costs and speeds.
On the other hand, by reconfiguring the FPGA, the use of memory size can be reduced
using Deriche filter (Lorca, Kessal & Demigny 1997), and the speed of algorithm
processing can be increased much faster than computer by pipelined its processes (Hsiao
et al. 2006). Lapalme, Amer & Wang (2006) has been successful to implement the noise
estimation of real-time video by reconfiguring their own architecture, and one advanced
work by exploiting the I/O bandwidth has been investigated successfully by Miaoqing et al.
(2008).
Those kinds of reconfigurable FPGA have proved that it has a good performance to
implement the image processing compared with the computer based, but it will be useful
after the best algorithm is known. This means that the future work will be conducted to
reconfigure the FPGA using the best algorithm based on the result of this proposed
research.
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3. Methodology
The objective of this proposed research is to answer how precise the edge detection
algorithms to find the exact edges of the image are. The experiment will be conducted by
comparing the edged image which is produced by the edge detection algorithm and the
hand made edged image. Some methodologies need to be conducted to achieve the
objective of this proposed research, such as defining the hand made edged image and the
algorithms that will be used in the implementation on both software and FPGA based.
3.1 Hand made edged image
The definition of hand made edge image is the edged image that is drawn manually. The
flow chart below explains how to produce the hand made edged image.
start
A
Image
capturing
Hand made
edged image
scanning
Image printing
Edged image
drawing
manually
A
Store the position of
hand made edged image
into the memory
start
Fig.1 Hand made edged image producing
First of all, the real object needs to be captured; then the captured image needs to be
printed, and then draw the edge of the image by following that printed image. The next
step is scanning the hand made edged image, than read each pixel of the image, and
store its value into the file. This file will be stored into the hard drive of computer, while
each value of pixel will be store into the memory of the FPGA.
The most important part of hand made edged image processing is to choose the
appropriate tool to draw the edge of the image manually. Some experiments of this need
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to be done because of the drawing tool have to have the similarity of the thickness of the
pixel.
3.2 Edge detection algorithms
Two edge detection algorithms will be evaluate in term of the correctness of the edged
result in this proposed research. The first is an improved Canny edge detectors (Wenhao
& Kui 2008), and the second is the new edge detection approach based on image context
analysis (Yu & Chang 2006).
3.2.1 The introduction of the improved Canny edge detection
algorithm
The Canny edge detector is considered as a standard method of edge detection algorithm
(Shin et al. 2001), and devised to be an optimal edge detector (Yu & Chang 2006). While
the improved Canny edge detector use the self-adaptive threshold edge detector to
minimize some spurious edges (Wenhao & Kui 2008). This has been implemented on the
FPGA, and not been compared to the software based yet.
The basic idea of this improved Canny edge detector is to obtain the self adaptation of the
threshold value in the traditional Canny algorithm. Even though the traditional Canny edge
detector can give a good result in detecting the edge of image by adjusting the value of
the threshold manually, this will be difficult since the edge-to-ground ratio can not be
predicted in advanced.
Fig. 2 Gradient magnitude histogram (Wenhao & Kui 2008)
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Figure 2.a above shows one of the gradient magnitudes of histogram of a ceiling image
after NMS (Non-Maximum Suppression) stage, and figure 2.b shows the enlargement of
figure 2.a. The similar histograms are also given for some kinds of illumination condition of
the images. Wenhao & Kui (2008) found that this kind of histograms has some following
properties, such as:

There is a large peak near the origin in the histogram which corresponds to the
background of the image.

There is the similarity intensity between the edge pixels which form a series of little
peaks in the histogram and each peak which corresponds to a class of edges.

There is a flat part between the background peak and the first edge peak in the
histogram, where this part is usually chosen for the threshold in the traditional
Canny algorithm.
3.2.1.1
Self-adaptive threshold value setting
The basic idea of the self-adaptive threshold value is to locate the flat part in the gradient
magnitude histogram by converting it into a difference histogram.
The equation above (Wenhao & Kui 2008) shows how to convert the gradient magnitude
histogram into a difference histogram, and NMS(i) is used as the output of the NMS
operator. The value of threshold will be chosen from the gradient magnitude of the firstzero crossing point, it needs to be calculated as the following equation (Wenhao & Kui
2008).
3.2.1.2
The methodology of improved Canny algorithm
Wenhao & Kui (2008) implement this improved Canny algorithm into an FPGA. There are
some stages need to be done to implement this algorithm, such as image smoothing,
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gradient calculation and non-maximum suppression (NMS), calculating 2 threshold, and
threshold with hysteresis.
Fig. 3 Design flow of improve Canny edge detection algorithm
Firstly, the image smoothing is done by implementing the Gaussian convolution using 5 x
5 moving window. The output of this stage is used for the next stage, gradient calculation
and directional non-maximum suppression. Since the actual images are always discrete,
Wenhao & Kui (2008) define the direction as vertical, horizontal, left-diagonal, and rightdiagonal of the 3 x 3 adjacent window of the current pixel, and then the first-derivative of
each direction is calculated using the following equation.
Next stage is threshold calculation. Due to this improved algorithm has been implemented
on the FPGA, the analysis of the general algorithm should be done if it will be
implemented on the software based. In this stage, the pixel with certain gradient
magnitude will be taken as the address of the registers array, and the content of this
register will be then accumulated by 1. The difference which is calculated between the
content of the register and the next address register will be compared by a comparison
unit with 0, if the difference is 0, a stop signal will be generated to stop the accumulating
process, and will be continued if not. The last stage is the threshold with hysteresis. The
two thresholds which are high (Thh) and low (ThL) are employed in this stage. If the
gradient magnitude of f1(I, j) is above Thh set f1(I, j) to be 1, otherwise set as 0. If the
gradient magnitude between Thh and Thl set f2(I, j) to be 1, else set it to be 0. f1
represents the strong edge image, while f2 represents the weak edge image.
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3.2.2 A new edge detection approach based on image context analysis
This new approach has four main stages; color to grayscale image transformation,
prediction, threshold, and thinning. The image context analysis in this algorithm is based
on gradient-adjusted prediction (GAP) which is adopted in context-based adaptive
lossless image coding (CALIC). A context which is used in the GAP predictor is a
combination of the intensity value of neighboring pixels that have already processed and a
template to produce the predictive values. This is used to define whether the current pixel
is an edge or not (Yu & Chang 2006).
3.2.2.1 GAP predictor
The GAP is a nonlinear predictor that can make itself adapt to the intensity gradients near
the pixel to be predicted (Yu & Chang 2006).
Fig. 4 Template used by GAP (Yu & Chang 2006)
GAP uses the gh and gv that are shown on the equation above (Yu & Chang 2006) to
compute the gradient of intensity near the current pixel in the horizontal and vertical
direction. While the detection of the magnitude and orientation for an edge across the
casual template is based on the difference of gh and gv.
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Yu & Chang (2006) give an algorithm of GAP prediction procedure that is shown below.
3.2.2.2 The methodology of new approach of edge detection algorithm
based on image context analysis
Firstly, the input color image is transformed into grayscale image. The predictive error
values are then produced by applying the image is fed into the GAP predictor. The pixels
in the image are classified into two groups using a fixed threshold TH1. If a pixel whose
corresponding absolute value of the predictive error value is greater than or equal to TH1,
it will be classified as an edge point and marked as ‘0’. Otherwise, it will be classified into
non-edge point and marked as ‘255’. A thinning procedure is involved to thin the edges.
The intensity variations of the original edge image are scanned in horizontal and vertical
directions, and then a combination operation of resultant edge is performed using the OR
logical operation to produce the final edge image. In general, this new approach process
is shown on the flowchart below.
Fig. 5 The flowchart of new approach (Yu & Chang 2006)
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Fig. 6 An example of the prediction and threshold process (Yu & Chang 2006)
Fig. 7 An example of thinning process (Yu & Chang 2006)
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3.3 The correctness evaluation of edge position
How precise those two algorithms in detecting the edge of an image are will be evaluated
in this proposed research.
start
start
Capturing the
real image
Capturing the
real image
Image processing
using 1st Algorithm
Image processing
using 2nd Algorithm
The correctness
comparison
Hand made
edged image
The correctness
comparison
Which algorithm
is the best?
end
Fig. 6 The correctness evaluation procedure
Figure 6 above shows the procedure that will be conducted to evaluate the correctness of
edged image that is produced by each algorithm compared with the hand made edged
image. The comparison will be done by checking the similarity of the position of each pixel
of the edged image from the algorithm and the hand made edged image.
3.4 Expected outcomes
This proposed research is expected to give a contribution in image or object recognition or
identification. After the comparison process between two algorithms that have been
explained on point 3.3 and 3.4 on both software and FPGA based, the result is supposed
to show which algorithm will give the best performance in term of the correctness of edge
position from the edged image that is produced by each algorithm.
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3.5 Future work
The opportunities of future work can be predicted now, even though the expected
outcome has not been achieved yet. Automatic number plate recognition is an example of
further work that can use the outcome of this proposed research. The best algorithm and
machine will be used in the implementation of future work which is focusing in the real
time automatic number plate recognition.
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4. Schedule
Month of
No
Activities
2009
8
1
9
10
2010
11
12
1
2
3
4
5
6
7
Choosing and evaluating the best tool for Hand
made edge image
2
Selecting the available camera and FPGA board
3
Designing and writing an algorithm to read and
store the hand made edged image using C/C++
into a file
4
Designing and writing an algorithm to compare two
edged image in C/C++
5
Studying and consulting to the author of improved
Canny edge detection algorithm
6
Writing and implementing improved Canny edge
detection algorithm in C/C++
7
Testing the improved Canny edge detection
8
Studying and consulting to the author of new
approach of edge detection algorithm based on
image context analysis
9
Writing and implementing new approach of edge
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Month of
No
Activities
2009
8
9
10
2010
11
12
1
2
3
4
5
6
7
detection algorithm based on image context
analysis in C/C++
10
Testing the new approach of edge detection
algorithm based on image context analysis
11
Comparing and analyzing the result of point 7 and
10
12
Writing and implementing improved Canny edge
detection algorithm in an FPGA
13
Testing the improved Canny edge detection
14
Writing and implementing new approach of edge
detection algorithm based on image context
analysis in an FPGA
15
Testing the new approach of edge detection
algorithm based on image context analysis
16
Comparing and analyzing the result of point 13 and
15
17
Comparing and analyzing the result of point 11 and
16 as the final comparison
18
Writing report
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5. References
Abbasi, TA & Abbasi, MU 2007, 'A novel FPGA-based architecture for Sobel edge
detection operator', International Journal of Electronics, vol. 94, no. 9, pp. 889-896.
Bin Mohamed Shukor, MN, Lo Hai, H & Sebastian, P 2007, 'Implementation of real-time
simple edge detection on FPGA', paper presented at the Intelligent and Advanced
Systems, 2007. ICIAS 2007. International Conference on.
Daggu Venkateshwar, R & Muthukumar, V 2004, 'An efficient reconfigurable architecture
and implementation of edge detection algorithm using Handle-C', paper presented at the
Information Technology: Coding and Computing, 2004. Proceedings. ITCC 2004.
International Conference on.
Dongkyun, K, Seung Hun, J, Nguyen Tuong, T, Ki Hoon, K & Jae Wook, J 2008, 'A realtime finite line detection system based on FPGA', paper presented at the Industrial
Informatics, 2008. INDIN 2008. 6th IEEE International Conference on.
Draper, B, Najjar, W, Bohm, W, Hammes, J, Rinker, B, Ross, C, Chawathe, M & Bins, J
2000, 'Compiling and optimizing image processing algorithms for FPGAs', paper
presented at the Computer Architectures for Machine Perception, 2000. Proceedings.
Fifth IEEE International Workshop on.
He, Q & Zhang, Z 2007, 'A new edge detection algorithm for image corrupted by WhiteGaussian noise', AEU - International Journal of Electronics and Communications, vol. 61,
no. 8, pp. 546-550.
Heath, MD, Sarkar, S, Sanocki, T & Bowyer, KW 1997, 'A robust visual method for
assessing the relative performance of edge-detection algorithms', Pattern Analysis and
Machine Intelligence, IEEE Transactions on, vol. 19, no. 12, pp. 1338-1359.
Hirai, S, Zakoji, M, Masubuchi, A & Tsuboi, T 2005, 'FPGA-Based Realtime Vision
System', Journal of Robotics and Mechatronics, vol. 17, no. 4, pp. 1-10.
Hsiao, PY, Chen, CH, Wen, H & Chen, SJ 2006, 'Real-time realisation of noise-immune
gradient-based edge detector', Computers and Digital Techniques, IEE Proceedings -, vol.
153, no. 4, pp. 261-269.
Hussmann, S & Ho, TH 2003, 'A high-speed subpixel edge detector implementation inside
a FPGA', Real-Time Imaging, vol. 9, no. 5, pp. 361-368.
Jay, K 2006, 'Hardware Edge Detection using an Altera Stratix NIOS2 Development Kit',
paper presented at the Electrical and Computer Engineering, 2006. CCECE '06. Canadian
Conference on.
Lapalme, Fo-X, Amer, A & Wang, C 2006, 'FPGA ARCHITECTURE FOR REAL-TIME
VIDEO NOISE ESTIMATION', IEEE, pp. 3257-3260.
Li, X, Zhao, R & Wang, Q 2003, 'FPGA based Sobel algorithm as vehicle edge detector in
VCAS', paper presented at the Neural Networks and Signal Processing, 2003.
Proceedings of the 2003 International Conference on.
CIS Research Method
Page 25 of 30
Liu, G & Haralick, RM 2000, 'Assignment problem in edge detection performance
evaluation', paper presented at the Computer Vision and Pattern Recognition, 2000.
Proceedings. IEEE Conference on.
Lorca, FG, Kessal, L & Demigny, D 1997, 'Efficient ASIC and FPGA implementations of
IIR filters for real time edge detection', paper presented at the Image Processing, 1997.
Proceedings., International Conference on.
Memik, SO, Katsaggelos, AK & Sarrafzadeh, M 2003, 'Analysis and FPGA implementation
of image restoration under resource constraints', Computers, IEEE Transactions on, vol.
52, no. 3, pp. 390-399.
Miaoqing, H, Serres, O, Lopez-Buedo, S, El-Ghazawi, T & Newby, G 2008, 'An Image
Processing Architecture to Exploit I/O Bandwidth on Reconfigurable Computers', paper
presented at the Programmable Logic, 2008 4th Southern Conference on.
Muthukumar, V & Rao, DV 2004, 'Image processing algorithms on reconfigurable
architecture using HandelC', paper presented at the Digital System Design, 2004. DSD
2004. Euromicro Symposium on.
Nikolov, H, Stefanov, T & Deprettere, E 2005, 'Modeling and FPGA implementation of
applications using parameterized process networks with non-static parameters', paper
presented at the Field-Programmable Custom Computing Machines, 2005. FCCM 2005.
13th Annual IEEE Symposium on.
Pankiewicz, P, Powiertowski, W & Roszak, G 2008, 'VHDL implementation of the lane
detection algorithm', paper presented at the Mixed Design of Integrated Circuits and
Systems, 2008. MIXDES 2008. 15th International Conference on.
Pei-Yung, H, Le-Tien, L, Chia-Hsiung, C, Szi-Wen, C & Sao-Jie, C 2005, 'An FPGA
architecture design of parameter-adaptive real-time image processing system for edge
detection', paper presented at the Emerging Information Technology Conference, 2005.
Rafla, NI 2007, 'Evolvable Reconfigurable Hardare framework for edge detection', paper
presented at the Circuits and Systems, 2007. MWSCAS 2007. 50th Midwest Symposium
on.
Rosas, RL, de Luca, A & Santillan, FB 2005, 'SIMD architecture for image segmentation
using Sobel operators implemented in FPGA technology', paper presented at the
Electrical and Electronics Engineering, 2005 2nd International Conference on.
Sharifi, M, Fathy, M & Mahmoudi, MT 2002, 'A classified and comparative study of edge
detection algorithms', paper presented at the Information Technology: Coding and
Computing, 2002. Proceedings. International Conference on.
Shin, MC, Goldgof, DB, Bowyer, KW & Nikiforou, S 2001, 'Comparison of edge detection
algorithms using a structure from motion task', Systems, Man, and Cybernetics, Part B:
Cybernetics, IEEE Transactions on, vol. 31, no. 4, pp. 589-601.
Verderber, M, Zemva, A & Trost, A 2001, 'Implementation of IDFT algorithm', paper
presented at the EUROCON'2001, Trends in Communications, International Conference
on.
CIS Research Method
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Wenhao, H & Kui, Y 2008, 'An improved Canny edge detector and its realization on
FPGA', paper presented at the Intelligent Control and Automation, 2008. WCICA 2008.
7th World Congress on.
Yasri, I, Hamid, NH & Yap, VV 2008, 'Performance analysis of FPGA based Sobel edge
detection operator', paper presented at the Electronic Design, 2008. ICED 2008.
International Conference on.
Yu, Y-H & Chang, C-C 2006, 'A new edge detection approach based on image context
analysis', Image and Vision Computing, vol. 24, no. 10, pp. 1090-1102.
CIS Research Method
Page 27 of 30
6. Bibliography
Abbasi, TA & Abbasi, MU 2007, 'A novel FPGA-based architecture for Sobel edge
detection operator', International Journal of Electronics, vol. 94, no. 9, pp. 889-896.
Bin Mohamed Shukor, MN, Lo Hai, H & Sebastian, P 2007, 'Implementation of real-time
simple edge detection on FPGA', paper presented at the Intelligent and Advanced
Systems, 2007. ICIAS 2007.
Daggu Venkateshwar, R & Muthukumar, V 2004, 'An efficient reconfigurable architecture
and implementation of edge detection algorithm using Handle-C', paper presented at the
Information Technology: Coding and Computing, 2004. Proceedings. ITCC 2004.
Demigny, D, Kessal, L, Bourguiba, R & Boudouani, N 2000, 'How to use high speed
reconfigurable FPGA for real time image processing?', paper presented at the Computer
Architectures for Machine Perception, 2000. Proceedings. Fifth IEEE.
Dongkyun, K, Seung Hun, J, Nguyen Tuong, T, Ki Hoon, K & Jae Wook, J 2008, 'A realtime finite line detection system based on FPGA', paper presented at the Industrial
Informatics, 2008. INDIN 2008. 6th IEEE.
Draper, B, Najjar, W, Bohm, W, Hammes, J, Rinker, B, Ross, C, Chawathe, M & Bins, J
2000, 'Compiling and optimizing image processing algorithms for FPGAs', paper
presented at the Computer Architectures for Machine Perception, 2000. Proceedings.
Fifth IEEE.
Elder, JH & Zucker, SW 1998, 'Local scale control for edge detection and blur estimation',
Pattern Analysis and Machine Intelligence, IEEE Transactions on, vol. 20, no. 7, pp. 699716.
Guangyu, L & Rensheng, C 2008, 'A Simple and Efficient Edge Detection Algorithm',
paper presented at the Computer Science and Computational Technology, 2008. ISCSCT
'08.
He, Q & Zhang, Z 2007, 'A new edge detection algorithm for image corrupted by WhiteGaussian noise', AEU - International Journal of Electronics and Communications, vol. 61,
no. 8, pp. 546-550.
Heath, MD, Sarkar, S, Sanocki, T & Bowyer, KW 1997, 'A robust visual method for
assessing the relative performance of edge-detection algorithms', Pattern Analysis and
Machine Intelligence, IEEE Transactions on, vol. 19, no. 12, pp. 1338-1359.
Hirai, S, Zakoji, M, Masubuchi, A & Tsuboi, T 2005, 'FPGA-Based Realtime Vision
System', Journal of Robotics and Mechatronics, vol. 17, no. 4, pp. 1-10.
Hsiao, PY, Chen, CH, Wen, H & Chen, SJ 2006, 'Real-time realisation of noise-immune
gradient-based edge detector', Computers and Digital Techniques, IEE Proceedings -, vol.
153, no. 4, pp. 261-269.
Hussmann, S & Ho, TH 2003, 'A high-speed subpixel edge detector implementation inside
a FPGA', Real-Time Imaging, vol. 9, no. 5, pp. 361-368.
CIS Research Method
Page 28 of 30
Jay, K 2006, 'Hardware Edge Detection using an Altera Stratix NIOS2 Development Kit',
paper presented at the Electrical and Computer Engineering, 2006. CCECE '06.
Lapalme, Fo-X, Amer, A & Wang, C 2006, 'FPGA ARCHITECTURE FOR REAL-TIME
VIDEO NOISE ESTIMATION', IEEE, pp. 3257-3260.
Laplante, P 2004, 'One Instruction Set Computers for Image Processing', The Journal of
VLSI Signal Processing, vol. 38, no. 1, pp. 45-61.
Li, X, Zhao, R & Wang, Q 2003, 'FPGA based Sobel algorithm as vehicle edge detector in
VCAS', paper presented at the Neural Networks and Signal Processing, 2003.
Liu, G & Haralick, RM 2000, 'Assignment problem in edge detection performance
evaluation', paper presented at the Computer Vision and Pattern Recognition, 2000.
Proceedings. IEEE
Lorca, FG, Kessal, L & Demigny, D 1997, 'Efficient ASIC and FPGA implementations of
IIR filters for real time edge detection', paper presented at the Image Processing, 1997.
Memik, SO, Katsaggelos, AK & Sarrafzadeh, M 2003, 'Analysis and FPGA implementation
of image restoration under resource constraints', Computers, IEEE Transactions on, vol.
52, no. 3, pp. 390-399.
Miaoqing, H, Serres, O, Lopez-Buedo, S, El-Ghazawi, T & Newby, G 2008, 'An Image
Processing Architecture to Exploit I/O Bandwidth on Reconfigurable Computers', paper
presented at the Programmable Logic, 2008 4th
Muthukumar, V & Rao, DV 2004, 'Image processing algorithms on reconfigurable
architecture using HandelC', paper presented at the Digital System Design, 2004.
Nikolov, H, Stefanov, T & Deprettere, E 2005, 'Modeling and FPGA implementation of
applications using parameterized process networks with non-static parameters', paper
presented at the Field-Programmable Custom Computing Machines, 2005. FCCM 2005.
13th Annual IEEE Symposium on.
Pankiewicz, P, Powiertowski, W & Roszak, G 2008, 'VHDL implementation of the lane
detection algorithm', paper presented at the Mixed Design of Integrated Circuits and
Systems, 2008. MIXDES 2008. 15th International Conference on.
Pei-Yung, H, Le-Tien, L, Chia-Hsiung, C, Szi-Wen, C & Sao-Jie, C 2005, 'An FPGA
architecture design of parameter-adaptive real-time image processing system for edge
detection', paper presented at the Emerging Information Technology Conference, 2005.
Rafla, NI 2007, 'Evolvable Reconfigurable Hardare framework for edge detection', paper
presented at the Circuits and Systems, 2007. MWSCAS 2007. 50th Midwest Symposium
on.
Rosas, RL, de Luca, A & Santillan, FB 2005, 'SIMD architecture for image segmentation
using Sobel operators implemented in FPGA technology', paper presented at the
Electrical and Electronics Engineering, 2005 2nd International Conference on.
Sharifi, M, Fathy, M & Mahmoudi, MT 2002, 'A classified and comparative study of edge
detection algorithms', paper presented at the Information Technology: Coding and
Computing, 2002. Proceedings. International Conference on.
CIS Research Method
Page 29 of 30
Shen, J 1996, 'On Multi-Edge Detection', Graphical Models and Image Processing, vol.
58, no. 2, pp. 101-114.
Shin, MC, Goldgof, DB, Bowyer, KW & Nikiforou, S 2001, 'Comparison of edge detection
algorithms using a structure from motion task', Systems, Man, and Cybernetics, Part B:
Cybernetics, IEEE Transactions on, vol. 31, no. 4, pp. 589-601.
Verderber, M, Zemva, A & Trost, A 2001, 'Implementation of IDFT algorithm', paper
presented at the EUROCON'2001, Trends in Communications, International Conference
on.
Wenhao, H & Kui, Y 2008, 'An improved Canny edge detector and its realization on
FPGA', paper presented at the Intelligent Control and Automation, 2008. WCICA 2008.
7th World Congress on.
Yasri, I, Hamid, NH & Yap, VV 2008, 'Performance analysis of FPGA based Sobel edge
detection operator', paper presented at the Electronic Design, 2008. ICED 2008.
International Conference on.
Yu, Y-H & Chang, C-C 2006, 'A new edge detection approach based on image context
analysis', Image and Vision Computing, vol. 24, no. 10, pp. 1090-1102.
CIS Research Method
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