ITU - Telecommunication Standardization Sector
STUDY GROUP 16
Mississauga, Canada, 14th May - 17th May 2002
QUESTIONS:
Q.11/16
SOURCE:
Conexant Systems Inc
CONTACT:
Frank Chen
Phone: +1 949 579 3296
Fax:
+1 949 579 3667
Email: frank.chen@mindspeed.com
TITLE:
Data Flow Control in MoIP
____________________
ABSTRACT
This contribution discusses data flow control in V.MoIP.
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1. Introduction
To prevent data loss in a MoIP session, it is pivotal to have data flow control to prevent overflow
in gateways. This contribution describes data flow control in various MoIP scenarios.
2. References
[1] "Proposed Draft Text for D-005 version of V.MoIP ", TR-30.1/02-04-033, TIA TR-30.1
Technical Meeting, April 15, 2002, Albuquerque, NM.
[2]
"Procedures for Supporting Non-Error Corrected connections in Modem Relay", TR30.1/02-04-052, TIA TR-30.1 Technical Meeting, April 15, 2002, Albuquerque, NM.
3. Two Error Correction Links
When both PSTN legs establish error correction connections and the data between two
gateways are exchanged using reliable channels in SPRT, there is full flow control end to end.
Modems may flow control data from a gateway with the error correction protocol it has
established; the gateway may flow control data from another gateway using the SPRT reliable
channel; and the gateway may flow control data from modem with the error correction protocol.
If M1-G1 and M2-G2 are both connected with LAPM, the M1 may flow off data from G1 by
sending RNR; while G1 may flow off data from G2 by updating the base sequence number
without incrementing; and the G2 may flow off data from M2 by sending RNR. Figure 1 shows
an example of this scenario.
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M1
G1
G2
M2
v34 LAPM
SPRT reliable channel
v34 LAPM
data
data
data
RNR
base sequence number
RNR
data
data
data
RNR
base sequence number
RNR
Figure 1
4. One Error Correction Link and One Non Error Correction Link
4.1. Low Speed Error Correction and Low Speed Non Error Correction
During a low data speed connection, the data traffic is usually light. The combination of the
protocol flow control and gateway buffer will possibly eliminate data loss in the gateways
(Figure 2).
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M1
G1
G2
M2
v22 1200bps LAPM
SPRT
v21 300bps
1200bps
1200bps
300bps
RNR
base sequence number
1200bps
300bps
RNR
300bps
buffer
Figure 2
4.2. High Speed Error Correction and High Speed Non Error Correction
In this case, a rate renegotiation to match speed will provide effective flow control. If M1-G1 is
connected at V.34 26400bps with LAPM and M2-G2 is connected at V.34 28800bps with no
protocol. The M2-G2 should be rate renegotiated off ramp speed at 26400bps or below such as
24000bps. After that, a combined the flow control and buffering mechanism will prevent data
overflow (Figure 3).
M1
G1
v34 26400bps LAPM
G2
SPRT
M2
v34 28800bps
renegotiate offramp rate
v34 28800/24000bps
26400bps
26400bps
RNR
base sequence number
26400bps
24000bps
RNR
buffer
Figure 3
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28800bps
24000bps
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4.3. High Speed Error Correction and Low Speed Non Error Correction
When one PSTN link is connected at high speed with error correction and the other PSTN link
is connected with low speed with no error correction, the flow control mechanism also works
effectively. Say M1-G1 connects at V.34 with LAPM and M2-G2 connects with V.22 with no
error correction protocol. For data from M1 to M2, G1 may flow off data from M1 with RNR,
G2 may flow off data from G1 with base sequence number, M2 may receive data at the speed
G2 transmit and there is no data overflow. For data from M2 to M1, G2 may receive data from
M2 at low speed and send to G1. There is no data overflow. And the M1 may receive data from
G1 at high speed. Because of the nature of connect speed on both legs and buffering, there is no
data overflow in this direction. (Figure 4)
M1
G1
G2
M2
V34 28800bps, LAMP
SPRT
V22 1200bps
28800bps
28800bps
1200bps
RNR
base sequence number
28800bps
1200bps
RNR
1200bps
buffer
Figure 4
4.4. Low Speed Error Correction and High Speed Non Error Correction
5. The combination of speed shift and buffering may help to improve data
loss to certain extent. Two Non Error Correction Links
5.1. Two Low Speed Non Error Correction
When both links are connected at low speed with no error correction, the gateway buffering
mechanism will prevent data overflow. Since the low speed connection usually associates with
light traffic, a decent size of buffer built in both gateways will effectively absorb the incoming
data from modem before sending out data to modem.
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M1
G1
G2
v23 1200bps/75bps
SPRT unreliable channel
1200bps
1200bps
75bps
M2
v21 300bps
buffer
300bps
buffer
300bps
300bps
Figure 5
5.2. Two High Speed Non Error Correction
A speed match is required to prevent data overflow in this scenario. The speed match should work
in a way so that the on ramp data speed on one gateway should never exceed the off ramp data
speed of the other gateway.
M1
G1
onramp 28800bps / offramp
26400bps
G2
SPRT
rate renegotiation
M2
onramp 28800bps / offramp
26400bps
rate renegotiation
onramp 24000bps/ offramp
26400bps
SPRT unreliable channel
onramp 24000bps / offramp
26400bps
24000bps
24000bps
26400bps
26400bps
24000bps
24000bps
Figure 6
5.3. One High Speed Non Error Correction and One Low Speed Non Error
Correction
Gateways may use speed shift and buffering technique to boost the performance in this scenario.
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DATA FLOW CONTROL IN MOIP
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