Bilinear Circuits
Nonlinearity in bipolar transistor
The collector current
I C in bipolar transistor the function of base-emitter voltage VBE : given by:
V 
I C  I S exp  BE 
 VT 
where I S and  are transistor parameters and VT  kT q is the thermal potential. At the room temperature VT  0.025V and for
most modern transistors   1
The equation (xx) can be also written in the form:
I 
VBE  VT ln  C 
 IS 
Nonlinearity in MOS transistor
I D in a simple MOS transistor model for VDS  VGS  VTH as the function of gate-source voltage VGS given by:
K
K
2
2
I D  VGS  VTH  1  VDS   VGS  VTH 
2
2
W
W
where K   COX
 K ' ,  is carrier mobility in the channel, COX is the unit capacitance of the gate oxide, K ' is
L
L
transconductance parameter, W is channel width, L is channel length,  is channel length modulation parameter, VTH is threshold
voltage, VGS is gate-source voltage, and VGS is drain-source voltage.
The drain current
Equation (xx) can be also written as
VGS  VTH 
2I D
2I D
 VTH 
K 1  VDS 
K
When transistor operates in a weak inversion (subthreshold conduction mode) then the drain current is approximated by
ID 
VGS

K
VT 2 exp  VGS  VTH  VT
2
VT


  V  K
 V  VTH  VT
 1  exp  DS   VT 2 exp  GS
VT

 VT  2










2I D
e2 I D
 VT  ln
 1  VTH  VT ln
2
K VT 
 K V 2 1  exp   VDS  

T
 V  

 T  


VGS  VTH  VT both equations result in the same current I D  0.5K VT  and ant this is the drain current I D at
the threshold voltage VTH . Equation (xx) should be used for VGS  VT  VTH and should be used for VGS  VT  VTH .
note that for
2
The transistor model described here has only to regions strong and weak inversion and it does not well transistor
characteristics near the threshold.
1
Nonlinear functions obtained with bipolar transistors
For discussed circuits in this section we assume that the current gain  of bipolar transistors is very large and the base currents are
negligibly small.
I1
I2
Q2
I3
Iout
Q3
Q1
Q4
I2
I3
I out 
I1 I 2
I3
Fig. Multiplier and divider circuit
For the circuit of Fig. @@ using Kirkhoff voltage law one may write
VBE1  VBE 2  VBE3  VBE 4
assuming that all transistors are identical with saturation current IS by inserting VBE values
 I1 
 I2
 I3
 Iout 
  VT ln    VT ln    VT ln 

 IS 
 IS 
 IS 
 IS 
VT ln 
or
Iout 
I1 I 2
I3
Using this circuit the product of currents I1 and I2 can be obtained and also currents I1 and I2 can be divided by current I3.
With slight circuit modification as show in above Fig. the output current is equal to the geometric average of two input
currents
Iout  I1 I 2
If the value of one current is fixed than the circuit of Fig. @@ generates output proportional to square root of the input current.
2
I1
Iout
Q2
Q3
Q1
Q4
I2
I out  I1 I 2
Fig. Circuit calculating the geometric average of two input currents
I1
I3
Q2
Iout
Q3
Q1
Q4
I3
2
I out
I
 1
I3
Fig. Circuit which is calculating square of the input current.
I1
I2
Q2
I3
Iout
Q3
Q1
Q4
I2
I3
I out 
I12 I 2 I1 I 2

I3
I3
3
I1
I2
I3
Q2
Iout
Q3
Q4
Q1
I2
I3
I out 
I1
I2
I 2 I1
I3
I3
Q2
Q3
Iout
Q1
Q4
I2
I3
I out 
I1
I2
M2
I3
I1 I 22
I 32
Iout
M3
M1
M4
I2
I3
(a)
4
I1
Iout
M2
M3
M1
M4
I2
(b)
I1
I3
M2
Iout
M3
M1
M4
I3
Fig. Circuits operating in subthreshold conduction: (a) multiplier and divider, (b) square root calculation, and (c) square calculation.
The only disadvantage of these circuits shown in Figures @@ through @@ is that all currents must have positive values. In other
words the nonlinear operation such as multiplication or division can be performed only in the first quarter.
Translinear amplifiers
Differential amplifier with bipolar transistors
I1
V1
I2
Q1
Q2
V2
IS
In the case of the differential pair shown in Fig. drain current I1 and I2 are function of input voltages V1 and V2
5
 I1 
 I2
V 1  V 2  VBE1  VBE1  VT ln    VT ln  
 IS 
 IS 
 V 
I1
 I1 

V  VT ln   or
 exp 
I2

V
 I2
 T
If base current is neglected than
IS  I1  I 2
When base currents cannot be neglected then sum of I1 and I2 is equal to IS* =IS
I1 
IS
 V
1  exp  
 VT



I2 
and
IS
IS
 V
1  exp  
 VT
IS



IOUT
IOUT
VREF
Q1
Q2
Q3
V1
Q4
2IS
I0+IIN
VREF
V2
I0-IIN
Fig. Gilbert translinear amplifier
Let as consider the translinear amplifier developed by Gilbert and shown in Fig. When base currents are neglected the voltage
difference between V1and V2is
I I
V  V1  V2  VT ln  0 IN
 I 0  I IN



using (@@) collector currents for Q3 and Q4 can be find as
2I S
I I
 I S  S IN
I0
 V 

1  exp  
 VT 
2I S
I I

 I S  S IN
I0
 V 

1  exp  
 VT 
IC 3 
IC 4
The output current IOUT is equal
I OUT  I S  I C 3  I C 4  I S 
IS
I IN
I0
Note that output current is proportional to the input current and the current gain can be adjusted by the ratio
I S I 0 . This way we can
construct linear amplifiers with the gain controlled by biasing currents. In the analysis we have assumed that all bipolar transistors are
identical. This need not be the case and the equation can be rewritten as
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I OUT 
I S A34
I IN
I 0 A12
where A12 is the emitter area of transistors Q1 and Q2 while A34 is the emitter area of transistors Q3 and Q4. Thus, the circuit gain can
be controlled also by the ratio of the emitter area. This concept is frequently used in instrumentation amplifiers where a certain gain is
required and feedback resistors are not used. This circuit can be also used as multiplier/divider circuit. Input signal in this case can be
multiplied by I S or divided by I 0 . In contrast to the circuit shown in Fig. the input current can have both positive and negative
values.
The Gilbert translinear amplifier can be also designed with MOS transistors and in this case all transistors must work in the
weak inversion (subthreshold) mode.
The translinear amplifier can be also incorporated into four-quadrant translinear multiplier shown in Fig.. To analyze the
circuit let us assume that all transistors are identical and that base currents in all transistors are negligibly small.
The voltage difference V1  V2 on inputs of two differential pairs is
I I 
V  V1  V2  VT ln  1 IN 1 
 I1  I IN 1 
Collector currents for Q1, Q2, Q3, and Q4 can be found using formula (@@) for differential pairs
I  I I  I 
I 2  I IN 2
I I
 2 IN 2  2 IN 2 1 IN 1
2 I1
 V  1  I1  I IN 1

1  exp  
I1  I IN 1
 VT 
I  I IN 2 I1  I IN 1 
I 2  I IN 2
I I
IC 2 
 2 IN 2  2
2 I1
 V  1  I1  I IN 1

1  exp  
I1  I IN 1
 VT 
I  I I  I 
I 2  I IN 2
I I
IC 3 
 2 IN 2  2 IN 2 1 IN 1
 V  1  I1  I IN 1
2 I1

1  exp  
I1  I IN 1
 VT 
I C1 
IC 4 
I 2  I IN 2
 V
1  exp  
 VT



I1+IIN1

I  I I  I 
I 2  I IN 2
 2 IN 2 1 IN 1
I I
2 I1
1  1 IN 1
I1  I IN 1
I2+IOUT
I2-IOUT
I1-IIN1
V1
Q5
V2
Q3
Q1
Q2
I2-IIN2
Currents on the output are
Q4
Q6
I2+IIN2
I 2  I OUT  I C1  I C 4 
I 2  I IN 2 I1  I IN 1   I 2  I IN 2 I1  I IN 1 
I 2  I OUT  I C 2  I C 3 
I 2  I IN 2 I1  I IN 1   I 2  I IN 2 I1  I IN 1 
2 I1
2 I1
2 I1
2 I1
7
after simplification
I IN 1I IN 2
I1
I I
 I 2  IN 1 IN 2
I1
I 2  I OUT  I 2 
I 2  I OUT
Therefore one can conclude that
I OUT 
I IN 1I IN 2
I1
The differential output current
I OUT is proportional to the product of differential input currents I IN 1 and I IN 2 . All these differential
currents can be both positive and negative.
I1+IIN1
I2+IOUT
I2-IOUT
I1-IIN1
V1
M5
V2
M3
M1
I2-IIN2
M2
M4
Q6
I2+IIN2
Fig. @@ Gilbert multiplier made of MOS transistors operation in subthreshold mode.
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