Halo Design Document - MIT Space Systems Laboratory

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InSPIRE-II
Halo Design Document
SPHERES Interface
MIT Lead: Bryan McCarthy
AFS Lead: John Merk
DARPA, NASA, NRL
MIT, AFS
10 April 2014
Revision History
Date
Editor
10-Dec-13 Bryan McCarthy
20-Dec-13 Bryan McCarthy,
Roedolph Opperman
31-Jan-14 Bryan McCarthy
10-Apr-14
Bryan McCarthy
10 April 2014
Actions
Created first version of document.
Added CAD images; finalized for distribution with PDR
package.
Added and updated several CAD images; made small
updates throughout document to reflect design changes
over the last month, including PDR changes.
Updated based on changes made to the design over the last
2 months, including development of the Halo Prototype.
Prototype schematics included in appendices.
Halo Design Document
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Prepared By
MIT Space Systems Lab
and
Aurora Flight Sciences Corp
Research and Development Center
MIT Points of Contact
Position
SPHERES Research
Scientist
Halo Program
Manager
Halo Systems
Engineer
Name
Alvar Saenz-Otero
Email
alvarso@mit.edu
Phone
617-699-7311
Bryan McCarthy
bpm@mit.edu
703-727-6508
Chris Jewison
jewisonc@mit.edu
724-986-9048
AFS Points of Contact
Position
Electrical Lead
Mechanical Lead
Technician
Electrical Engineer
10 April 2014
Name
John Merk
Roedolph Opperman
Joanne Vining
Namir Jawdat
Email
jmerk@aurora.aero
ropperman@aurora.aero
jvining@aurora.aero
njawdat@aurora.aero
Halo Design Document
Phone
617-500-4887
617-500-4850
617-943-9107
617-500-6849
Page 3 of 54
Table of Contents
1
INTRODUCTION AND SYSTEM OVERVIEW ............................................................................................ 6
2
HALO MECHANICAL DESIGN ....................................................................................................................... 7
2.1 HALO SIZE AND MASS ................................................................................................................................................. 9
2.2 HALO MATERIAL SELECTION .................................................................................................................................. 10
2.3 HALO MOUNTING ASSEMBLY .................................................................................................................................. 10
2.4 HALO EXPANSION PORT SIDE ................................................................................................................................. 13
2.5 HALO BACK SIDE ....................................................................................................................................................... 16
2.6 HALO PORTS ............................................................................................................................................................... 17
2.7 HALO ASSEMBLY SEQUENCE ................................................................................................................................... 19
2.8 SPHERES KEEP OUT ZONES VS. HALO................................................................................................................. 22
3
HALO ELECTRICAL DESIGN ...................................................................................................................... 27
3.1 HALO MOTHERBOARD .............................................................................................................................................. 29
3.1.1 USB ................................................................................................................................................................................... 31
3.1.2 Ethernet ......................................................................................................................................................................... 31
3.1.3 UART................................................................................................................................................................................ 31
3.1.4 US/IR ............................................................................................................................................................................... 32
3.2 HALO POWER BOARD ............................................................................................................................................... 32
3.3 HALO PORT BOARD ................................................................................................................................................... 33
3.4 HALO BATTERY .......................................................................................................................................................... 34
3.5 HALO ELECTRICAL INTERFACES .................................................................................................................................. 35
APPENDIX A: ENGINEERING DRAWINGS ........................................................................................................................... 37
APPENDIX B: DEVICE DATASHEETS ................................................................................................................................... 39
APPENDIX C: HALO MOTHERBOARD PROTOTYPE SCHEMATICSAPPENDIX D: HALO POWER BOARD PROTOTYPE
SCHEMATICSAPPENDIX E: HALO PORT BOARD PROTOTYPE SCHEMATICS ................................................................ 42
Table of Figures
Figure 1: Labeled Halo System....................................................................................................... 6
Figure 2: Labeled Halo System Mounted on SPHERES/VERTIGO Assembly ............................ 7
Figure 3: Two Halo-Equipped SPHERES in a Docking Configuration ......................................... 8
Figure 4: Halo Exploded View ....................................................................................................... 9
Figure 5: Halo Outer Dimensions ................................................................................................. 10
Figure 6: Halo Mounting Assembly ............................................................................................. 11
Figure 7: Sleeve and Struts for Mounting on SPHERES .............................................................. 12
Figure 8: Sleeve Channel for Wire Routing ................................................................................. 13
Figure 9: Halo Expansion Port Side.............................................................................................. 14
Figure 10: Expansion Port Side of the Halo ................................................................................. 15
Figure 11: Halo Back Side ............................................................................................................ 16
Figure 12: Back Side of the Halo .................................................................................................. 17
Figure 13: Halo Port Footprint (Dimensions in inches) ............................................................... 18
Figure 14: Halo Port with Etchings Shown .................................................................................. 19
Figure 15: Step 1 of the Halo Assembly Sequence....................................................................... 20
Figure 16: Step 2 of the Halo Assembly Sequence....................................................................... 20
Figure 17: Step 3 of the Halo Assembly Sequence....................................................................... 21
Figure 18: Step 4 of the Halo Assembly Sequence....................................................................... 22
Figure 19: SPHERES Battery and CO2 Tank Keep Out Zones vs. Halo ...................................... 23
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Figure 20: SPHERES Thruster Plume Keep Out Zones vs. Halo................................................. 24
Figure 21: Head on View of +X, +Z SPHERES Thruster with Halo Impingement ..................... 25
Figure 22: Thruster Plume Velocity Profile for 18-deg Cone ...................................................... 26
Figure 23: Thruster Plume Velocity Profile for 23-deg Cone ...................................................... 26
Figure 24: Velocity Profile for 18-deg Cone at 0.156m ............................................................... 26
Figure 25: Velocity Profile for 23-deg Cone at 0.156m ............................................................... 26
Figure 26: 18-deg Plume Cross-section at 0.156m with Impingement from Top of HPG ........... 27
Figure 27: 23-deg Plume Cross-section at 0.156m with Impingement from Top of HPG ........... 27
Figure 28: Halo PCB Locations .................................................................................................... 28
Figure 29: Halo PCB Block Diagram ........................................................................................... 29
Figure 30: Halo Motherboard Block Diagram .............................................................................. 30
Figure 31: Halo Power Board Block Diagram .............................................................................. 32
Figure 32: HP Board Block Diagram............................................................................................ 34
Figure 33: Halo Electrical Interfaces ............................................................................................ 35
Table of Tables
Table 1: Halo Size and Mass .......................................................................................................... 9
Table 2: Halo Material Selection .................................................................................................. 10
Table 3: Thruster Effectiveness with Halo Impingement for Various Configurations ................. 27
Table 4: Nikon Battery Specifications .......................................................................................... 35
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1
Introduction and System Overview
The objective statement for the InSPIRE-II program is as follows: Develop a cost-effective
facility for maturing adaptive GNC technology in support of on-orbit, robotic satellite assembly
in a risk-tolerant, dynamically-authentic environment.
The Halo expands the current capabilities of the Synchronized Position Hold, Engage, Reorient
Experimental Satellites (SPHERES) on the International Space Station (ISS). It does so by
enabling each satellite to interface with six external objects simultaneously through rigid
mechanical and electrical interfaces called “Halo ports.” These external objects, called
“peripherals,” include the following: docking ports, used for testing docking algorithms and
reconfiguring satellite geometry; sensors, such as the Visual Estimation for Relative Tracking
and Inspection of Generic Objects (VERTIGO) Goggles; and actuators, such as Control Moment
Gyros (CMGs). These peripherals can be added and removed from the Halo by the astronaut as
necessary for each test. The Halo has the processing power of the VERTIGO Avionics (VA)
Stack and provides Ethernet and USB to each Halo port for any future peripherals. The Halo is
able to provide power to all attached peripheral devices for a duration that allows uninterrupted,
interesting robotic assembly testing. The new capabilities enable testing of on-orbit robotic
assembly and servicing in a risk-tolerant, dynamically authentic environment by addressing
challenges such as aggregating resources and reconfiguring control systems. The fully labeled
Halo system is shown in Figure 1 and Figure 2. HP stands for Halo Port, and HPG stands for
Halo Port Goggles, to indicate the primary port to which the VERTIGO Optics Mount is attached.
HP 2
(Not
Visible)
HP 1
USB Port
(Ethernet
Port Not
Visible)
Support
Sleeve
Main Power
Switch
HPG
(Goggles)
HP 3
(Not
Visible)
12x Port
LED
HP 4
(Not
Visible)
4x Support
Struts
4x Battery
Holder
HP 5
Figure 1: Labeled Halo System
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2 x VERTIGO
Nikon Battery
VERTIGO
Avionics
Stack
SPHERES
Satellite
2 x VERTIGO
Nikon Battery
Figure 2: Labeled Halo System Mounted on SPHERES/VERTIGO Assembly
Note: Differences between the Halo flight units and the Halo prototype unit are highlighted as
applicable at the end of each section.
2
Halo Mechanical Design
In order to mount the Halo, a SPHERES satellite must first have the VA Stack attached to the
Expansion Port Version 2.0 (ExpV2). The Halo slides around the satellite/stack assembly, such
that the Halo interfaces with the VA Stack 50-pin connector. The Halo includes six identical 50pin connectors at six rigid HPs around the SPHERES. The structure supports six Printed Circuit
Boards (PCBs): the Halo Motherboard at HPG, the Power board at HP3, and four boards at HPs
1, 2, 4, and 5. A key factor in the structural design was the avoidance of the SPHERES keep out
zones, as described in the Halo System Requirements Document. HP1 and HP5 are angled 45
degrees from the surface of HPG so that multiple peripherals can be attached simultaneously
without impinging upon one another. This configuration also allows two Halo-equipped
SPHERES to dock together without their peripherals contacting one another, as shown in Figure
3. Likewise, HP2 and HP4 are angled 45 degrees from the surface of HP3.
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Figure 3: Two Halo-Equipped SPHERES in a Docking Configuration
CAD images are shown below, and engineering drawings will be added to this document as the
design matures. An exploded view of the Halo is shown in Figure 4. This figure also contains all
of the part names for each component in the Halo.
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Figure 4: Halo Exploded View
2.1
Halo Size and Mass
The Halo has the following properties:
Table 1: Halo Size and Mass
Dimensions of Manifested Halo Hardware
Panel
X-dim
Y-dim
Z-dim
Thickness
[cm]
[cm]
[cm]
[cm]
43.4
17.9
40.9
1.905
Dimensions of Halo/SPHERES/VERTIGO
Assembly
Panel
X-dim
Y-dim
Z-dim
Thickness
[cm]
[cm]
[cm]
[cm]
43.4
21.6
40.9
Mass [kg]
(without Batteries)
4.08
Mass [kg]
(Includes SPHERES, VERTIGO
Avionics Stack and all Batteries)
1.905
9.89
These dimensions are depicted in Figure 5 and the engineering drawings included in Appendix
A: Engineering Drawings.
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Figure 5: Halo Outer Dimensions
2.2
Halo Material Selection
Table 2 contains the material selection and rationale for each of the parts of the Halo.
Table 2: Halo Material Selection
Part
Sleeve
Material
6061-T6 Aluminum
Struts, battery
holders and
port housings
3D Printed Ultem
2.3
Rationale
Strong, yet cheap and lightweight – ideal for
clamping the SPHERE (as used on RINGS)
Recently Flight Approved, can be designed to have
adequate strength in key locations, lightweight, easy
to manufacture
Halo Mounting Assembly
The Halo mounting assembly is highlighted in Figure 6.
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Mounting
Assembly
Figure 6: Halo Mounting Assembly
The Halo is mounted onto a SPHERES satellite using a press-fit design, similar to the Resonant
Inductive Near-field Generation System (RINGS), which utilizes a C-clamp and four struts. The
Halo uses a sleeve that wraps completely around the satellite, rather than the C-clamp. The
sleeve includes an adjustable dial that is used to tighten and loosen the sleeve as necessary to fit a
given SPHERES shell. The dial is against the -X face of the satellite. Two of the four struts have
been modified to incorporate four battery holders, which provide easy access for astronauts to
install and remove batteries. For more information on the batteries and power subsystem, see
page 6. The mounting assembly is shown in Figure 7.
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Figure 7: Sleeve and Struts for Mounting on SPHERES
This design avoids the SPHERES keep out zones and provides a rigid mount to the satellite. The
sleeve is also be used to properly align the Halo on the satellite. Teflon-insulated wiring between
the front and back halves of the Halo is routed along the struts and sleeve in a recessed channel,
as shown in Figure 8. The channel is highlighted in blue.
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Figure 8: Sleeve Channel for Wire Routing
2.4
Halo Expansion Port Side
The Halo Expansion Port side is highlighted in Figure 9.
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Expansion
Port Side
Figure 9: Halo Expansion Port Side
The Expansion Port side of the Halo attaches to the VA Stack through a connector between the
VA Stack external interface and a connector on the back of HPG, and it also mounts onto the
front two struts of the Halo mounting assembly. The inner shell of the Expansion Port side
provides a male 50-pin Samtec connector to interface with VA Stack, and this connector has an
identical form-factor to the VERTIGO Optics Mount. It houses the Halo Motherboard as well as
two other PCBs for the two other HPs on the Expansion Port side of the Halo while avoiding
SPHERES keep out zones. It is pictured in Figure 10.
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Figure 10: Expansion Port Side of the Halo
The Expansion Port side of the Halo houses the Motherboard immediately adjacent to the VA
Stack, and the Motherboard contains all of the circuits for HPG as well. The Motherboard also
includes three external connectors: two USB connectors and one Ethernet connector (RJ45).
These connectors are externally accessible on the side of the Halo.
Because the outer (+X) face of the VA Stack has venting slits for hot air that is blown out of the
VA Stack, there is a gap in between the VA Stack and the Halo for venting. Although there are
no major electrical components that emit heat, the Halo also has venting.
Each HP has two light-emitting diodes (LEDs) so that astronauts can easily determine whether or
not any of the HPs are powered.
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The Halo connector on the back of HPG mates to the VA Stack using a ribbon cable, similar to
RINGS. This COTS connector simply clicks into place.
2.5
Halo Back Side
The back side of the Halo is highlighted in Figure 11.
Back Side
Figure 11: Halo Back Side
The back side of the Halo mounts to the back two struts in the Halo mounting assembly. It
houses the Halo Power board as well as two other boards for the two other HPs on the back side.
It also avoids the SPHERES keep out zones and is pictured in Figure 12.
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Figure 12: Back Side of the Halo
Because the back side of the Halo contains the Power board immediately adjacent to HP3, the
Power board contains all of the circuits required for HP3 as well. The back side of the Halo also
has the shrouded Halo master power switch located on the side of HP3. As with the Expansion
Port side, each HP has two LEDs.
2.6
Halo Ports
Each HP provides 4 male thumbscrews protruding outwards from the Halo on a flat face for
flush mounting. The HPG face is 4.75” by 4.75”, HPs 1, 2, 4, and 5 are 4.75” by 3.50”, and HP3
is 4.75” by 2.75”. Similar to the SPHERES’s ExpV2, the Halo ports provide male screws so that
peripherals simply need to provide female mounting holes rather than their own male screws.
This reduces the necessary size and mass of peripherals. The screws are arranged in a square
configuration with 2.25” on a side, which is different from the ExpV2 (ExpV2 has a diamond
configuration, but is electrically incompatible), but interfaces well with the SPHERES Docking
Port. In addition, the 50-pin connector is located 0.75” down from the top of the square screw
configuration—rather than centered—so that astronauts can easily recognize the proper
mounting orientation. An image of the HPs is provided in Figure 13.
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Figure 13: Halo Port Footprint (Dimensions in inches)
The HPs provide a mechanical connection that is identical to the VA Stack, including the female
50-pin Samtec connector (ERF8-RA Series; part number: ERF8-025-01-S-D-RA-TR) and the
four female mounting holes. The holes and connector are in an identical configuration to those
on the external face of the VA Stack. These holes are provided so that the VERTIGO Optics
Mount, which has its own male screws and is designed to mount to female threaded holes, can
mount on any HP. The electrical connectors are compatible.
Future peripherals may either provide four female mounting holes to align with the four male
screws on the HPs or four male screws to align with the four female mounting holes on the HPs.
Future peripherals should provide a male connector to mate with the female connector on the
HPs.
The male thumbscrews on the HPs are #4-40. When the male thumbscrews on the HPs are fully
pushed in (extending as far away from the SPHERES and protruding as far into the peripheral as
possible), they reach 0.23” beyond the HP face, in order to be compatible with the Docking Port.
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Nominally, the male thumbscrews are fully recessed due to their springs. The rear grip screw
section is 0.4” in diameter.
The Halo port faces also each have an etching outlining both the Optics Mount and the Docking
Port, as shown in Figure 14. This aids the astronauts in quickly attaching peripherals.
Figure 14: Halo Port with Etchings Shown
2.7
Halo Assembly Sequence
The Halo assembly sequence consists of following four steps, each illustrated in the
accompanying images:
Step 1) Mount the VA Stack onto the SPHERES ExpV2
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Figure 15: Step 1 of the Halo Assembly Sequence
Step 2) Slide the SPHERES with VA Stack into the sleeve of the Halo
Figure 16: Step 2 of the Halo Assembly Sequence
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Step 3) Turn the adjustment dial on the rear of the Halo sleeve in a clockwise rotation to clamp
down on the SPHERES satellite, ensuring a tight fit; to release, pull the knob outward
Figure 17: Step 3 of the Halo Assembly Sequence
Step 4) Connect the tethered connector on the back side of HPG with the connector on the VA
Stack so that the latching mechanism engages
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Figure 18: Step 4 of the Halo Assembly Sequence
2.8
SPHERES Keep Out Zones vs. Halo
Figure 19 demonstrates how the Halo completely avoids the battery doors, regulator knob, and
tank.
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Figure 19: SPHERES Battery and CO2 Tank Keep Out Zones vs. Halo
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The Halo also does not impinge on any of the thruster plumes in the Y-axis or Z-axis. As shown
in Figure 20, the Halo does not impinge either of the thrusters on the -X face of the SPHERES.
Figure 20: SPHERES Thruster Plume Keep Out Zones vs. Halo
The only thruster impingement by the Halo is on the two thrusters on the +X face of the
SPHERES satellite. Figure 21 shows a head-on view of the thruster on the satellite’s +X, +Z face.
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Figure 21: Head on View of +X, +Z SPHERES Thruster with Halo Impingement
Note that the VERTIGO Optics Mount does not block anything that would not have been
blocked by the Halo anyway. Thus, only the blockage by the Halo needs to be calculated. The
amount of Halo impingement was quantified using the following equation for the SPHERES
thruster velocity profile:
𝑢(𝑥, 𝑟) = 𝑢𝑚𝑎𝑥 ∗
−29.5∗𝑟 2
(
)
𝑒 𝑥2
where 𝑢(𝑥, 𝑟) is the plume velocity at radius 𝑟 and depth 𝑥 and 𝑢𝑚𝑎𝑥 is the maximum plume
velocity. This equation was taken from the website of the Thayer School of Engineering at
Dartmouth (thayer.dartmouth.edu/~d30345d/books/EFM/chap9.pdf). The thruster plumes on the
SPHERES are an 18-degree cone (9 degrees off the center line), per the Halo System
Requirements Document. Thus, the equation above gives the velocity profile for the 18-degree
cone in Figure 22 and for a 23-degree cone (5 degrees of margin) in Figure 23.
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Figure 22: Thruster Plume Velocity Profile for 18deg Cone
Figure 23: Thruster Plume Velocity Profile for 23deg Cone
To aid in the visualization of the plume velocities, Figure 24 and Figure 25 show the thruster
velocities at a distance of 0.156 meters as a function of radius.
Figure 24: Velocity Profile for 18-deg Cone at
0.156m
Figure 25: Velocity Profile for 23-deg Cone at
0.156m
The percentage of plume blockage was calculated based on these thruster plume velocity profiles.
Figure 26 and Figure 27 show plots of the plume blockage, with higher plume velocities in red
and lower plume velocities in violet.
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Figure 26: 18-deg Plume Cross-section at 0.156m
with Impingement from Top of HPG
Figure 27: 23-deg Plume Cross-section at 0.156m
with Impingement from Top of HPG
Based on the velocities for the 18-degree cone, 7.07% of the plume is impinged. For the 23degree cone, 10.28% of the plume is impinged. Table 3 shows the results after running the
calculations for several different configurations.
Table 3: Thruster Effectiveness with Halo Impingement for Various Configurations
Nominal
plume
Configuration
Thruster plain
+5 deg
plume
100.00%
100.00%
Thruster w/ Halo
92.93%
89.72%
Thruster w/ Halo + UDP on HPG
91.73%
88.76%
Thruster w/ Halo + Optics on HPG
85.14%
82.29%
Thruster w/ Halo + Optics on HP1
82.55%
75.93%
Thruster w/ Halo + Optics on HPG and HP1
74.76%
68.50%
This table demonstrates that the Halo with any existing peripherals causes acceptable thruster
performance degradation.
3
Halo Electrical Design
The Halo electrical design includes 3 types of PCBs: the Motherboard, Power board, and HP
boards. The single Halo Motherboard supports the 50-pin connector to interface with the VA
Stack, contains two USB hubs and an Ethernet switch, and routes wires to the proper HPs. It also
contains the circuitry necessary for HPG, including the 50-pin connector. The single Halo Power
board parallelizes the four Halo batteries, creates 5V and Ground lines from Batt+ and Batt-, and
routes power lines to the proper HPs. In addition, the Power board contains the circuitry for HP3,
including the 50-pin connector. The four HP boards take data lines and power lines from the
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Halo Motherboard and Power board and route them to the proper pins on the 50-pin connector
they each provide to interface with peripherals. The Halo PCB locations are shown in Figure 28.
Schematics for the Halo prototype can be found in Appendix C: Halo Motherboard Prototype
Schematics.
Halo
Port
PCBs
Halo
Port
PCBs
Figure 28: Halo PCB Locations
The block diagram in Figure 29 shows how the PCBs in the system interface with each other.
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Figure 29: Halo PCB Block Diagram
Note: The block diagram in Figure 29 is different from that of the prototype. For the prototype,
there is no connection to Halo Port 2 from the Power board, and the cable from the Motherboard
to the Power board only has 2x USB and 1x Ethernet.
3.1
Halo Motherboard
The block diagram of the Halo Motherboard is shown in Figure 30.
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Figure 30: Halo Motherboard Block Diagram
The Motherboard provides the male 50-pin connector to mate with the female connector on the
VA Stack. Coming out of the VA Stack are the following lines:
 4 USB 2.0 data lines
 1 Ethernet data line
 1 UART data line
 4 Ultrasound (US) receive data lines
 2 Infrared (IR) receive data lines
 1 IR transmit line
 Batt+ power line
 Batt- power line
 5V power line
 Ground line
More detail about the VA Stack external interface can be found in the VERTIGO Goggles ICD.
The Motherboard has voltage converters in order to supply 3.3V and 2.0V lines to the Ethernet
switch, USB hubs, and PIC processor on the board. The PIC is used to send signals along power
control lines to each of the ports so that ports can be powered on and off through software. The
PIC is the Microchip PIC32MX795F512L, which features 512+12(1)KB Program Memory,
128KB Data Memory, Embedded USB and Ethernet, and 5 independent I2C buses to provide
flexible interfaces to the Ethernet switch and USB hub. See Appendix B: Device Datasheets for
more information on the PIC. See Appendix C: Halo Motherboard Prototype Schematics for
additional detail on the block diagram.
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The Motherboard has all of the circuits for HPG, due to their proximity. The Motherboard
provides the LEDs for HPG.
3.1.1 USB
The Motherboard routes the first two of the USB lines directly to HPG. Thus, HPG has two
dedicated USB lines because, in the nominal configuration, the VERTIGO Optics Mount is
plugged into HPG. All other peripherals can share the other two USB lines.
The other two USB lines are each routed to a USB hub. The hubs each have eight nodes: one for
each of the six HPs (slaves), one to an external connector on the side of the Halo (slave), and one
to the VA Stack (master). Thus, HPG has four USB lines, and HPs 1-5 each have two USB lines.
Providing four USB lines to HPG leaves flexibility for a future peripheral requiring high
bandwidth to utilize all four lines. Note that the two lines routed to HPs 1-5 are on the same pins
as the two direct lines to HPG, which allows the VERTIGO Optics Mount, or any peripheral
requiring two USB lines (such as the Docking Port), to receive the two USB lines on the same
two pins no matter which HP they are attached to.
The USB hub integrated circuit (IC) is the Microchip USB2517i, which is a USB 2.0 Hi-Speed
7-Port Hub Controller (there are two in the design). Upstream ports are (2) VERTIGO Avionics
USBs, and available downstream ports are (12) Halo Ports (2 USB channels per port) and (2)
External USB Connectors. More information can be found in Appendix B: Device Datasheets.
3.1.2 Ethernet
The Motherboard routes the single Ethernet line to an Ethernet switch, which has nine nodes: one
for each of the six HPs, one to an external connector (RJ45), one to the VA Stack, and one to the
PIC processor. A switch is being used rather than a hub because it allows all nodes to talk at the
same time and to send and receive at the same time. The Ethernet coming out of the VA Stack is
1 Gbps.
The nine-port Ethernet switch IC is the Micrel KS8999 9-Port Ethernet Switch, which features
Integral Physical Layer Transceivers (PHY) and Media Access Control units (MAC). It can
operate as a standalone 8-port-switch or provide more customized operation via a PIC processor.
More information can be found in Appendix B: Device Datasheets. This device supports 10/100
Mbps Ethernet, and maybe upgraded to a 1 Gbps switch.
3.1.3 UART
The two UART lines are looped back so that UART1_RS232_TX goes to UART2_RS232_RX
and UART2_RS232_RX goes to UART2_RS232_TX. This loop-back is identical to what the
VERTIGO Optics Mount does when plugged directly into the VA Stack. The loop back
simplifies the design but does not allow peripherals to use UART in the future, so some
flexibility is lost. However, the Optics Mount and Docking Port do not need the UART lines.
The Optics Mount does not use them and the Docking Port has a USB to Serial converter so that
it simply needs the USB lines. As of April 2014, the team adding CMGs to SPHERES is
planning to use USB, and the team adding an optical range finder and a thermographic camera is
planning to use Ethernet.
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3.1.4 US/IR
There are four US receive lines, two IR receive lines, and one IR transmit line coming out of the
VA Stack that can be used to replace the blocked US/IR receivers and IR transmitters on the +X
face of the SPHERES. Because there are only four US receive and two IR receive lines, only
four US receivers and two IR receivers can be replaced at any time. Since the +X Face of the
SPHERES always needs them replaced, the lines are fed straight though to HPG.
Note: For the prototype, the Motherboard has only a single USB hub and no external connectors.
The Motherboard does not have a PIC processor or power control lines. The US/IR lines are
terminated rather than routed to HPG. Only 2 USB lines are routed to HPG. The Ethernet switch
supports 10/100 Mbps Ethernet rather than 1 Gbps.
3.2
Halo Power Board
The block diagram of the Halo Power board is shown in Figure 31.
Figure 31: Halo Power Board Block Diagram
The Power board provides the following lines to be routed to each of the HPs:
 Batt+ power line
 Batt- power line
 5V power line
 Ground line
10 April 2014
Halo Design Document
Page 32 of 54
These power lines are identical to the lines coming out of the VA Stack, so that any of the
peripherals can be plugged into any port.
The four batteries in the Halo battery assembly are parallelized on the Power board so that the
Batt+ and Batt- lines have a difference in electric potential of approximately 11.1V, unregulated,
which is sent to each HP. This voltage is also fed into a voltage regulator to produce the
regulated 5V and Ground lines, which are also sent to each HP. The 11.1V lines have a current
limit of 1.5A, and the 5V lines have a current limit of 1A.
Power control lines, which are routed to the Power board from the Motherboard PIC, allow the
power to each HP to be controlled through software. There is also a master power switch on the
Batt+ lines coming off the batteries. There is a circuit breaker in series with the power switch
that is rated for 7.5A. This number is slightly smaller than the maximum current that can be
drawn from the four batteries, which is 1.9A x 4 batteries = 7.6A.
The Halo power subsystem—rather than the VA Stack battery—powers HPG in order to increase
testing duration.
The Power board contains all of the circuits for HP3, because of their proximity. HP3 has two
LEDs.
See Appendix D: Halo Power Board Prototype Schematics for additional detail on the block
diagram.
Note: The prototype Power board does not route lines to HP2 or HP3.
3.3
Halo Port Board
The block diagram of the HP boards is shown in Figure 32.
10 April 2014
Halo Design Document
Page 33 of 54
Figure 32: HP Board Block Diagram
The HP boards combine data lines and power lines from the Motherboard and Power board into
one external HP interface to peripherals. The boards support 50-pin connectors to interface with
peripherals; these connectors are mechanically identical to the external connector on the VA
Stack. They are also electrically identical to the connector on the VA Stack, with the exception
that the UART and US/IR pins are unused. The HPs each have two LEDs. See Appendix E: Halo
Port Board Prototype Schematics for additional detail on the block diagram.
Note: The prototype Halo port boards route 10/100 Ethernet (4 pins) to the external connector
rather than 1 Gbps Ethernet (8 pins).
3.4
Halo Battery
The selected battery for the Halo power subsystem is the Nikon 16650 Lithium Ion Battery ENEL4a, which is currently used to power the VA Stack and is rechargeable on station. These
batteries are already on the ISS, and their small size allows them to integrate well into the Halo
structure. The batteries provide sufficient current and capacity to support an intensive Concept of
Operations. The Halo power subsystem has four of these batteries in parallel, giving the values
shown in Table 4.
10 April 2014
Halo Design Document
Page 34 of 54
Table 4: Nikon Battery Specifications
Voltage
(V)
Single
Battery
Power
Subsystem
Total
Capacity
Mass
(kg)
Volume
(cm3)
Max
Current
(A)
Specific
Capacity
(Wh/kg)
Capacity
Density
(Wh/cm3)
(Wh)
(Ah)
11.1
28
2.5
0.162
115
1.9
172.84
0.24
11.1
112
10
0.648
460
7.6
172.84
0.24
3.5 Halo Electrical Interfaces
All Halo interfaces are mechanically and electrically identical to the VA Stack interface. The
only changes are that there are empty pins in place of the UART lines (boxed in red), and HPs 15 also have empty pins in place of two of the USB lines (boxed in green), as shown in Figure 33,
which depicts the VA Stack 50-pin connector schematic.
Figure 33: Halo Electrical Interfaces
10 April 2014
Halo Design Document
Page 35 of 54
Note: The prototype Halo port electrical interfaces have 10/100 Ethernet (4 pins) rather than 1
Gbps Ethernet (8 pins).
10 April 2014
Halo Design Document
Page 36 of 54
Appendix A: Engineering Drawings
10 April 2014
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Page 37 of 54
10 April 2014
Halo Design Document
Page 38 of 54
Appendix B: Device Datasheets
10 April 2014
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Page 39 of 54
10 April 2014
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Page 40 of 54
10 April 2014
Halo Design Document
Page 41 of 54
Appendix C: Halo Motherboard Prototype Schematics
1
2
3
4
5
6
HP1 PORT
M1
M2
M3
M4
M5
M6
P1
RX1_P
RX1_N
A
M7
P3
EXTTX_P
11
12
10
EXTTX_N
EXTRX _P
4
6
5
EXTRX _N
13
TRD1+
TRCT1
TRD1-
TRD3+
TRCT3
TRD3-
TRD2+
TRCT2
TRD2-
TRD4+
TRCT4
TRD4-
SHLD
SHLD
Mounting Hole
Mounting Hole
Mounting Hole
Mounting Hole
Mounting Hole
Mounting Hole
3
1
2
M13
8
7
9
Mounting Hole
M8
Mounting Hole
M14
Mounting Hole
M9
Mounting Hole
M15
Mounting Hole
M10
M11
Mounting Hole
M16
Mounting Hole
Mounting Hole
Mounting Hole
F1
SW_BA TT+
M12
RX 1_P
RX1_M
TX1_P
TX1_M
Mounting Hole
M17
1
3
5
7
9
11
13
15
17
19
USBA_PORT1_P
USBA_PORT1_N
Ethernet
Ethernet.SchDoc
VDDTXRX
VDDTXRX
Mounting Hole
M18
RX 2_P
RX2_M
TX2_P
TX2_M
Mounting Hole
Fuse Thermal
RX1_P
RX1_N
TX1_P
TX1_N
RX2_P
RX2_N
TX2_P
TX2_N
GND
GND_SIG
P5
1
3
5
7
9
11
13
15
17
19
USBA_PORT5_P
USBA_PORT5_N
F3
RX 5_P
RX5_M
TX5_P
TX5_M
+2.0VDC_PL
+2.0VDC_PL
+2.0VDC_A
+2.0VDC_A
+2.0VDC
+2.0VDC
+3.3VDC
+3.3VDC
RX 6_P
RX6_M
TX6_P
TX6_M
RX 7_P
RX7_M
TX7_P
TX7_M
RX 8_P
RX8_M
TX8_P
TX8_M
GND_A
GND
B
RX5_P
RX5_N
TX5_P
TX5_N
SW_BA TT+
Fuse Thermal
GND
GND_SIG
EXTRX _P
EXTRX _N
EXTTX_P
EXTTX_N
USB_VD3_P
USB_VD3_N
+5VDC
USB2_D+
USB2_D-
USBUP_D+
USBUP_DVBUS_UP
USB3_D+
USB3_DUSB4_D+
USB4_DUSB5_D+
USB5_D-
+5VDC
+3.3VDC
VA Stack
ERM8-025-09.0-S-DV-K-TR
C
TD2_N
TD2_P
GND
TD0_N
TD0_P
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
USB_VD5_P
USB_VD5_N
RX2_P
RX2_N
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
USBA_PORT2_P
USBA_PORT2_N
USBA_PORT1_P
USBA_PORT1_N
USBB_PORT1_P
USBB_PORT1_N
GND
USBA_PORT5_P
USBA_PORT5_N
GND_SIG
P6
ERF8-025-05.0-S-DV -TR
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
F5
Fuse Thermal
Fuse Thermal
UA RT1_232TX/422TX+
UA RT1_232RX/422RX+
TD3_N
TD3_P
TD1_N
TD1_P
+5VDC
TD2_N
TD2_P
U_Power
Power.SchDoc
SW_BATT+
+3.3VDC
+3.3VDC
+5VDC
+2.0VDC
+2.0VDC
TXG_N
TXG_P
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
USB_VD5_P
USB_VD5_N
USBA_PORT6_N
USBA_PORT6_P
USBB_PORT6_N
USBB_PORT6_P
C
USB_VD4_N
USB_VD4_P
TD3_N
TD3_P
RXG_N
RXG_P
Header 25X2
GND
+2.0VDC_A
+2.0VDC_A
+2.0VDC_PL
+2.0VDC_PL
GND_SIG
1M
HP2_PWREN
GND
GND
GND
SW_BA TT+
B
+5VDC
HPG PORT
+5VDC SW_BA TT+
USBB_PORT5_P
USBB_PORT5_N
F6
USB_VD4_N
USB_VD4_P
USBB_PORT2_P
USBB_PORT2_N
USBB_PORT2_P
USBB_PORT2_N
USB_VD6_N
USB_VD6_P
USB_VD3_N
USB_VD3_P
TX2_P
TX2_N
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
Header 15x2
USBA_PORT2_P
USBA_PORT2_N
USB7_D+
USB7_D-
GND
+5VDC
Fuse Thermal
P2
TD1_P
TD1_N
TD0_P
TD0_N
+3.3VDC
P4
R1
GND
USB6_D+
USB6_D-
F4
HP5_PWREN
GND
USBHub1
USBHub.SchDoc
USB1_D+
USB1_D-
USBB_PORT5_P
USBB_PORT5_N
HP2 PORT
GND
RESET_N
TX5_P
TX5_N
2
4
6
8
10
12
14
16
18
20
Header 10X2
RXG_P
RXG_N
TXG_P
TXG_N
SW_BA TT+
GND_A
V DDTXRX
A
HP5 PORT
Mounting Hole
IR_TX
US_RX _11A_EXT
US_RX _11B_EXT
IR_RX_11_EXT
US_RX _12A_EXT
US_RX _12B_EXT
IR_RX_12_EXT
+5VDC
Fuse Thermal
M19
14
RESET_N
+5VDC
F2
HP1_PWREN
GND
RX5_P
RX5_N
GND
USBB_PORT1_P
USBB_PORT1_N
Header 10X2
LAN
GND
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
TX1_P
TX1_N
2
4
6
8
10
12
14
16
18
20
GND_A
GND_SIG
GND_SIG
GND_SIG
GND
GND_A
D1
R2
+2.0VDC
In 100-BA SE-TX and 10BA SE-T modes, TD2P/TD2M and TD3P/TD3M are unused
10
TD0P/TD0M are used for transmit pair under MDI configuration and for receive pair under MDIX configuration
BATT
TD1P/TD1M are used for receive pair under MDI configuration and for transmit pair under MDIX configuration
D2
R3
+3.3VDC
130
BATT
D
SW_BATT+
R4
D3
D
GND
1.5K
LEFT
R5
D4
Title
1.5K
Electrical Schematic, PROTO Halo Port, Goggles PCB (HPG)
RIGHT
Size
GND
C
Date:
File:
1
10 April 2014
2
3
4
Halo Design Document
5
Number
Revision
NaA
4/8/2014
C:\Users\..\BlockDiagram.SchDoc
Sheet of
Drawn By:
6
Page 42 of 54
1
2
3
4
5
6
+2.0VDC_A
6
7
8
9
10
RX 2_P
RX 2_M
A
TX2_P
TX2_M
15
14
13
12
11
16
17
18
19
20
RD3RD3+
CT3
TD3TD3+
RX3RX3+
CMT3
TX3TX3+
RD2RD2+
CT2
TD2TD2+
RX2RX2+
CMT2
TX2TX2+
RD1RD1+
CT1
TD1TD1+
RX1RX1+
CMT1
TX1TX1+
36
37
38
39
40
35
34
33
32
31
26
27
28
29
30
25
24
23
22
21
RXP1
RXM1
TXP1
TXM1
196
197
199
200
RXP2
RXM2
TXP2
TXM2
206
207
203
204
RXP3
RXM3
TXP3
TXM3
5
6
9
10
RXP4
RXM4
TXP4
TXM4
22
23
19
20
RX P[1]
RX M[1]
TXP[1]
TXM[1]
RX P[3]
RX M[3]
TXP[3]
TXM[3]
RX P[4]
RX M[4]
TXP[4]
TXM[4]
30
31
33
34
RX P[5]
RX M[5]
TXP[5]
TXM[5]
47
48
43
44
U3
TX5_P
TX5_M
30
29
28
27
26
RX 6_P
RX 6_M
TX6_P
TX6_M
31
32
33
34
35
RX 7_P
RX 7_M
TX7_P
TX7_M
B
40
39
38
37
36
RX 8_P
RX 8_M
TX8_P
TX8_M
TX1+
TX1CMT1
RX1+
RX1-
TD1+
TD1CT1
RD1+
RD1-
TX2+
TX2CMT2
RX2+
RX2-
TD2+
TD2CT2
RD2+
RD2-
TX3+
TX3CMT3
RX3+
RX3-
TD3+
TD3CT3
RD3+
RD3-
TX4+
TX4CMT4
RX4+
RX4-
TD4+
TD4CT4
RD4+
RD4-
S558-5999-Q9-F
R10
75
R11
75
R12
75
R13
75
R14
75
R15
75
R16
75
R17
75
C3
1nF
C4
1nF
C5
1nF
C6
1nF
C7
1nF
C8
1nF
C9
1nF
C10
1nF
20
19
18
17
16
RXP5
RXM5
11
12
13
14
15
RXP6
RXM6
10
9
8
7
6
RXP7
RXM7
TXP5
TXM5
RX P[7]
RX M[7]
TXP[7]
TXM[7]
64
65
61
62
RX P[8]
RX M[8]
TXP[8]
TXM[8]
96
97
98
99
100
101
102
103
104
119
120
121
122
123
124
TXP7
TXM7
1
2
3
4
5
RX P[6]
RX M[6]
TXP[6]
TXM[6]
54
55
57
58
TXP6
TXM6
RXP8
RXM8
TXP8
TXM8
C1
10uF
GND_A
Disable MII for prototype
LED1[3]
LED1[2]
LED1[1]
LED1[0]
LED2[3]
LED2[2]
LED2[1]
LED2[0]
LED3[3]
LED3[2]
LED3[1]
LED3[0]
LED4[3]
LED4[2]
LED4[1]
LED4[0]
LED5[3]
LED5[2]
LED5[1]
LED5[0]
LED6[3]
LED6[2]
LED6[1]
LED6[0]
LED7[3]
LED7[2]
LED7[1]
LED7[0]
LED8[3]
LED8[2]
LED8[1]
LED8[0]
LED9[3]
LED9[2]
LED9[1]
LED9[0]
RX P[2]
RX M[2]
TXP[2]
TXM[2]
S558-5999-Q9-F
21
22
23
24
25
RX 5_P
RX 5_M
MODESEL3
MODESEL2
MODESEL1
MODESEL0
MTXEN
MTXD[3]
MTXD[2]
MTXD[1]
MTXD[0]
MTXER
MTXC
MCOL
MCRS
MRX DV
MRX D[3]
MRX D[2]
MRX D[1]
MRX D[0]
MRX C
162
163
ISET
FXSD[1]
FXSD[2]
FXSD[3]
FXSD[4]
FXSD[5]
FXSD[6]
FXSD[7]
FXSD[8]
RSTa
SDA
SCL
MIIS[1]
MIIS[0]
X1
X2
111
112
113
114
115
116
117
118
127
128
129
130
131
132
133
134
137
138
139
140
141
142
143
144
145
146
147
149
150
151
152
153
158
159
160
161
GND
GND
+3.3VDC
164
165
166
167
+3.3VDC
R6
2.2K
R7
2.2K
U4
8
26
7
GND
190
191
192
193
68
69
70
71
+3.3VDC
6
R8
3.01K
5
V CC
A0
WP
A1
SCL
A2
SDA
GND
1
2
+3.3VDC
3
U2C
Enable AUTOMDIX
87
156
4
R9
10K
GND
GND
GND
110
92
93
RESET_N
Float all other pins for normal operation
R18
499K
GND
Y1 18pF
25MHz
C12
49.9 1a
RXP2
RXM2
49.9 1a
RXM3
RXP5
49.9 1a
TXP3
49.9 1a
49.9 1a
49.9 1a
49.9 1a
U2A
C17
C18
C19
0.1uF
0.1uF
0.1uF
1
4
25
28
49
52
67
194
C20
10uF
C22
GND
16
17
36
37
59
60
201
202
0.1uF
C32
0.1uF
74
75
78
79
182
183
186
187
R36
TXP5
C33
49.9 1a
R37
49.9 1a
+2.0VDC_A
0.1uF
R34
TXM4
0.1uF
C34
R38
TXM5
0.1uF
49.9 1a
0.1uF
+2.0VDC_PL
RXP6
R39
49.9 1a
RXM6
49.9 1a
R41
49.9 1a
R40
TXP6
C42
+2.0VDC
C43
R42
TXM6
0.1uF
49.9 1a
R43
49.9 1a
RXM7
C55
49.9 1a
R45
49.9 1a
R44
TXP7
49.9 1a
49.9 1a
RXM8
49.9 1a
V DD_TX
V DD_TX
V DD_TX
V DD_TX
V DD_TX
V DD_TX
V DD_TX
V DD_TX
GND_TX
GND_TX
GND_TX
GND_TX
GND_TX
GND_TX
GND_TX
GND_TX
V DD_RCV
V DD_RCV
V DD_RCV
V DD_RCV
V DD_RCV
V DD_RCV
V DD_RCV
V DD_RCV
GND_RCV
GND_RCV
GND_RCV
GND_RCV
GND_RCV
GND_RCV
GND_RCV
GND_RCV
V DD_PLLTX
GND_PLLTX
V DD
V DD
V DD
V DD
GND-ISO
GND-ISO
GND-ISO
GND-ISO
GND-ISO
V DD-IO
V DD-IO
V DD-IO
GND
GND
GND
GND
GND
GND
GND
0.1uF
TXP8
49.9 1a
0.1uF
49.9 1a
GND_A
C
+2.0VDC_A
15
21
32
38
56
63
198
205
C30 C23
10uF 0.1uF
72
73
76
77
184
185
188
189
C24
C25
C26
C27
C28
C29
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
GND_A
+2.0VDC_A
C41
10uF
179
18
27
35
53
208
+2.0VDC_A
C35
C36
C37
0.1uF
0.1uF
0.1uF
C44
C50
10uF
+2.0VDC_A0.1uF
95
106
107
126
136
154
155
GND_A
0.1uF
C60
C61
C62
0.1uF
C47
C48
C49
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C51
C52
C53
C54
0.1uF
0.1uF
0.1uF
0.1uF
GND_A
D
0.1uF
0.1uF
0.1uF
0.1uF
C63
10uF
Title
Size
3
Number
Revision
C
Date:
File:
10 April 2014
C40
0.1uF
C46
GND
C59
GND_A
2
C39
0.1uF
C45
GND_A
GND
1
C38
C58
R50
TXM8
2
3
24
29
50
51
66
195
K S(Z)8999
R48
C57
R49
105
125
148
GND_RX
GND_RX
GND_RX
GND_RX
GND_RX
GND_RX
GND_RX
GND_RX
C56
+2.0VDC
RXP8
94
108
135
157
V DD_RX
V DD_RX
V DD_RX
V DD_RX
V DD_RX
V DD_RX
V DD_RX
V DD_RX
R46
TXM7
0.1uF
D
R47
178
0.1uF
+3.3VDC
RXP7
+3.3VDC
+3.3VDC
C16
R32
TXP4
C31
82
109
168
169
170
171
0.1uF
R30
TXM3
0.1uF
88
89
90
173
172
GND
1 = EEPROM interface or not programmed on this interface
R28
C21
R35
49.9 1a
RXM5
Reserve
Reserve
B
83
84
85
86
K S(Z)8999
R26
TXM2
0.1uF
R33
49.9 1a
RLPBK
BIST
TESTEN
SCA NEN
PRSV
CFGMODE
EN1P
175
174
181
80
180
81
C14
R24
49.9 1a
R31
49.9 1a
RXM4
49.9 1a
TXP2
C15
R29
49.9 1a
RXP4
0.1uF
R27
T1
T2
T3
T4
T5
R22
TXM1
R25
49.9 1a
RXP3
49.9 1a
MUX 1
MUX 2
TEST1
TEST2
A OUT
A OUT2
DOUT
DOUT2
Enable 802.1P for all ports
GND
BTOUT
BTOUT2
CTOUT
CTOUT2
QH2
QH3
QH4
QH5
46
7
45
8
C11
10uF
R20
TXP1
C13
R23
49.9 1a
C
QL2
QL3
QL4
QL5
14
13
12
11
C2
176
177
A UTOMDIX
IO_SWM
39
40
41
42
91
R21
A
GND
GND
R19
+3.3VDC
GND_A
18pF
49.9 1a
+2.0VDC
GND_A
GND_A
RXM1
+2.0VDC_A
+2.0VDC
+3.3VDC
KS(Z)8999
RXP1
+2.0VDC_PL
+2.0VDC_A
U2B
RX4RX4+
CMT4
TX4TX4+
2
TX1_P
TX1_M
RD4RD4+
CT4
TD4TD4+
1
U1
5
4
3
2
1
RX 1_P
RX 1_M
+2.0VDC_PL
4
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5
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1
2
3
+2.0VDC
4
+2.0VDC_A
A
1
FB1
SW_BATT+
2
SW_BATT+
+5VDC
+5VDC
A
FBEAD
C64
47uF
C65
0.1uF
C66
22uF C67
10nF
+2.0VDC_PL
+2.0VDC_PL
+2.0VDC_A
+2.0VDC_A
C68
0.1uF
+2.0VDC_PL
1
FB2
+2.0VDC
+2.0VDC
+3.3VDC
+3.3VDC
2
FBEAD
C69
47uF C70
0.1uF
1
B
FB3
C71
0.1uF
GND
GND
2
B
FBEAD
GND_A
GND_A
U6
LMZ23603TZ
R52
3
+5VDC
C
1.5K
2
4
VOUT
FB
SYNC
AGND
SW_BATT+
+2.0VDC
EN
PAD
C73
22uF
VIN
PGND
1
R51
R54
5
6
R56
1.5K
C77
0.47uF
3
1.5K
2.26K
SS/TRK
U5
LMZ23603TZ
1
7
C75
220uF
2
C72
22uF
4
VIN
+3.3VDC
7
VOUT
EN
AGND
R53
5
FB
SYNC
PAD
SW_BATT+
GND_A
PGND
GND
C
3.32K
6
SS/TRK
C76
0.47uF
C74
220uF
R55
1.07k
GND
GND
GND
GND
Title
D
Size
D
Number
Revision
A
Date:
File:
1
10 April 2014
2
3
Halo Design Document
4/8/2014
C:\Users\..\Power.SchDoc
Sheet of
Drawn By:
4
Page 44 of 54
1
2
+3.3VDC
3
4
5
6
+3.3VDC
GND
A
A
GND
+3.3VDC
U7B
R58
100K
C78
1.0uF
44
VBUS_UP
100K
59
58
USBUP_D+
USBUP_D-
61
C79
C80
USB1_D-
VBUS_DET
SDA/SMBDATA/NON_REM1
USBUP_DP
USBUP_DM
SCL/SMBCLK/CFG_SEL0
HS_IND/CFG_SEL1
CFG_SEL2
51
41
50
42
13
R60
28
+3.3VDC
XTAL1/CLKIN
45
0 ohm
R61
R62
0 ohm
0 ohm
Y2
24MHz
RESET_N
43
GND
USB2_D-
RESET_N
XTAL2
3
+3.3VDC
+3.3VDC
49
62
VDDPLL18
VDD33CR
GND
25
C85
0.1uF
4
26
18pF
C84
1
40
USB2_D+
60
2
29
SUSP_IND/LOCAL_PWR/NON_REM0
R63
1M
1
2
B
USB1_D+
U7A
R59
18pF
R57
10K
GND
1.0uF
C86
0.1uF
63
C87
1.0uF
19
65
R64
12K
VDD33
VDD18
VDDA33
VDDA33
VDDA33
VDDA33
RBIAS
TEST
VSS(PAD)
VDD33PLL
USB2517
24
48
46
27
5
10
52
57
C82
C83
0.1uF
0.1uF
1.0uF
USB3_D+
64
USB3_DC88
0.1uF
GND
C81
C89
0.1uF
C90
0.1uF
C91
0.1uF
C92
0.1uF
6
23
C93
1.0uF
7
GND
47
34
GND
22
GND
USBDN1_DP/PRT_DIS_P1
USBDN5_DP/PRT_DIS_P5
USBDN1_DM/PRT_DIS_M1
USBDN5_DM/PRT_DIS_M5
PRTPWR1
PRTPWR5
LED_A1_N/PRT_SWP1
LED_A5_N/PRT_SWP5
LED_B1_N/BOOST0
LED_B5_N
OCS1_N
OCS5_N
USBDN2_DP/PRT_DIS_P2
USBDN6_DP/PRT_DIS_P6
USBDN2_DM/PRT_DIS_M2
USBDN6_DM/PRT_DIS_M6
PRTPWR2
PRTPWR6
LED_A2_N/PRT_SWP2
LED_A6_N/PRT_SWP6
LED_B2_N/BOOST1
LED_B6_N
OCS2_N
OCS6_N
USBDN3_DP/PRT_DIS_P3
USBDN7_DP/PRT_DIS_P7
USBDN3_DM/PRT_DIS_M3
USBDN7_DM/PRT_DIS_M7
PRTPWR3
PRTPWR7
LED_A3_N/PRT_SWP3
LED_A7_N/PRT_SWP7
LED_B3_N/GANG_EN
LED_B7_N
OCS3_N
OCS7_N
12
USB5_D+
11
USB5_D-
30
31
18
35
54
USB6_D+
53
USB6_D-
B
39
17
16
38
56
USB7_D+
55
USB7_D-
36
15
14
37
C
C
USB4_D+
USB4_D-
9
8
20
33
32
21
USBDN4_DP/PRT_DIS_P4
USBDN4_DM/PRT_DIS_M4
PRTPWR4
LED_A4_N/PRT_SWP4
LED_B4_N
OCS4_N
USB2517
D
D
Title
Size
Number
Revision
B
Date:
File:
1
10 April 2014
2
3
4
Halo Design Document
5
4/8/2014
C:\Users\..\USBHub.SchDoc
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Page 45 of 54
10 April 2014
Halo Design Document
Page 46 of 54
Designator
Footprint
Manufacturer
Quantity
Value
SM/ C_1206
TDK Corp
C3216X7R1V106K160AC
7 10uF
C2aC12aC79aC80
SM/ C_0603
M urata
GRM 1885C2A180JA01D
4 18pF
C3aC4aC5aC6aC7aC8aC9aC10
SM/ C_0603
Kemet
C0603C102K5RACTU
8 1nF
C13aC14aC15aC16aC17aC18aC19a
C21aC22aC23aC24aC25aC26aC27a
C28aC29aC31aC32aC33aC34aC35a
C36aC37aC38aC39aC40aC42aC43a
C44aC45aC46aC47aC48aC49aC51a
C52aC53aC54aC55aC56aC57aC58a
C59aC60aC61aC62aC65aC68aC70a
C71aC81aC82aC84aC86aC88aC89a
C90aC91aC92
SM/ C_0603
TDK Corp
C1608X7R1H104K080AA
C64aC69
SM/ C_2220
TDK Corp
C5750X7R1C476M230KB
2 47uF
C66aC72aC73
SM/ C_2220
Kemet
C2220X226K3RACTU
3 22uF
C67
SM/ C_0603
Kemet
C0603C103K5RACTU
1 10nF
C74aC75
SM/ CT_7343_12 Kemet
T495X227K016ATE100
2 220uF
C76aC77
SM/ C_0603
TDK Corp
CGA3E3X7R1E474K080AB
2 0.47uF
C78aC83aC85aC87aC93
SM/ C_0603
TDK Corp
C1608X7R1E105K080AB
5
D1aD2
SM/ D_0805_21
Dialight
598-8160-107F
2
D3aD4
APA3010
KingBright
APA3010CGCK-GX
2
F1aF3aF5
SM/ R_1812
Bel Fuse
0ZCC0150BF2C
3
F2aF4aF6
SM/ R_1206
Littelfuse
1206L150/ 12SLYR
3
MI0805K601R-10
3
FB1aFB2aFB3
SM/ L_0805
Laird
M HOLE_201/ CLE
AR401a
M HOLE_201/ CLE
AR401a
M HOLE_201/ CLE
AR401a
M HOLE_201/ CLE
AR401a
M HOLE_201/ CLE
AR401a
M HOLE_201/ CLE
AR401a
M HOLE_116/ CLE
AR316a
M HOLE_116/ CLE
AR316a
M HOLE_116/ CLE
AR316a
M HOLE_116/ CLE
AR316a
M HOLE_116/ CLE
AR316a
M HOLE_116/ CLE
AR316a
M HOLE_116/ CLE
AR316a
M HOLE_116/ CLE
AR316a
M HOLE_116/ CLE
AR316a
M HOLE_116/ CLE
AR316a
M HOLE_116/ CLE
M 1aM2aM 3aM 4aM5aM 6aM 7aM8a
AR316a
M 9aM10aM11aM 12aM 13aM 14aM 15a M HOLE_116/ CLE
M 16aM 17aM 18aM 19
AR316a
10 April 2014
ManufacturerPartNumber
C1aC11aC20aC30aC41aC50aC63
59
19
P1aP5
SM20B-SRDS-GTF
JST Inc
SM 20B-SRDS-G-TF
2
P2
SM30B-SRDS-GTF
JST Inc
SM 30B-SRDS-G-TF
1
P3
LAN-MAG
7499111005
7499111005
1
P4
ERM8-025-09.0X-DV EXT
Samtec
ERM 8-025-09.0-S-DV-K-TR
1
P6
ERF8-025-05.0-XDV - EXT PD
Samtec
ERF8-025-05.0-S-DV-TR
1
R1aR63
SM/ R_0603
Panasonic
ERJ-3EKF1004V
2 1M
R2
SM/ R_0603
Panasonic
ERJ-3EKF10R0V
1 10
R3
SM/ R_0603
Panasonic
ERJ-3EKF1300V
1 130
R4aR5aR51aR52aR56
SM/ R_0603
Panasonic
ERJ-3EKF1501V
5 1.5K
R6aR7
SM/ R_0603
Panasonic
ERJ-3EKF2201V
2 2.2K
R8
SM/ R_0603
Panasonic
ERJ-3EKF3011V
1 3.01K
R9aR57
SM/ R_0603
Panasonic
ERJ-3EKF1002V
2 10K
R10aR11aR12aR13aR14aR15aR16aR17 SM/ R_0603
Panasonic
ERJ-3EKF75R0V
8 75
R18
SM/ R_0603
Panasonic
ERJ-3EKF4993V
1 499K
R19aR20aR21aR22aR23aR24aR25a
R26aR27aR28aR29aR30aR31aR32a
R33aR34aR35aR36aR37aR38aR39a
R40aR41aR42aR43aR44aR45aR46a
R47aR48aR49aR50
SM/ R_0603
Panasonic
ERJ-3EKF49R9V
R53
SM/ R_0603
Panasonic
ERJ-3EKF3321V
1 3.32K
R54
SM/ R_0603
Panasonic
ERJ-3EKF2261V
1 2.26K
R55
SM/ R_0603
Panasonic
ERJ-3EKF1071V
1 1.07k
R58aR59
SM/ R_0603
Panasonic
ERJ-3EKF1003V
2 100K
R60aR61aR62
SM/ R_0603
Panasonic
ERJ-3GEY0R00V
3 0 ohm
R64
SM/ R_0603
Panasonic
ERJ-3EKF1202V
1 12K
U1aU3
SOG.050/ 40/ 1.1x
0.6
Bel Fuse
S558-5999-Q9-F
2
U2
QUAD.50M/ 208/
CQFP
M icrel
KSZ8999I
1
U4
DIP8
Atmel
AT24C02C-XHM -T
1
U5aU6
LMZ14202
Texas Inst
LMZ23603TZ
2
U7
QFN64_9MM
M icrochip
USB2517i
1
Y1
XTAL_2P_6X3.5M
M
Abracon
ABM 7-25.000MHZ-D2Y-T
1
Y2
XTAL_2P_6X3.5MMAbracon
ABM 7-24.000MHZ-D2Y-T
1
Wurth
Electronics Inc
32
Halo Design Document
Page 47 of 54
Appendix D: Halo Power Board Prototype Schematics
1
2
3
4
U_Power
Power.SchDoc
HPa PORT
SW_BATTa
A
A
SM20B-SRDS-G-TF
P2
RX_P
RX_N
HP4 PORT
USBA_PORT2_P
USBA_PORT2_N
SM20B-SRDS-G-TF
P3
1
3
5
7
9
11
13
15
17
19
F1
2
4
6
8
10
12
14
16
18
20
SW_BATTa
Fuse Thermal
GND
SW_BATTa
B
SW_BATTa
HP Exter nal Connector
R9
TX_N
TX_P
Fuse Thermal
10 April 2014
GND
HP2_PWREN
GND
GND
R10
B
M B to PB Connector
1.5K
SM30B-SRDS-G-TF
P1
RX_P
RX_N
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
USBA_PORT2_P
USBA_PORT2_N
F3
USBA_PORT2_P
USBA_PORT2_N
SW_BATTa
4.5A
GND
GND_SIG
TX_P
TX_N
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
USBB_PORT2_P
USBB_PORT2_N
F4
a5VDC
3A
C
HP2_PWREN
GND
USBB_PORT2_N
USBB_PORT2_P
RX_N
RX_P
Title
Size
1
a5VDC
a5VDC
D10
D
GND_SIG
a5VDC
F2
1.5K
GND
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
C
SW_BATTa
USBB_PORT2_P
USBB_PORT2_N
GND_SIG
ERF8-025-05.0-S-DV-TR
P4
SW_BATTa
TX_P
TX_N
2
4
6
8
10
12
14
16
18
20
D9
a5VDC
GND
1
3
5
7
9
11
13
15
17
19
D
Number
Revision
A
GND_SIG
Date:
File:
2
3
Halo Design Document
4/8/2014
C:\Users\..\BlockDiagram.SchDoc
Sheet of
Drawn By:
4
Page 48 of 54
1
2
3
4
SW_BATTa
D1
A
A
SW_BATTa
BATT1
a5VDC
a5VDC
1
2
D Schottky
1
2
D Schottky
1
2
SW_BATTa
D2
GND
F5
Main SW
CB
GND
5A
D3
D4
BATT2
D Schottky
1
2
D Schottky
F6
5A
D5
D6
D Schottky
D Schottky
B
B
BATT3
1
2
F7
5A
D7
D8
BATT4
D Schottky
1
2
D Schottky
F8
5A
GND
C
C
U1
4
5
6
SW_BATTa
R2
R1
45.3K Ohm 100k Ohm
10
14
C1
10uF
C2
4.7uF
9
1
8
R3
GND
D
C6
22nF
GND
R4
33.2K Ohm
R5
5.76K Ohm
0.1uF
PVIN
PVIN
VIN
BOOT
L1
PWRGD
VSENSE
SS/TR
RT/CLK
COMP
GND
GND
Exp Pad
12
11
Inductor Iron
10mH
7
GND
C9
560pF
R7
10K Ohm
C4
3.3nF
GND
GND
Title
D
Number
Revision
A
GND
Date:
File:
10 April 2014
C8
10uF
TPS54821
Size
1
C7
4.7uF
R8
1.37K Ohm
2
3
15
GND
C5
33pF
a5VDC
C3
PH
PH
EN
13
2
3
Halo Design Document
4/8/2014
C:\Users\..\Power.SchDoc
Sheet of
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4
Page 49 of 54
10 April 2014
Halo Design Document
Page 50 of 54
10 April 2014
Halo Design Document
Page 51 of 54
Appendix E: Halo Port Board Prototype Schematics
1
2
3
4
M B/PB Connector
SM20B-SRDS-G-TF
RX_P
RX_N
A
1
3
5
7
9
11
13
15
17
19
USBA_P
USBA_N
HP Exter nal Connector
SW_BATT+
+5VDC
TX_P
TX_N
2
4
6
8
10
12
14
16
18
20
A
USBB_P
USBB_N
+5VDC
HP_PWREN
P3
ERF8-025-05.0-S-DV-TR
GND
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
SW_BATT+
B
TX_N
TX_P
GND
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
GND_SIG
M B/PB Connector
GND
USBA_P
USBA_N
SM20B-SRDS-G-TF
RX_P
RX_N
1
3
5
7
9
11
13
15
17
19
USBA_P
USBA_N
SW_BATT+
USBB_P
USBB_N
B
+5VDC
HP_PWREN
P1
USBB_N
USBB_P
GND
GND_SIG
GND
RX_N
RX_P
P2
C
R1
SW_BATT+
GND_SIG
TX_P
TX_N
2
4
6
8
10
12
14
16
18
20
D1
C
1.5K
LEFT
GND_SIG
R2
D2
1.5K
RIGHT
GND
Title
D
Electrical Schematic, Halo Port, Corner PCB aHP1, HP2, HP4, HP5)
Size
A
Date:
File:
1
10 April 2014
2
3
Halo Design Document
Number
D
Revision
HAL OaSPa011
4/10/2014
C:\Users\..\BlockDiagram.SchDoc
Sheet of
Drawn By:
4
Page 52 of 54
10 April 2014
Halo Design Document
Page 53 of 54
PWB Assembly BOM
HPBoardProto.PrjPcb
Project:
HPBoardProto.PrjPcb
Designer:
PWB PN:
ASM PN:
Number of PWB Assemblies
<Parameter DrawnBy not found>
<Parameter PWBPartNumber not found>
None
10
Report Date:
Print Date:
a
<Parameter Title not found>
Source Data From:
4/10/2014
10-Apr-14
Revision
8:38:39 PM
8:38:45 PM
Order Quantity aColumn Name Error:Supplier1PartNumber
aColumn Name Error:Supplier1
Designator
aColumn Name Error:Manufacturer
ManufacturerPartNumber
1
#DIV/0a
D1, D2
APA3010CGCK-GX
2
#DIV/0a
P1, P3
SM20B-SRDS-G-TF
3
#DIV/0a
P2
ERF8-025-05.0-S-DV-TR
4
#DIV/0a
R1, R2
ERJ-3EKF1501V
Approved
10 April 2014
<Parameter Revision not found>
Value
aColumn Name Error:Description
Quantity
aColumn Name Error:MinQuantity
2
2
1
1.5K
2
7
Notes
Halo Design Document
Page 54 of 54
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