ESE370:
Circuit-Level
Modeling, Design, and Optimization
for Digital Systems
Day 24: October 27, 2014
Distributed RC Wire and
Elmore Delay
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Penn ESE370 Fall2014 -- DeHon
Previously: Equivalent RC
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Previously:
Chain without Inverters
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Today
• Estimate delay in RC Network
– Elmore delay calculation
• Wire Delay
• Apply to pass transistor circuits
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Distributed RC
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What is response?
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SPICE Response
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Intuition
• Look at series of R’s on path
– Must move Q=V(SC) across each R
• Not as much as if both R’s precede C’s
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Penn ESE370 Fall2014 -- DeHon
Elmore Delay
• For each resistor Ri in path
– Compute CRi = sum of all C’s downstream of Ri
– Delay through Ri is Ri×CRi



Delay  
R

C

j 
 i
path
path
i 
 j 
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Superposition
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Superposition
R1
R1
C1
R2
C2
R2
R1
C1
C2
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Superposition
R1*C1
(R1+R2)*C2
R1
R1
C1
C2
R2
R1
C1
Penn ESE370 Fall2014 -- DeHon
R2
C2
R1*(C1+C2)+R2*C2
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Superposition not concurrent
• Don’t happen concurrently since must
divide current
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Superposition
• For R1=R2=R, C1=C2=C
– Delay = 3RC
R2
R1
C1
Penn ESE370 Fall2014 -- DeHon
C2
R1*(C1+C2)+R2*C2
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Compare KCL: Setup
• Equations from KCL?
• (V1-V2)/R1 = (V2-V3)/R2 + C1(dV2/dt)
• (V2-V3)/R2=C2(dV3/dt)
V2
R2
R1
C1
Penn ESE370 Fall2014 -- DeHon
V3
C2
R1*(C1+C2)+R2*C2
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ALGEBRA (will skip)
Rearrange
• (V1-V2)/R1 = (V2-V3)/R2 + C1(dV2/dt)
V1/R1=V2/R1+V2/R2-V3/R2+C1(dV2/dt)
• (V2-V3)/R2=C2(dV3/dt)
V2=V3+R2*C2(dV3/dt)
V2
R2
R1
C1
Penn ESE370 Fall2014 -- DeHon
V3
C2
R1*(C1+C2)+R2*C2
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ALGEBRA (will skip)
Substitute
• V1/R1=V2/R1+V2/R2-V3/R2+C1(dV2/dt)
= V2(1/R1+1/R2)-V3/R2+C1(dV2/dt)
• V2=V3+R2*C2(dV3/dt)
• V1/R1=(V3+R2*C2(dV3/dt))(1/R1+1/R2)V3/R2+C1(dV3/dt+R2*C2*d2V3/dt)
V2
R2
R1
C1
Penn ESE370 Fall2014 -- DeHon
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C2
R1*(C1+C2)+R2*C2
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ALGEBRA (will skip)
Multiply by R1
• V1/R1=(V3+R2*C2(dV3/dt))(1/R1+1/R2)
-V3/R2+C1(dV3/dt+R2*C2*d2V3/dt)
• V1=V3+(R1*C2+R2*C2+R1*C1)(dV3/dt
)+R2*C2*R1*C1*(d2V3/dt)
V2
R2
R1
C1
Penn ESE370 Fall2014 -- DeHon
V3
C2
R1*(C1+C2)+R2*C2
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Simplify Problem
• V1=V3+(R1*C2+R2*C2+R1*C1)(dV3/dt
)+R2*C2*R1*C1*(d2V3/dt)
• Simplify R1=R2=R, C1=C2=C
V1=V3+(3RC)dV3/dt+(RC)2dV3/dt
V2
R2
R1
C1
Penn ESE370 Fall2014 -- DeHon
V3
C2
R1*(C1+C2)+R2*C2
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Exponential Solution
• V1=V3+(3RC)dV3/dt+(RC)2dV3/dt
• V3=A(1+ext)
• V1=A+Aext+(3RC)x Aext+(RC)2x2Aext
A=V1
0=1+(3RC)x+(RC)x2
V2
R2
R1
C1
Penn ESE370 Fall2014 -- DeHon
V3
C2
R1*(C1+C2)+R2*C2
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KCL-Based Solution
• V3=A(1+ext)
• 0=1+(3RC)x+(RC)x2
• Quadratic Equation:
b  b2  4ac
x
2a
1
x
2.6(RC)
3RC  9(RC) 2  4(RC) 2
x
2(RC) 2

V2
R2
R1
C1
Penn ESE370 Fall2014 -- DeHon
V3

C2
R1*(C1+C2)+R2*C2
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SPICE Response
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Penn ESE370 Fall2014 -- DeHon
Elmore Delay
• For each resistor Ri in path
– Compute CRi = sum of all C’s downstream of Ri
– Delay through Ri is Ri×CRi



Delay  
R

C

j 
 i
path
path
i 
 j 
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Apply Y
• What is Elmore delay?
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Apply to Y
• Imagine shorting A and B
A
B
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Apply Y
• 1000W×3pF
• +1000W×1pF
• =4ns
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SPICE Response
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Penn ESE370 Fall2014 -- DeHon
Elmore Delay
• For each resistor Ri in path
– Compute CRi = sum of all C’s downstream of Ri
– Delay through Ri is Ri×CRi



Delay  
R

C

j 
 i
path
path
i 
 j 
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Penn ESE370 Fall2014 -- DeHon
Wire
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Wire Capacitance
Penn ESE370 Fall2014 -- DeHon
A
Cr0
d
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Wire Resistance
R
Penn ESE370 Fall2014 -- DeHon
L
A
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Wire as RC Ladder
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Wire Delay as f(L)
• Measure wire length in units
– Say l
– Each lambda have Cunit, Runit
• Capacitance and resistance of wire of length l
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Penn ESE370 Fall2014 -- DeHon
Wire Delay
• Delay of Wire N units long:
Runit*(N*Cunit)
+Runit((N-1)*Cunit
+Runit*(N-2)*Cunit+…
+Runit*Cunit
=(Runit*Cunit)*(N+N-1+N-2+….1)
Penn ESE370 Fall2014 -- DeHon
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Sum of integers
• What’s the sum of the integer 1 to N?
N+N-1+N-2+…1
N
k
k 0
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Penn ESE370 Fall2014 -- DeHon
Sum of integers
• What’s the sum of the integer 1 to N?
N+N-1+N-2+…1
N(N 1)
2
 k  2  0.5N
k 0
N
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Penn ESE370 Fall2014 -- DeHon
Wire Delay
• Wire N units long:
Runit*(N*Cunit)+Runit((N-1)*Cunit
+Runit*(N-2)*Cunit+…+Runit*Cunit
=(Runit*Cunit)*(N+N-1+N-2+….1)
=Runit*Cunit*N2/2
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Penn ESE370 Fall2014 -- DeHon
Lumped RC Wire?
• What would the delay be if we treated
the wire as lumped R and C?
Rwire = N×Runit
Cwire = N×Cunit
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Penn ESE370 Fall2014 -- DeHon
Wire Delay
•
•
•
•
Rwire = N*Runit
Cwire=N*Cunit
Wire delay = Runit*Cunit*N2/2
Wire delay = 0.5 * Rwire*Cwire
• Half the delay of lumped RC product
• Quadratic in length of wire
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Penn ESE370 Fall2014 -- DeHon
Wire Delay
• Wire N units long:
=Runit*Cunit*N2/2
• With
– Runit=1000W
– Cunit=1pF
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RC Ladder
Runit=1000W
Cunit=1pF
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Animation
• http://www.research.ibm.com/people/r/r
estle/Animations/DAC01top.html
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Apply to Pass Transistor
(and CMOS)
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Pass TR xor
• Delay when B=1?
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Pass transistor xor
• Delay when B=0?
– Start with equivalent
RC circuit
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Unbuffered
• Circuit  Delay?
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Unbuffered
• Circuit  Delay?
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Unbuffered
• Delay as a function of number of stages?
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CMOS xor
• Delay with Cdiff>0?
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Penn ESE370 Fall2014 -- DeHon
Idea
• Lumped wiring calculation is pessimistic
– Not all capacitance at end of wire
• Elmore delay calculation allows us to
estimate
• Wires are distributed RC
– Half delay lumped calculation
– Still quadratic in length
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Penn ESE370 Fall2014 -- DeHon
Admin
• Project
– Should have feedback from milestone on
canvas
– Due Thursday
• Andre office hour start 4:30pm this Tue.
• 2nd midterm next Monday (11/3)
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