Bard, Gerstlauer, Valvano, Yerraballi 3-1


 GPIO
 Logic and Shift Operations
 Addressing Modes
 Subroutines and the Stack
 Introduction to C

 Debugging
 Arithmetic Operations o Random Number Generator example
 Digital Logic o GPIO TM4C123/LM4F120 Specifics
 Switch and LED interfacing
Bard, Gerstlauer, Valvano, Yerraballi 3-2

 Aka: Testing, Diagnostics,
Verification
 Debugging Actions
 Functional debugging , input/output values
 Performance debugging , input/output values with time
 Tracing , measure sequence of operations
 Profiling , o measure percentage for tasks, o time relationship between tasks
 Performance measurement , how fast it executes
 Optimization , make tradeoffs for overall good o improve speed, o improve accuracy, o reduce memory, o reduce power, o reduce size, o reduce cost
Bard, Gerstlauer, Valvano, Yerraballi 3-3

 Intrusive Debugging
 degree of perturbation caused by the debugging itself
 how much the debugging slows down execution
 Non-intrusive Debugging
 characteristic or quality of a debugger
 allows system to operate as if debugger did not exist
 e.g., logic analyzer, ICE,
BDM
 Minimally intrusive
 negligible effect on the system being debugged
 e.g., dumps(ScanPoint) and monitors
 Highly intrusive
 print statements, breakpoints and single-stepping
Bard, Gerstlauer, Valvano, Yerraballi 3-4

Interface
 Breakpoints
 Registers including xPSR
 Memory and Watch Windows
 Logic Analyzer, GPIO Panel
 Single Step, StepOver, StepOut, Run, Run to
Cursor
 Watching Variables in Assembly
EXPORT VarName[DATA,SIZE=4]
 Command Interface (Advanced but useful)
WS 1, `VarName,0x10
LA (PORTD & 0x02)>>1
Bard, Gerstlauer, Valvano, Yerraballi 3-5

 Instrumentation: Code we add to the system that aids in debugging
 E.g., print statements
 Good practice: Define instruments with specific pattern in their names
 Use instruments that test a run time global flag o leaves a permanent copy of the debugging code o causing it to suffer a runtime overhead o simplifies “on-site” customer support.
 Use conditional compilation (or conditional assembly) o Keil supports conditional assembly o Easy to remove all instruments
 Visualization: How the debugging information is displayed
Bard, Gerstlauer, Valvano, Yerraballi 3-6

ADD{S} {Rd,} Rn, <op2> ;Rd = Rn + op2
ADD{S} {Rd,} Rn, #im12 ;Rd = Rn + im12
SUB{S} {Rd,} Rn, <op2> ;Rd = Rn - op2
SUB{S} {Rd,} Rn, #im12 ;Rd = Rn - im12
RSB{S} {Rd,} Rn, <op2> ;Rd = op2 - Rn
RSB{S} {Rd,} Rn, #im12 ;Rd = im12 - Rn
CMP Rn, <op2> ;Rn - op2
CMN Rn, <op2> ;Rn - (-op2)
Addition
C bit set if unsigned overflow
V bit set if signed overflow
Subtraction
C bit clear if unsigned overflow
V bit set if signed overflow
Bard, Gerstlauer, Valvano, Yerraballi 3-7

32-BIT MULTIPLY/DIVIDE INSTRUCTIONS
MUL{S} {Rd,} Rn, Rm ;Rd = Rn * Rm
MLA Rd, Rn, Rm, Ra ;Rd = Ra + Rn*Rm
MLS Rd, Rn, Rm, Ra
UDIV {Rd,} Rn, Rm
SDIV {Rd,} Rn, Rm
;Rd = Ra - Rn*Rm
;Rd = Rn/Rm unsigned
;Rd = Rn/Rm signed
Multiplication does not set C,V bits
Bard, Gerstlauer, Valvano, Yerraballi 3-8

;Program demonstrates Arithmetic operations
; ADD, SUB, MUL and IDIV
; LR loss when sub calls sub - Solution
Seed EQU 123456789
THUMB
AREA DATA, ALIGN=2
EXPORT M [DATA,SIZE=4]
M SPACE 4
ALIGN
AREA |.text|, CODE, READONLY, ALIGN=2
EXPORT Start
EXPORT M [DATA,SIZE=4]
; Need this to be able to watch RAM
; Variable M (in Assembly only)
Start LDR R2,=M ; R2 points to M
LDR R0,=Seed ; Initial seed
STR R0,[R2] ; M=Seed loop BL Random
B loop
; R0 has rand number
Function Random
How it is called
How it returns
Bard, Gerstlauer, Valvano, Yerraballi
;------------Random------------
; Return R0= 32-bit random number
; Linear congruential generator
; from Numerical Recipes by Press et al.
Random LDR R2,=M ; R2 points to M
LDR R0,[R2] ; R0=M
LDR R1,=1664525
MUL R0,R0,R1 ; R0 = 1664525*M
LDR R1,=1013904223
ADD R0,R1 ; 1664525*M+1013904223
STR R0,[R2] ; store M
BX LR
Global variable M
How it is defined
How it is written
How it is read
3-9

Tristate Gate
G
A
+3.3V
T1
A
G
74HC125
Y
+3.3V
T3
A
T4
T2
A
G
74HC244
8 8
Y
+3.3V
G
T5
T6
G
T7
T8
Y
Bard, Gerstlauer, Valvano, Yerraballi 3-10

A B
74LS05
20k

A
8k

Q
1
Vcc
B
Q
2
4.5k

74HC05 Vcc
A n-type
Q
2
B
A Q2 B
Low off HiZ
High active Low
Used to control current to LED
Low allows current to flow to ground
HiZ prevents current from flowing
Bard, Gerstlauer, Valvano, Yerraballi 3-11

PA7
PA6
PA5/SSI0Tx
PA4/SSI0Rx
PA3/SSI0Fss
PA2/SSI0Clk
PA1/U0Tx
PA0/U0Rx
PC7
PC6
PC5
PC4
PC3/TDO/SWO
PC2/TDI
PC1/TMS/SWDIO
PC0/TCK/SWCLK
GPIO Port A
Eight
UARTs
Four
SSIs
GPIO Port C
USB 2.0
JTAG
GPIO Port E
PE5
PE4
PE3
PE2
PE1
PE0
ADC
2 channels
12 inputs
12 bits
Advanced High Performance Bus
Cortex M4
System Bus Interface
Systick
NVIC
GPIO Port B
Four
I2Cs
CAN 2.0
GPIO Port D
Twelve
Timers
Six
64-bit wide
GPIO Port F
Two Analog
Comparators
Two PWM
Modules
Advanced Peripheral Bus
PF4
PF3
PF2
PF1
PF0
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
PB7
PB6
PB5
PB4
PB3/I2C0SDA
PB2/I2C0SCL
PB1
PB0
6 General-Purpose
I/O (GPIO) ports:
• Four 8-bit ports
(A, B, C, D)
• One 6-bit port (E)
• One 5-bit port (F)
Bard, Gerstlauer, Valvano, Yerraballi 3-12


Set AFSEL to 0
 Can be employed as an n-bit parallel interface
 Pins also provide alternative functions: o UART Universal asynchronous receiver/transmitter o SSI o I 2 C o Timer compare o PWM o ADC signals o Analog
Comparator o QEI o USB o Ethernet o CAN
Synchronous serial interface
Inter-integrated circuit
Periodic interrupts, input capture, and output
Pulse width modulation
Analog to digital converter, measure analog
Compare two analog signals
Quadrature encoder interface
Universal serial bus
High speed network
Controller area network
Set AFSEL to 1
Bard, Gerstlauer, Valvano, Yerraballi 3-13

IO
PA2
PA3
PA4
PA5
PA6
PA7
PB0
Ain 0
Port
Port
Port
1
Port
Port
Port
Port U1Rx
2
SSI0Clk
SSI0Fss
SSI0Rx
SSI0Tx
PB1
PB2
Port U1Tx
Port
PB3 Port
PB4 Ain10 Port SSI2Clk
PB5 Ain11 Port
PB6 Port
SSI2Fss
SSI2Rx
PB7 Port SSI2Tx
PC4 C1- Port U4Rx U1Rx
PC5 C1+ Port U4Tx U1Tx
I
I
I
I
2
2
2
2
3
C1SCL
C1SDA
C0SCL
C0SDA
4
M0PWM2
M0PWM3
M0PWM0
M0PWM1
M0PWM6
M0PWM7
5
M1PWM2
M1PWM3
6 7
T2CCP0
T2CCP1
T3CCP0
T3CCP1
T1CCP0
T1CCP1
T0CCP0
T0CCP1
IDX1 WT0CCP0
PhA1 WT0CCP1
8
CAN0Rx
CAN0Tx
U1RTS
U1CTS
9
PC6 C0+ Port U3Rx
PC7 C0- Port U3Tx
PhB1 WT1CCP0 USB0epen
WT1CCP1 USB0pflt
PD0 Ain7 Port SSI3Clk SSI1Clk I
2
C3SCL M0PWM6 M1PWM0 WT2CCP0
PD1 Ain6 Port SSI3Fss SSI1Fss I
2
C3SDA M0PWM7 M1PWM1 WT2CCP1
PD2 Ain5 Port SSI3Rx SSI1Rx
PD3 Ain4 Port SSI3Tx SSI1Tx
M0Fault0 WT3CCP0 USB0epen
IDX0 WT3CCP1 USB0pflt
14
PD6
PD7
Port U2Rx
Port U2Tx
PE0 Ain3 Port U7Rx
PE1 Ain2 Port U7Tx
PE2 Ain1 Port
PE3 Ain0 Port
PE4 Ain9 Port U5Rx
PE5 Ain8 Port U5Tx
PF0
I
I
2
2
C2SCL M0PWM4 M1PWM2
C2SDA M0PWM5 M1PWM3
Port U1RTS SSI1Rx CAN0Rx M1PWM4 PhA0 T0CCP0
PF1
PF2
PF3
PF4
Port U1CTS SSI1Tx
Port SSI1Clk
Port
Port
SSI1Fss CAN0Tx
M0Fault0
M1PWM5 PhB0
M0Fault0 M1PWM6
M1PWM7
PhA0 WT5CCP0
PhB0 WT5CCP1
M1Fault0 IDX0
T0CCP1
T1CCP0
T1CCP1
NMI
CAN0Rx
CAN0Tx
NMI
T2CCP0 USB0epen
C0o
C1o TRD1
TRD0
TRCLK
3-14

Address
$400F.E608
$400F.EA08
$4005.8000
$4005.9000
$4005.A000
$4005.B000
7 6 5
GPIOF
GPIOF
4
GPIOE
GPIOE
3
GPIOD
GPIOD
2
GPIOC
GPIOC
1
GPIOB
GPIOB
0
GPIOA
GPIOA
Name
SYSCTL_RCGCGPIO_R
SYSCTL_PRGPIO_R
PORTA base address
PORTB base address
PORTC base address
PORTD base address
$4005.C000
$4005.D000
PORTE base address
PORTF base address base+$3FC DATA DATA DATA DATA DATA DATA DATA DATA GPIO_PORTx_DATA_R base+$400 DIR DIR DIR DIR DIR DIR DIR DIR GPIO_PORTx_DIR_R base+$420 base+$510
SEL
PUE base+$51C DEN base+$524 CR
SEL
PUE
DEN
CR
SEL
PUE
DEN
CR
SEL
PUE
DEN
CR
SEL
PUE
DEN
CR
SEL
PUE
DEN
CR
SEL
PUE
DEN
CR
SEL
PUE
DEN
CR
GPIO_PORTx_AFSEL_R
GPIO_PORTx_PUR_R
GPIO_PORTx_DEN_R
GPIO_PORTx_CR_R base+$528 AMSEL
31-28 base+$52C PMC7
AMSEL
27-24
PMC6
AMSEL
23-20
PMC5
AMSEL
19-16
PMC4
AMSEL
15-12
PMC3
AMSEL
11-8
PMC2
AMSEL
7-4
PMC1
AMSEL
3-0
PMC0
GPIO_PORTx_AMSEL_R
GPIO_PORTx_PCTL_R
GPIO_PORTx_LOCK_R base+$520 LOCK (32 bits)
• Four 8-bit ports (A, B, C, D)
• One 6-bit port (E)
• One 5-bit port (F)
• PA1-0 to COM port
• PC3-0 to debugger
• PD5-4 to USB device
Bard, Gerstlauer, Valvano, Yerraballi 3-15

negative – pressed = ‘0’
Bard, Gerstlauer, Valvano, Yerraballi positive – pressed = ‘1’
3-16

10k

+3.3V
+3.3V
TM4C s
Input port
Negative logic
TM4C t
Input port
10k

Positive logic
Negative Logic s
– pressed, 0V, false
– not pressed, 3.3V, true
+3.3V
10k
 s
0.0V
TM4C
Input port
Pressed
+3.3V
10k
 s
3.3V
TM4C
Input port
Not pressed
Positive Logic t
– pressed, 3.3V, true
– not pressed, 0V, false
+3.3V
TM4C t
3.3V
Input port
10k

Pressed
+3.3V
TM4C t
0V
Input port
10k

Not pressed
Bard, Gerstlauer, Valvano, Yerraballi 3-17

LED current v. voltage
Brightness = power = V*I
Bard, Gerstlauer, Valvano, Yerraballi anode (+) cathode (1)
“ big voltage connects to big pin”
3-18

Current
I
(mA)
2
1
-
+ a k voltage
0
1.5 1.6 1.7
V (volts)
(a) LED curve
I
Out
LM3S or
TM4C high
R
1mA
LED
(b) Positive logic interface
LM3S or
TM4C
+3.3V
R
1mA
LED
Out low
(c) Negative logic interface
Bard, Gerstlauer, Valvano, Yerraballi 3-19

R = (3V – 1.5)/0.001
= 1.5 kOhm
Out
LM3S or
TM4C high
R
1mA
LED
R = (5.0-2-0.5)/0.01
= 250 Ohm
LM3S or
TM4C
Out high
7406
+5V
R
+5V
0.5V
10mA
LED
LED current < 8 ma LED current > 8 ma
LED may contain several diodes in series
Bard, Gerstlauer, Valvano, Yerraballi 3-20

Serial
R10 0

TM4C123 PF0
PF4
PA1
PA0
+5
R29
0

USB
R25
0

R9 0

PB1
PD5
PD4
PB0
PD0
PB6
PD1
PB7
PF3
PF2
PF1
R1 0

R13 0

R12
Green
0

R11
R2
0

0

330

5V
Blue
330

Red
330

SW1 SW2
DTC114EET1G
 The switches on the LaunchPad
 Negative logic
 Require internal pull-up (set bits in PUR)
 The PF3-1 LEDs are positive logic
Bard, Gerstlauer, Valvano, Yerraballi 3-21

• Initialization (executed once at beginning)
1. Turn on Port F clock in SYSCTL_RCGCGPIO_R
Wait two bus cycles (two NOP )
2. Unlock PF0 (PD7 also needs unlocking)
3. Clear AMSEL to disable analog
4. Clear PCTL to select GPIO
5. Set DIR to 0 for input, 1 for output
6. Clear AFSEL bits to 0 to select regular I/O
7. Set PUE bits to 1 to enable internal pull-up
8. Set DEN bits to 1 to enable data pins
• Input from switches, output to LED
10. Read/write GPIO_PORTF_DATA_R
Prog 4.1, show PortF_Init function in InputOutput_xxxasm
Bard, Gerstlauer, Valvano, Yerraballi 3-22

 I/O Port bit-specific addressing is used to access port data register
 Define address offset as
4*2 b , where b is the selected bit position
 256 possible bit combinations (0-8)
 Add offsets for each bit selected to base address for the port
 Example: PF4 and PF0
Port F = 0x4005.D000
0x4005.D000+0x0004+0x0040
= 0x4005.D044
Provides friendly and atomic access to port pins
Show PortF_Input2 function in InputOutput_xxxasm
Bard, Gerstlauer, Valvano, Yerraballi 3-23