MSP430
Ultra-Low Power | High Integration | Easy-to-Use
“How To” Series: JTAG
2011
Introduction

Purpose
– Provide a brief but informative technical overview in “HOW-TO” use
the MSP430 JTAG interface

Objectives
–
–
–
–
Discuss What is JTAG?
Discuss how JTAG applies to MSP430 devices
Discuss Interface capabilities
Discuss Design considerations
What is JTAG?

“JTAG”- Joint Test Action Group
– Originally and industry group formed to develop methodology for
testing circuit board assemblies after manufacture

Industry standard IEEE Std. 1149.1-1990

Synonymous with
– Debugging, Memory programming and/or Boundary scan testing

4 or 5 wire physical interface
– TDI (Test Data In), TDO (Test Data Out), TCK (Test Clock), TMS
(Test Mode Select), TRST (Test Reset) optional

No standard connector or adapter HW
– Vendor-specific, often with extensions that use the JTAG interface
Reference: Wikipedia
http://en.wikipedia.org/wiki/Joint_Test_Action_Group
How JTAG applies to MSP430 devices

All MSP430 devices are debugged and primarily
programmed using JTAG
– Standard 4-wire JTAG
– Custom 2-wire “SBW” JTAG (supported on select MSP430 devices)

MSP430 uses a 2x7 14-pin header for JTAG connectivity
– Reduced pin headers used on some eZ430 HW for SBW-only

Note Boundary Scan is not supported on MSP430 devices
today


In-system & BSL are options
for memory programming,
but only a JTAG interface
can be used to debug
JTAG can be disabled to
protect SW IP
Interface capabilities: 4-Wire



All MSP430’s support 4-wire mode
A RST connection to the JTAG
header is not required on devices
that DO NOT support SBW (e.g.
100pin ‘1xx)
TEST must be connected when
present the device
General Connections
(see Hardware Tool’s User’s Guide and devicespecific datasheets for more information)
MSP430 4-Wire JTAG Signal Implementation Overview
Devices
TEST Pin
4-Wire
YES
YES
NO
YES
*
YES
YES
14-, 20-, 28-, and 38-pin MSP430F2xx devices
YES
YES
NO
YES
YES
YES
YES
YES
20-and 28-pin MSP430F1xx devices
*
64-, 80-, and 100-pin MSP430F1xx/4xx devices
MSP430F21x1 family
64-, 80-, and 100-pin MSP430F2xx devices
*
*
14-, 16-, 20-, 28-, and 32-pin MSP430G2xx devices
MSP430F5xx/6xx devices
* These devices do not support the SBW option
Pin Naming for SBW-capable
devices:
RST = RST/SBWTCK
TEST = TEST/SBWTDIO
Interface capabilities: 2-Wire SBW

When physical fuse blow IS needed
(e.g. 2xx devices):
–
–

When physical fuse blow IS NOT
needed (e.g. all 5xx/6xx devices):
–
–

Header connection of TEST/VPP required
R2 is required to protect the TCK pin
Omit header connection to TEST/VPP
R2 = 0 Ohm
C2 must not exceed 2.2nF to assure
reliable SBW communication
General Connections
(see Hardware Tool’s User’s Guide and devicespecific datasheets for more information)
MSP430 2-Wire JTAG Signal Implementation Overview
Devices
TEST Pin
2-Wire SBW
YES
NO
NO
NO
*
YES
NO
14-, 20-, 28-, and 38-pin MSP430F2xx devices
YES
YES
NO
NO
YES
YES
YES
YES
20-and 28-pin MSP430F1xx devices
*
64-, 80-, and 100-pin MSP430F1xx/4xx devices
MSP430F21x1 family
64-, 80-, and 100-pin MSP430F2xx devices
*
*
14-, 16-, 20-, 28-, and 32-pin MSP430G2xx devices
MSP430F5xx/6xx devices
* These devices do not support the SBW option
Design considerations

JTAG pins are often multiplexed in the device
–

Using a larger capacitor on RST in-application is sometimes
favorable to help filter noise that might cause unwanted
resets
–

Consider using non-JTAG functions in-application carefully to avoid conflicts with JTAG tools & communication signals
This is acceptable in-application, but limit to 2.2nF for purposes of using JTAG
Keep routing of JTAG/RST/TEST signals as short as
possible & isolated from other circuitry
–
–
Protects against noise coupling into the application during debug
Helps limit exposure of JTAG/RST pins to unwanted spikes due to noise, ESD, etc.

When one or more JTAG pins are not used, please refer to
the device-specific User’s Guide section “Connection of
Unused Pins” for guidance

When programming via JTAG, keep in mind 4-wire JTAG is
~3x faster than using SBW
References

MSP430 Hardware Tools User's Guide
– Describes the hardware of the Texas Instruments MSP-FET430 Flash Emulation
Tool, the primary development tool for the MSP430, as well as a broad selection of
other MSP430 target boards and development platforms.

MSP430 Programming Via the JTAG Interface
– Describes the functions required to erase, program, and verify the memory module
of the MSP430 using the JTAG communication port (4-wire & 2-wire “SBW”) for
use when developing custom programming solutions; an example implementation
is provided.

Your specific MSP430 device’s datasheet &
Family User’s Guide
Thank you!