FEATURE AND SPECIFICATION COMPARISON
CircuitStudio by Altium vs. Altium Designer
Function
Feature
Altium CircuitStudio
Feature Description
Altium Designer
Schematic Entry
Wiring
Auto junction
Wire segment editing
Project Structure
Multisheet design
Hierarchical design
Device sheets
Multi channel (schematic hierarchy only)
Schematic multi-channel hierarchy only, not including
PCB rooms or the copy room formats feature
Design refactoring
Advanced design variants
Legacy design variants
Interactive Editing
Smart paste
Design Compiler
Blankets
ERC
Connection matrix
Configurable list of allowed pin and port connections
Configurable rules list
List of rules to set to ignore, warn, report
Automatic interactive ERC
Provides feedback as user works
Specific No-ERC
Directive to limit ERC check on specific items
PCB Layout
Interactive Routing
Heuristic based engine
Topological routing and look-ahead engine
Shape based engine
Simple collision avoidance and circumnavigation
Single trace drag
Bus dragging
Push while dragging
Automatic neckdown
Avoid obstacles while dragging
Automatic Routing
Interactive Editing
Situs autorouter
Altium’s topological automatic router
Specctra interface
Ability to export SPECCTRA DSN and re-import
Basic grid configuration
Multiple grid support
Polar grid support
Miniaturization
Rigid flex support
Layer stack regions, flexible circuit modeling
in 3D, flex movie and MCAD output
Embedded components
Polygon & Plane Management
Die on board
Die attach, flip-chip, and wire-bonding, glue and epoxy dots
Printed passives
Screen-printed resistors, thin-film dielectric capacitors
Polygon manager
Automatic polygon naming
Advanced pour order checks
Pads and Vias
Simple via
Top to bottom connection
Basic pad stackup
Full pad stackup
Auto unused pad removal
Automatic teardrops
Non circular holes
Live drill table
Blind/buried via
Object Classes
Basic object classes
Nets, components, layers, pads, polygons
Advanced classes
Structure classes
Automatic generation from schematic
Touch Component Support
Cypress Capsense
Microchip M Touch
Atmel Q Touch
ALTIUM CERTIFIED TECHNICAL CONSULTANTS
■
US: Altiumsupport@newark.com
■
Europe: Altiumsupport@farnell.com
For more information on Design Tools
element14.com/pcb
■
Asia Pacific: Altiumsupport@element14.com
FEATURE AND SPECIFICATION COMPARISON
CircuitStudio by Altium vs. Altium Designer
Function
Feature
Altium CircuitStudio
Feature Description
Altium Designer
PCB Layout (continued)
Design Rules
Batch DRC
Online DRC
Basic routing rules
Basic electrical rules
Basic SMD rules
SMD to corner, SMD to plane, SMD neckdown
Basic testpoint rules
Fabrication style / usage, assemble style / usage
Basic manufacturing rules
Annular ring, acute angle, hole size, layer pairs, hole to
hole clearance, minimum solder mask sliver, silk to solder
mask, silk to silk, net antennae, silk to board region
Basic high speed rules
Parallel segment, length, matched length, daisy chain
stub length, via under SMD, max via count
Rooms
Room definition, copy room formats, room rule
scoping (WithinRoom, TouchesRoom)
Basic signal integrity rules
Stimulus, overshoot, undershoot, impedance, top
value, base value, flight time, slope, supply nets
Custom rule scoping
High Speed Design Features
xSignals
Differential pair
Back drilling
Via shielding
Chamfered paths
Interactive length tuning
Design Text
True type support
Stroked font support
Barcode support
Multi-line text
System
Platform
32 bit
Crash reporting system
Unified data model
Scripting system
SDK
Standard Editing
Formula driven updates in inspector
Find similar
List views
Design Environment
Ribbon based UI
Menu based UI
Accelerator keys
Customizable menu and accelerators
Comprehensive environment preferences
Cloud preference storage
Unified search
Version Control
SVN client
Managed projects
Design Reuse
Snippets
Collaboration
Concurrent PCB design
Pin management
Persistent schematic, PCB and text clipboard
items to be reused over and over
Pin swapping
FPGA pin swapping
Licensing
Standalone
Uses license file
On demand
License can be shared using Altium Live
Private license server
License can be shared using PLS on local lan
ALTIUM CERTIFIED TECHNICAL CONSULTANTS
■
US: Altiumsupport@newark.com
■
Europe: Altiumsupport@farnell.com
For more information on Design Tools
element14.com/pcb
■
Asia Pacific: Altiumsupport@element14.com
FEATURE AND SPECIFICATION COMPARISON
CircuitStudio by Altium vs. Altium Designer
Function
Feature
Altium CircuitStudio
Feature Description
Altium Designer
Functional Design Verification
XSPICE SIMULATION
SPICE3F5, PSPICE, SIMCODE model support
SIM Integration
Simmetrix/SIMPLIS
WEBENCH
Signal Integrity Analyses
Basic signal integrity simulation
Wave Editor
Basic wave editor functions
Library Management
Library Types
Standard
Integrated
DB lib
SVN DB lib
Altium Vault
Consume Vault content
Model Creation
IPC compliant footprint wizard
Importers & Exporters
Import Files From
Dx Designer
PADS
EAGLE
OrCAD
Allegro
Xpedition
STEP (COMPONENTS)
STEP (FREE MODELS)
IDX
Export Files To
STEP
Parasolid
IDX
BOM Management
BOM / Assembly Output
Simple pick and place
CSV, TXT pick and place file generation
Simple BOM
CSV, XLS, TXT output BOM component list
Configurable BOM export
ActiveBOM
Live Supply Chain Information
Component part choices (price/availability)
Manufacturing Output
File Generation
Gerber
Gerber X2
ODB++
IPC 2581
Assembly print
Final print
3D print (picture of board in 3D perspective)
Smart PDF
Output Management
Simple output
Output job
CAM Editor
Gerber / ODB++ / IPC2581 viewing
Editing and DFM tools
Design Metric Limits
32 Signal layers
16 Plane layers
Unlimited components
Unlimited nets
ALTIUM CERTIFIED TECHNICAL CONSULTANTS
■
US: Altiumsupport@newark.com
■
Europe: Altiumsupport@farnell.com
For more information on Design Tools
element14.com/pcb
■
Asia Pacific: Altiumsupport@element14.com