ENGR 430 – Lab. #3
Use AMI C5 process to develop a CMOS standard cell library composed by the
following simple core logic cells:
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2 input nand gate
3 input nand gate
2 input nor gate
3 input nor gate
Inverter
Tri-state inverter
2:1 mux
D flip flop
D flip flop with clear
Multiplexed scan D flip flop
Multiplexed scan D flip flop with clear
Use electric to draw the schematic of each cell and SPICE for characterizing their
behavior.
Write a “professional” quality report containing:
1. a tutorial on how to use electric schematic editor
2. a data sheet for each of the cells implemented.
Collaboration between groups is strongly encouraged!!
The logic cells are named after the AMI 0.5µ Standard Cell Core Library.
Group
Alex & co.
Amanda & co.
David & co.
Logic Cells
NO21, NO31, DF201,
ITB1, NA21, NA31, DF111
INV1, MX21, DF1F1, DF211