MMP9567 Preliminary Data Sheet M-MOS Semiconductor Hong Kong Limited 40V P-Channel Enhancement-Mode MOSFET VDS= -40V RDS(ON), Vgs@-10V, Ids@-6.0A = 50mΩ RDS(ON), Vgs@-4.5V, Ids@-4.0A = 80mΩ Features Advanced trench process technology High Density Cell Design For Ultra Low On-Resistance SO-8 Internal Schematic Diagram Top View P-Channel MOSFET Maximum Ratings and Thermal Characteristics (TA = 25oC unless otherwise noted) Parameter Symbol Limit Drain-Source Voltage VDS -40 Gate-Source Voltage VGS ±25 Continuous Drain Current ID -6 Pulsed Drain Current 1) IDM -30 o Maximum Power Dissipation TA = 25 C PD TA = 75oC Operating Junction and Storage Temperature Range Junction-to-Ambient Thermal Resistance (PCB mounted) 2) Unit V A 2.5 W 0.02 TJ, Tstg -55 to 150 RqJA 62.5 o o C C/W Note: 1. Repetitive Rating: Pulse width limited by the maximum junction temperature 2. 1-in2 2oz Cu PCB board V 1.2 1 www.m-mos.com MMP9567 Preliminary Data Sheet P-Channel Enhancement-Mode MOSFET ELECTRICAL CHARACTERISTICS Parameter Symbol Test Condition Min Typ Max Unit Static VGS = 0V, ID = -250uA Drain-Source Breakdown Voltage BVDSS Drain-Source On-State Resistance RDS(on) VGS = -10V, ID = -6A 45.0 50.0 Drain-Source On-State Resistance RDS(on) VGS = -4.5V, ID = -4A 63.0 80.0 Gate Threshold Voltage VGS(th) VDS =VGS, ID = -250uA -1.8 -3 V Zero Gate Voltage Drain Current IDSS VDS = -40V, VGS = 0V -1 uA Gate Body Leakage IGSS VGS = ± 25V, VDS = 0V ± 100 nA -40 -1 V mW 3) Dynamic Qg Total Gate Charge Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-On Delay Time td(on) Turn-On Rise Time tr Turn-Off Delay Time td(off) Turn-Off Fall Time tf Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss 7.49 VDS = -32V, ID = -6A VGS = -4.5V nC 2.70 3.98 13.76 VDD = -20V, RL= 20Ω ID = -1A, VGEN = -10V RG = 3.3W 3.56 ns 30.68 3.88 829.26 VDS = -25V, VGS = 0V f = 1.0 MHz pF 104.60 67.61 Source-Drain Diode IS Max. Diode Forward Current Diode Forward Voltage A IS = -2.0A, VGS = 0V VSD -1.2 V Note: Pulse test: pulse width <= 300us, duty cycle<= 2% 3. Guaranteed by design; not subject to production testing V 1.2 2 www.m-mos.com Disclaimer Notice Notice 1. Specification of the products displayed herein are subject to change without notice. Continuous development may necessitate changes in technical data without notice. M-MOS Semiconductor Sdn. Bhd. or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. 2. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. V 1.2 3 www.m-mos.com