PCB ARTWORK PCB FABRICATION SCHEMATICS XILINX PART
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4 3 2 1 D C B A D PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE PAGE 1: 2: 3: 4: 5: 6: 7: 8: 9: 10: 11: 12: 13: 14: 15: 16: 17: 18: 19: 20: 21: 22: 23: 24: 25: 26: 27: 28: 29: 30: 31: 32: 33: 34: 35: 36: 37: 38: 39: 40: 41: 42: 43: 44: 45: 46: 47: 48: 49: 50: 51: 52: TABLE OF CONTENTS <<BLANK>> <<BLANK>> <<BLANK>> BANK0: SYSACE, LCD, SPI BANK1: PM I/O, UART, DEBUG LED, I2C BANK2: PCI BUS, RESET, INTR BANK3: PM LVDS IO BANK4: TRACE, CPU DEBUG, PM I/O BANK5: DDR BANK6: DDR BANK7: DDR FPGA CONFIG AND MISC I/O FPGA DECOUPLING MGT POWER SUPPLIES TOP MGT TRANSCEIVERS BOT MGT TRANSCEIVERS PERSONALITY MODULE CONNECTORS JTAG, DEBUG, TRACE CONNECTORS SYSTEM ACE AND COMPACT FLASH DDR DIMM CONNECTOR DDR SSTL-2 TERMINATION DDR TERMINATION SUPPLY PCI BUS PULLUPS PCI-PCI BRIDGE PCI SLOT 6, 5.0V, SECONDARY BUS PCI SLOT 5, 3.3V, PRIMARY BUS PCI SLOT 4, 5.0V, SECONDARY BUS PCI SLOT 3, 3.3V, PRIMARY BUS << BLANK >> PCI ETHERNET MAC/PHY PCI ETHERNET INTERFACE, PROM PCI SOUTH BRIDGE, PART 1 PCI SOUTH BRIDGE, PART 2-3 PCI SOUTH BRIDGE, PART 4-5 PCI SOUTH BRIDGE, CONFIG RESISTORS PCI SOUTH BRIDGE, UNUSED PIN RESISTORS PARALLEL PORT INTERFACE RS232 SERIAL PORT INTERFACE KBD/MOUSE AND USB INTERFACES IDE INTERFACES SOUTH BRIDGE ROM AND GPIO AC97 CODEC AC97 CONNECTORS I2C AND SPI DEVICES DEBUG AND STATUS LEDS ATX AND FRONT PANEL CONNECTORS RESET SWITCHES AND FPGA SERIAL PORT ATX CONNECTOR AND DC-DC CONVERTORS POWER SUPPLY MONITORS AND LEDS ATX MOUNTING HOLES AND TEST POINTS FPGA FAN SWITCH AND TACH NOTE: PLEASE REVIEW THE ML310 BOM FOR ITEMS DESIGNATED AS "NOSTUFF". NOSTUFF ITEMS ARE NOT POPULATED ON THE PCB. C THE ML310 BOM CONTAINS THE MOST ACCURATE INFORMATION ABOUT NOSTUFF DISCRETES AND COMPONENTS. XILINX PART NUMBERS SCHEMATICS 0381171-02 PCB ARTWORK 0531311-02 PCB FABRICATION 1280333-02 SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM TABLE OF CONTENTS A Date: 6-4-2004_12:54 Sheet Size: B Sheet 4 B 3 2 1 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 D D C C B B SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A <<INSERT SHEET NAME HERE>> A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 2 of Ver: X.X Rev: X Drawn By 51 XXX 1 4 3 2 1 D D C C B B SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A <<INSERT SHEET NAME HERE>> A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 3 of Ver: X.X Rev: X Drawn By 51 XXX 1 4 3 2 1 D D C C B B SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A <<INSERT SHEET NAME HERE>> A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 4 of Ver: X.X Rev: X Drawn By 51 XXX 1 4 3 2 1 XC2VP20-BANK0 FF896 (DIE DOWN) VCC2V5 R374 VRN_BANK0 5 49.9 D VRN_BANK0 VRP_BANK0 E24 E25 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 9 47 47 47 47 47 47 47 47 47 46 46 46 18 18 18 18 18 18 SYSACE_MPIRQ SYSACE_MPBRDY SYSACE_MPCE SYSACE_MPOE SYSACE_MPWE SYSACE_MPD15 SYSACE_MPD14 SYSACE_MPD13 SYSACE_MPD12 SYSACE_MPD11 SYSACE_MPD10 SYSACE_MPD09 SYSACE_MPD08 SYSACE_MPD07 SYSACE_MPD06 SYSACE_MPD05 SYSACE_MPD04 SYSACE_MPD03 SYSACE_MPD02 SYSACE_MPD01 SYSACE_MPD00 SYSACE_MPA06 SYSACE_MPA05 SYSACE_MPA04 SYSACE_MPA03 SYSACE_MPA02 SYSACE_MPA01 SYSACE_MPA00 SYSACE_CLK_OE FPGA_LCD_DB0 FPGA_LCD_DB1 FPGA_LCD_DB2 FPGA_LCD_DB3 FPGA_LCD_DB4 FPGA_LCD_DB5 FPGA_LCD_DB6 FPGA_LCD_DB7 FPGA_LCD_DIR FPGA_LCD_E FPGA_LCD_RW FPGA_LCD_RS PM_IO_78 PM_IO_79 PM_IO_80 PM_IO_81 PM_IO_82 PM_IO_83 48 FPGA_CPU_RESET_N F23 F24 E22 E23 G23 G22 H22 F21 F22 C24 D24 G21 H21 D21 E21 C23 D23 G20 H20 D20 E20 A23 B23 G19 H19 E18 E19 B22 C22 F19 F20 F17 G17 B21 A21 G18 H18 C20 C21 H17 J17 D17 E17 C18 D18 H16 J16 D16 E16 IO_L02P_0_F23 IO_L02N_0_F24 IO_L03P_0/VREF_0_E22 IO_L03N_0_E23 IO_L05_0/No_Pair_G23 IO_L06P_0_G22 IO_L06N_0_H22 IO_L07P_0_F21 IO_L07N_0_F22 IO_L08P_0_C24 IO_L08N_0_D24 IO_L09P_0/VREF_0_G21 IO_L09N_0_H21 IO_L37P_0_D21 IO_L37N_0_E21 IO_L38P_0_C23 IO_L38N_0_D23 IO_L39P_0_G20 IO_L39N_0_H20 IO_L43P_0_D20 IO_L43N_0_E20 IO_L44P_0_A23 IO_L44N_0_B23 IO_L45P_0/VREF_0_G19 IO_L45N_0_H19 IO_L46P_0_E18 IO_L46N_0_E19 IO_L47P_0_B22 IO_L47N_0_C22 IO_L48P_0_F19 IO_L48N_0_F20 IO_L49P_0_F17 IO_L49N_0_G17 IO_L50_0/No_Pair_B21 IO_L53_0/No_Pair_A21 IO_L54P_0_G18 IO_L54N_0_H18 IO_L56P_0_C20 IO_L56N_0_C21 IO_L57P_0/VREF_0_H17 IO_L57N_0_J17 IO_L67P_0_D17 IO_L67N_0_E17 IO_L68P_0_C18 IO_L68N_0_D18 IO_L69P_0/VREF_0_H16 IO_L69N_0_J16 IO_L73P_0_D16 IO_L73N_0_E16 F16 G16 B16 C16 IO_L75P_0/GCLK4S_F16 IO_L75N_0/GCLK5P_G16 IO_L74P_0/GCLK6S_B16 IO_L74N_0/GCLK7P_C16 5 5 IO_L01P_0/VRN_0_E24 IO_L01N_0/VRP_0_E25 VCC2V5 D R385 VRP_BANK0 5 49.9 J17 80.6 2 R28 VCC2V5 3 1 USER_SMA_CLK 5 5 CON_SMA_ST 130 R407 4 C NOTE: 130 OHM RESISTORS ON EG-2121 OUTPUTS ARE INTENDED TO PROVIDE A LOAD FOR THE PECL DRIVERS AND SHOULD BE PLACED NEAR THE OSC. VCC2V5 FB5 R400 BLM18AG X7 OE 6 VCC 5,10 5,10 18 5 4.75K C184 10UF 6.3V 2 3 NC OSC N GND P 5 LVDS_CLKLOC1_N 4 LVDS_CLKLOC1_P R402 EG-2121CA 156.2500MHZ LVDS_CLKLOC_P LVDS_CLKLOC_N PM_CLK_TOP USER_SMA_CLK NC J18 J19 J20 J21 K16 K17 K18 K19 K20 K21 VCCO_0_J18 VCCO_0_J19 VCCO_0_J20 VCCO_0_J21 VCCO_0_K16 VCCO_0_K17 VCCO_0_K18 VCCO_0_K19 VCCO_0_K20 VCCO_0_K21 C B NOTE: IN ORDER TO FACILITATE TEST POINT INSERTION FOR 130 C194 0.1UF R401 C193 0.1UF 1 130 B U37 1 BGA PACKAGE DEVICES, THE UNUSED PINS ON THE BGAS 2 LVDS_CLKLOC_P 5,10 ARE TIED TO AN "UNUSED PIN" NET EVEN THOUGH THEY 3 APPEAR TO BE NO-CONNECTS IN THE SCHEMATIC. PLEASE J20 CHECK THE NETLISTS BEFORE MODIFYING ANY NC PINS ON 1 VCC2V5 2 FB16 R417 BLM18AG X9 OE OSC GND EG-2121CA 125.0000MHZ N P 5 LVDS_CLKLOC2_N 4 LVDS_CLKLOC2_P Title: ML310 VIRTEX-II PRO PLAFTORM BANK0: SYSACE, LCD, SPI A Date: 6-4-2004_12:58 Sheet Size: B Sheet 4 3 0381171-02 0531311-02 1280333-02 130 3 A NC R418 2 SCH P/N ART P/N FAB P/N J21 130 C207 10UF 6.3V REMAIN CONSISTENT. 5,10 6 VCC 4.75K C213 0.1UF LVDS_CLKLOC_N 3 R419 C212 0.1UF 1 A BGA PACKAGE TO ENSURE THE LAYOUT AND SCHEMATIC 2 5 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 XC2VP20-BANK1 FF896 (DIE DOWN) VCC3_PCI 6 6 R431 VRN_BANK1 D VRP_BANK1 VCC5V VCC3_PCI U41 GND3 3 GND7 7 38.3 1 GND6 6 ADJ 1206 SHDN 4 BYP NC C OUT 1 IN R455 2 2 C237 3.3UF 6.3V 26.1 1206 R454 LT1763CS8 NOTE: THE COMPONENT VALUES FOR THIS REGULATOR ARE TAKEN FROM XAPP653. THIS DESIGN IS INTENDED TO SINK CURRENT THROUGH THE 1206 RESISTORS WHEN THE CLAMP DIODES ON THE FPGA ARE CONDUCTING DURING OVERSHOOT. THIS IS WHY PM_IO_3V_4 PM_IO_3V_5 PM_IO_3V_6 PM_IO_3V_7 PM_IO_3V_8 PM_IO_3V_9 PM_IO_3V_10 PM_IO_3V_11 PM_IO_3V_12 PM_IO_3V_13 PM_IO_3V_14 PM_IO_3V_15 PM_IO_3V_16 PM_IO_3V_17 PM_IO_3V_18 PM_IO_3V_19 PM_IO_3V_20 PM_IO_3V_21 PM_IO_3V_22 PM_IO_3V_23 PM_IO_3V_24 PM_IO_3V_25 19 JTAG_SRC_SEL 48 48 48 48 UART0_TXD UART0_RTS_N UART0_RXD UART0_CTS_N 46 46 46 46 46 46 46 46 DBG_LED_0 DBG_LED_1 DBG_LED_2 DBG_LED_3 DBG_LED_4 DBG_LED_5 DBG_LED_6 DBG_LED_7 7 6 9,18 9,18 B 21,35,45 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 6 6 35,45 45 35,45 THE VALUES ARE UNUSUAL RELATIVE TO THE LT1763 DATASHEET. R426 IIC_SCL 18 18 18 18 PM_IO_3V_0 PM_IO_3V_1 PM_IO_3V_2 PM_IO_3V_3 6 49.9 5 IO_L01P_1/VRN_1_E6 IO_L01N_1/VRP_1_E7 VCC3_PCI D R428 C236 22UF 10V E6 E7 6 49.9 8 VRN_BANK1 VRP_BANK1 U37 FPGA_SCL 6 FPGA_SDA 6 FPGA_SCL FPGA_SDA IIC_ALERT_N IIC_IRQ_N IIC_THERM_N PCI_P_CLK5 USER_CLKPCI LVDS_CLKEXT_P LVDS_CLKEXT_N NC NC NC NC NC F7 F8 E8 E9 G8 H9 G9 F9 F10 D7 C7 H10 G10 E10 D10 D8 C8 H11 G11 E11 D11 B8 A8 H12 G12 E12 E13 C9 B9 F11 F12 G14 F14 B10 A10 H13 G13 C10 C11 J14 H14 E14 D14 D13 C13 J15 H15 E15 D15 IO_L02P_1_F7 IO_L02N_1_F8 IO_L03P_1_E8 IO_L03N_1/VREF_1_E9 IO_L05_1/No_Pair_G8 IO_L06P_1_H9 IO_L06N_1_G9 IO_L07P_1_F9 IO_L07N_1_F10 IO_L08P_1_D7 IO_L08N_1_C7 IO_L09P_1_H10 IO_L09N_1/VREF_1_G10 IO_L37P_1_E10 IO_L37N_1_D10 IO_L38P_1_D8 IO_L38N_1_C8 IO_L39P_1_H11 IO_L39N_1_G11 IO_L43P_1_E11 IO_L43N_1_D11 IO_L44P_1_B8 IO_L44N_1_A8 IO_L45P_1_H12 IO_L45N_1/VREF_1_G12 IO_L46P_1_E12 IO_L46N_1_E13 IO_L47P_1_C9 IO_L47N_1_B9 IO_L48P_1_F11 IO_L48N_1_F12 IO_L49P_1_G14 IO_L49N_1_F14 IO_L50_1/No_Pair_B10 IO_L53_1/No_Pair_A10 IO_L54P_1_H13 IO_L54N_1_G13 IO_L56P_1_C10 IO_L56N_1_C11 IO_L57P_1_J14 IO_L57N_1/VREF_1_H14 IO_L67P_1_E14 IO_L67N_1_D14 IO_L68P_1_D13 IO_L68N_1_C13 IO_L69P_1_J15 IO_L69N_1/VREF_1_H15 IO_L73P_1_E15 IO_L73N_1_D15 C15 B15 G15 F15 IO_L74P_1/GCLK0S_C15 IO_L74N_1/GCLK1P_B15 IO_L75P_1/GCLK2S_G15 IO_L75N_1/GCLK3P_F15 J10 J11 J12 J13 K10 K11 K12 K13 K14 K15 VCCO_1_J10 VCCO_1_J11 VCCO_1_J12 VCCO_1_J13 VCCO_1_K10 VCCO_1_K11 VCCO_1_K12 VCCO_1_K13 VCCO_1_K14 VCCO_1_K15 C B 0 R427 IIC_SDA 21,35,45 0 VCC3V3 R448 1 X10 OE1 VCC1 14 4.75K OSC C581 0.1UF 4 7 OE2 VCC2 GND OUT SG-531PCW 33.0000MHZ NOSTUFF A 11 8 USER_CLKPCI_R R447 USER_CLKPCI SCH P/N ART P/N FAB P/N 6 0381171-02 0531311-02 1280333-02 24.9 Title: NOTE: X10 IS REPLACED WITH A 100MHZ 3.3V OSCILLATOR ML310 VIRTEX-II PRO PLAFTORM BANK1: PM I/O, UART, DEBUG LED, I2C XS10 AND IS USED AS THE PRIMARY FPGA REFCLK INPUT ON SOCKETED 14-PIN DIP A Date: 1-5-2004_13:05 Ver: X.X Rev: X PRODUCTION BOARDS AS A LOWER COST ALTERNATIVE TO Sheet Size: B USING A 100MHZ 2.5V OSCILLATOR IN LOCATION X6. Sheet 4 3 2 6 of Drawn By 52 XXX 1 4 3 2 1 XC2VP20-BANK2 FF896 (DIE DOWN) VCC3_PCI 7 7 R38 VRN_BANK2 D R35 49.9 C 7 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 7,25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 PCI_P_AD00 PCI_P_AD01 PCI_P_AD02 PCI_P_AD03 PCI_P_AD04 PCI_P_AD05 PCI_P_AD06 PCI_P_AD07 PCI_P_AD08 PCI_P_AD09 PCI_P_AD10 PCI_P_AD11 PCI_P_AD12 PCI_P_AD13 PCI_P_AD14 PCI_P_AD15 PCI_P_AD16 PCI_P_AD17 PCI_P_AD18 PCI_P_AD19 PCI_P_AD20 PCI_P_AD21 PCI_P_AD22 PCI_P_AD23 PCI_P_AD24 PCI_P_AD25 PCI_P_AD26 PCI_P_AD27 PCI_P_AD28 PCI_P_AD29 PCI_P_AD30 PCI_P_AD31 PCI_P_PAR PCI_P_CBE0_N PCI_P_CBE1_N PCI_P_CBE2_N PCI_P_CBE3_N 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 25,27,29,31,33 24,25,27,29,31,33 24,25,27,29,31,33 24,25,27,29,31,33 24,25,27,29,31,33 24,25,27,29,31,33 24,25,27,29,31 24,25,27,29,31,33 24,25,27,29 7 B A B3 A3 IO_L01P_2/VRN_2_B3 IO_L01N_2/VRP_2_A3 VCC3_PCI 7 49.9 VRP_BANK2 VRN_BANK2 VRP_BANK2 U37 PCI_P_FRAME_N PCI_P_IRDY_N PCI_P_TRDY_N PCI_P_STOP_N PCI_P_DEVSEL_N PCI_P_PERR_N PCI_P_SERR_N PCI_P_LOCK_N PCI_FPGA_IDSEL 24,25,27,29,31 45 33 35 41 PCI_P_RST_N IIC_RESET_N SBR_PWG SBR_RSM_RSTJ SBR_IDE_RST_N 33 33 24,27,29,33 24,27,29,33 24,27,29,31,33 24,27,29,33 24,26,28,33 24,26,28,33 SBR_INTR SBR_NMI PCI_P_INTA_N PCI_P_INTB_N PCI_P_INTC_N PCI_P_INTD_N PCI_S_INTA_N PCI_S_INTB_N 24,27 24,29 24,31 24,33,36 24,25 PCI_P_REQ0_N PCI_P_REQ1_N PCI_P_REQ2_N PCI_P_REQ3_N PCI_P_REQ4_N 24,27 24,29 24,31 24,33 24,25 PCI_P_GNT0_N PCI_P_GNT1_N PCI_P_GNT2_N PCI_P_GNT3_N PCI_P_GNT4_N 7 7 7 7 7 7 PCI_P_CLK0_R PCI_P_CLK1_R PCI_P_CLK2_R PCI_P_CLK3_R PCI_P_CLK4_R PCI_P_CLK5_R NC NC NC NC NC NC NC G5 G6 D5 C5 C1 C2 J7 J8 D3 C4 D1 D2 H5 H6 E3 E4 E1 E2 K7 K8 F3 F4 F1 F2 J5 J6 G3 G4 G1 G2 L7 L8 H3 H4 J2 H2 M7 M8 K5 K6 K1 J1 M5 M6 J3 J4 L2 K2 N7 N8 K3 K4 M1 L1 N5 N6 L4 L5 N2 M2 R9 P9 M3 M4 P1 N1 P7 P8 N3 N4 P2 P3 R7 R8 P4 P5 T2 R2 R5 R6 R3 R4 IO_L02P_2_G5 IO_L02N_2_G6 IO_L03P_2_D5 IO_L03N_2_C5 IO_L04P_2_C1 IO_L04N_2/VREF_2_C2 IO_L05P_2_J7 IO_L05N_2_J8 IO_L06P_2_D3 IO_L06N_2_C4 IO_L31P_2_D1 IO_L31N_2_D2 IO_L32P_2_H5 IO_L32N_2_H6 IO_L33P_2_E3 IO_L33N_2_E4 IO_L34P_2_E1 IO_L34N_2/VREF_2_E2 IO_L35P_2_K7 IO_L35N_2_K8 IO_L36P_2_F3 IO_L36N_2_F4 IO_L37P_2_F1 IO_L37N_2_F2 IO_L38P_2_J5 IO_L38N_2_J6 IO_L39P_2_G3 IO_L39N_2_G4 IO_L40P_2_G1 IO_L40N_2/VREF_2_G2 IO_L41P_2_L7 IO_L41N_2_L8 IO_L42P_2_H3 IO_L42N_2_H4 IO_L43P_2_J2 IO_L43N_2_H2 IO_L44P_2_M7 IO_L44N_2_M8 IO_L45P_2_K5 IO_L45N_2_K6 IO_L46P_2_K1 IO_L46N_2/VREF_2_J1 IO_L47P_2_M5 IO_L47N_2_M6 IO_L48P_2_J3 IO_L48N_2_J4 IO_L49P_2_L2 IO_L49N_2_K2 IO_L50P_2_N7 IO_L50N_2_N8 IO_L51P_2_K3 IO_L51N_2_K4 IO_L52P_2_M1 IO_L52N_2/VREF_2_L1 IO_L53P_2_N5 IO_L53N_2_N6 IO_L54P_2_L4 IO_L54N_2_L5 IO_L55P_2_N2 IO_L55N_2_M2 IO_L56P_2_R9 IO_L56N_2_P9 IO_L57P_2_M3 IO_L57N_2_M4 IO_L58P_2_P1 IO_L58N_2/VREF_2_N1 IO_L59P_2_P7 IO_L59N_2_P8 IO_L60P_2_N3 IO_L60N_2_N4 IO_L85P_2_P2 IO_L85N_2_P3 IO_L86P_2_R7 IO_L86N_2_R8 IO_L87P_2_P4 IO_L87N_2_P5 IO_L88P_2_T2 IO_L88N_2/VREF_2_R2 IO_L89P_2_R5 IO_L89N_2_R6 IO_L90P_2_R3 IO_L90N_2_R4 VCCO_2_J9 VCCO_2_K9 VCCO_2_L9 VCCO_2_L10 VCCO_2_M9 VCCO_2_M10 VCCO_2_N9 VCCO_2_N10 VCCO_2_P10 VCCO_2_R10 7,27 J9 K9 L9 L10 M9 M10 N9 N10 P10 R10 R2 PCI_P_CLK0 D 4.75K 7,29 R1 PCI_P_CLK1 4.75K 7,31 R200 PCI_P_CLK2 4.75K 7,33 R164 PCI_P_CLK3 4.75K 7,25 R382 PCI_P_CLK4 4.75K 6,7 R439 PCI_P_CLK5 4.75K C NOTE: THE PCI SPEC RECOMMENDS THAT CLOCKS BE PULLED LOW WHEN THE BUS IS NOT ACTIVELY CLOCKED. NOTE: PCI_CLK RESISTORS ALLOW CLOCK TERMINATION TO BE ADJUSTED INDEPENDENTLY OF OTHER I/O. 7 R50 PCI_P_CLK0_R PCI_P_CLK0 7,27 PCI_P_CLK1 7,29 PCI_P_CLK2 7,31 24.9 7 R49 PCI_P_CLK1_R 24.9 7 R436 PCI_P_CLK2_R 24.9 7 B R434 PCI_P_CLK3_R PCI_P_CLK3 7,33 PCI_P_CLK4 7,25 PCI_P_CLK5 6,7 24.9 7 R438 PCI_P_CLK4_R 24.9 7 R437 PCI_P_CLK5_R 24.9 SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM BANK2: PCI BUS, RESET, INTR A Date: Sheet Size: B R435 7,25,27,29,31,33 PCI_P_AD24 PCI_FPGA_IDSEL 7 0 4 3 10-6-2003_14:59 2 Sheet 7 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 XC2VP20-BANK3 FF896 (DIE DOWN) VCC2V5 R37 VRN_BANK3 8 1 U37 49.9 VRN_BANK3 VRP_BANK3 AK3 AJ3 15,18 15,18 15,18 15,18 15,18 15,18 PM_IO_0 PM_IO_1 PM_IO_2 PM_IO_3 PM_IO_4 PM_IO_5 15,18 15,18 15,18 15,18 PM_IO_6 PM_IO_7 PM_IO_8 PM_IO_9 15,18 15,18 15,18 15,18 PM_IO_10 PM_IO_11 PM_IO_12 PM_IO_13 15,18 15,18 15,18 15,18 PM_IO_14 PM_IO_15 PM_IO_16 PM_IO_17 15,18 15,18 15,18 15,18 PM_IO_18 PM_IO_19 PM_IO_20 PM_IO_21 15,18 15,18 15,18 15,18 15,18 15,18 15,18 15,18 15,18 15,18 15,18 15,18 15,18 15,18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 PM_IO_22 PM_IO_23 PM_IO_24 PM_IO_25 PM_IO_26 PM_IO_27 PM_IO_28 PM_IO_29 PM_IO_30 PM_IO_31 PM_IO_32 PM_IO_33 PM_IO_34 PM_IO_35 PM_IO_36 PM_IO_37 PM_IO_38 PM_IO_39 PM_IO_40 PM_IO_41 PM_IO_42 PM_IO_43 PM_IO_44 PM_IO_45 PM_IO_46 PM_IO_47 PM_IO_48 PM_IO_49 PM_IO_50 PM_IO_51 PM_IO_52 PM_IO_53 PM_IO_54 PM_IO_55 PM_IO_56 PM_IO_57 PM_IO_58 PM_IO_59 PM_IO_60 PM_IO_61 PM_IO_62 PM_IO_63 PM_IO_64 PM_IO_65 PM_IO_66 PM_IO_67 PM_IO_68 PM_IO_69 PM_IO_70 PM_IO_71 AH5 AG5 AH2 AH1 AH4 AG3 AD6 AD5 AG2 AG1 AF6 AE5 AB8 AB7 AE4 AE3 AF4 AF3 AC6 AC5 AF2 AF1 AD4 AD3 AA8 AA7 AE2 AE1 AB6 AB5 Y8 Y7 AD2 AD1 AC4 AC3 AA6 AA5 AC2 AB2 AB4 AB3 W8 W7 AA4 AA3 Y5 Y4 W6 W5 AB1 AA1 W4 W3 V8 V7 AA2 Y2 V6 V5 U8 U7 Y1 W1 V4 V3 U9 T9 W2 V2 U5 U4 T8 T7 U3 U2 T4 T3 T6 T5 V1 U1 8 8 D IO_L01P_3/VRN_3_AK3 IO_L01N_3/VRP_3_AJ3 VCC2V5 D R41 VRP_BANK3 49.9 C B A 8 NC NC NC NC NC NC NC NC NC NC IO_L02P_3_AH5 IO_L02N_3_AG5 IO_L03P_3_AH2 IO_L03N_3/VREF_3_AH1 IO_L04P_3_AH4 IO_L04N_3_AG3 IO_L05P_3_AD6 IO_L05N_3_AD5 IO_L06P_3_AG2 IO_L06N_3_AG1 IO_L31P_3_AF6 IO_L31N_3_AE5 IO_L32P_3_AB8 IO_L32N_3_AB7 IO_L33P_3_AE4 IO_L33N_3/VREF_3_AE3 IO_L34P_3_AF4 IO_L34N_3_AF3 IO_L35P_3_AC6 IO_L35N_3_AC5 IO_L36P_3_AF2 IO_L36N_3_AF1 IO_L37P_3_AD4 IO_L37N_3_AD3 IO_L38P_3_AA8 IO_L38N_3_AA7 IO_L39P_3_AE2 IO_L39N_3/VREF_3_AE1 IO_L40P_3_AB6 IO_L40N_3_AB5 IO_L41P_3_Y8 IO_L41N_3_Y7 IO_L42P_3_AD2 IO_L42N_3_AD1 IO_L43P_3_AC4 IO_L43N_3_AC3 IO_L44P_3_AA6 IO_L44N_3_AA5 IO_L45P_3_AC2 IO_L45N_3/VREF_3_AB2 IO_L46P_3_AB4 IO_L46N_3_AB3 IO_L47P_3_W8 IO_L47N_3_W7 IO_L48P_3_AA4 IO_L48N_3_AA3 IO_L49P_3_Y5 IO_L49N_3_Y4 IO_L50P_3_W6 IO_L50N_3_W5 IO_L51P_3_AB1 IO_L51N_3/VREF_3_AA1 IO_L52P_3_W4 IO_L52N_3_W3 IO_L53P_3_V8 IO_L53N_3_V7 IO_L54P_3_AA2 IO_L54N_3_Y2 IO_L55P_3_V6 IO_L55N_3_V5 IO_L56P_3_U8 IO_L56N_3_U7 IO_L57P_3_Y1 IO_L57N_3/VREF_3_W1 IO_L58P_3_V4 IO_L58N_3_V3 IO_L59P_3_U9 IO_L59N_3_T9 IO_L60P_3_W2 IO_L60N_3_V2 IO_L85P_3_U5 IO_L85N_3_U4 IO_L86P_3_T8 IO_L86N_3_T7 IO_L87P_3_U3 IO_L87N_3/VREF_3_U2 IO_L88P_3_T4 IO_L88N_3_T3 IO_L89P_3_T6 IO_L89N_3_T5 IO_L90P_3_V1 IO_L90N_3_U1 VCCO_3_T10 VCCO_3_U10 VCCO_3_Y9 VCCO_3_V9 VCCO_3_W9 VCCO_3_W10 VCCO_3_V10 VCCO_3_Y10 VCCO_3_AA9 VCCO_3_AB9 T10 U10 Y9 V9 W9 W10 V10 Y10 AA9 AB9 C B SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM BANK3: PM LVDS IO A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 8 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 VCC2V5 XC2VP20-BANK4 FF896 (DIE DOWN) R429 VRN_BANK4 9 49.9 9 9 VRN_BANK4 VRP_BANK4 AH8 AG8 9,19,20,46 FPGA_INIT AF7 AG6 AD9 AC9 AH7 AG7 AD8 AD10 AC10 AE8 AE7 AK8 AJ8 AD11 AC11 AF9 AF8 AG10 AF10 AD12 AC12 AE10 AE9 AJ9 AH9 AD13 AC13 AE12 AE11 AH11 AH10 AC14 AB14 AF11 AG11 AK10 AJ10 AF13 AF12 AH13 AG13 AC15 AB15 AE14 AD14 AG14 AF14 AE15 AD15 IO_L01P_4/INIT_B_AF7 IO_L01N_4/DOUT_AG6 IO_L02P_4/D1_AD9 IO_L02N_4/D0_AC9 IO_L03P_4/D3_AH7 IO_L03N_4/D2_AG7 IO_L05_4/No_Pair_AD8 IO_L07P_4/VREF_4_AD10 IO_L07N_4_AC10 IO_L08P_4_AE8 IO_L08N_4_AE7 IO_L09P_4/VREF_4_AK8 IO_L09N_4_AJ8 IO_L37P_4_AD11 IO_L37N_4_AC11 IO_L38P_4_AF9 IO_L38N_4_AF8 IO_L39P_4_AG10 IO_L39N_4_AF10 IO_L43P_4_AD12 IO_L43N_4_AC12 IO_L44P_4_AE10 IO_L44N_4_AE9 IO_L45P_4/VREF_4_AJ9 IO_L45N_4_AH9 IO_L46P_4_AD13 IO_L46N_4_AC13 IO_L47P_4_AE12 IO_L47N_4_AE11 IO_L48P_4_AH11 IO_L48N_4_AH10 IO_L49P_4_AC14 IO_L49N_4_AB14 IO_L50_4/No_Pair_AF11 IO_L53_4/No_Pair_AG11 IO_L54P_4_AK10 IO_L54N_4_AJ10 IO_L56P_4_AF13 IO_L56N_4_AF12 IO_L57P_4/VREF_4_AH13 IO_L57N_4_AG13 IO_L67P_4_AC15 IO_L67N_4_AB15 IO_L68P_4_AE14 IO_L68N_4_AD14 IO_L69P_4/VREF_4_AG14 IO_L69N_4_AF14 IO_L73P_4_AE15 IO_L73N_4_AD15 AJ15 AH15 AG15 AF15 IO_L75P_4/GCLK0P_AJ15 IO_L75N_4/GCLK1S_AH15 IO_L74P_4/GCLK2P_AG15 IO_L74N_4/GCLK3S_AF15 R432 VRP_BANK4 D TO BE ADJUSTED INDEPENDENTLY OF OTHER I/O. R31 TRC_CLK_R 9 24.9 C VCC2V5 9,19,20,46 R440 FPGA_INIT 4.75K NC 9 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 19 TRC_CLK_R ATD_17 TRC_TS1O ATD_16 TRC_TS2E TRC_TS3 ATD_18 TRC_TS5 TRC_TS6 ATD_8 ATD_9 ATD_15 ATD_19 ATD_13 ATD_12 ATD_10 TRC_TS1E TRC_TS2O ATD_14 ATD_11 TRC_TS4 CPU_TDI CPU_TDO_TMP CPU_TMS CPU_TCK CPU_TRST_N CPU_HALT_N 47 47 46 46 FPGA_LED_USER1 FPGA_LED_USER2 OPB_BUS_ERROR PLB_BUS_ERROR 45 45 45 45 SPI_DATA_IN SPI_DATA_OUT SPI_DATA_CS_N SPI_CLK 15,18 15,18 15,18 15,18 15,18 15,18 NC NC NC NC PM_IO_72 PM_IO_73 PM_IO_74 PM_IO_75 PM_IO_76 PM_IO_77 NC NC VCC2V5 R422 SYSACE_CLK_OE 6,9,18 6,9,18 18 9 LVDS_CLKEXT_P LVDS_CLKEXT_N PM_CLK_BOT SYSACE_FPGA_CLK 6,9,18 LVDS_CLKEXT_P 6,9,18 LVDS_CLKEXT_N AB10 AB11 AB12 AB13 AA10 AA11 AA12 AA13 AA14 AA15 VCCO_4_AB10 VCCO_4_AB11 VCCO_4_AB12 VCCO_4_AB13 VCCO_4_AA10 VCCO_4_AA11 VCCO_4_AA12 VCCO_4_AA13 VCCO_4_AA14 VCCO_4_AA15 C B 4.75K R421 B 5 VCC2V5 D NOTE: TRC_CLK RESISTOR ALLOWS CLOCK TERMINATION TRC_CLK IO_L06P_4/VRN_4_AH8 IO_L06N_4/VRP_4_AG8 9 49.9 19 U37 0 R414 100 VCC2V5 VCC2V5 1 X8 OE VCC 4 R411 C542 0.1UF OSC SYSACE_FPGA_CLK 9 SCH P/N ART P/N FAB P/N 34.0 2 GND OUT SG-636PDE 33.0000MHZ 3 SYSACE_CLK_OSC R412 SYSACE_CLK_R 0381171-02 0531311-02 1280333-02 18.2 R410 A SYSACE_CLK Title: 20 34.0 ML310 VIRTEX-II PRO PLAFTORM BANK4: TRACE, CPU DEBUG, PM I/O A Date: 1-5-2004_13:05 Sheet Size: B Sheet 4 3 2 9 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 XC2VP20-BANK5 FF896 (DIE DOWN) VCC2V5 R386 10,11,12,21,23 VRN_BANK5 VREF_DDR 10 49.9 10 10 VRN_BANK5 VRP_BANK5 AG23 AH23 10 DDR_CLK_FB AG25 AF24 AC22 AD22 AG24 AH24 AD23 AC21 AD21 AE24 AE23 AJ23 AK23 AC20 AD20 AF23 AF22 AF21 AG21 AC19 AD19 AE22 AE21 AH22 AJ22 AC18 AD18 AE20 AE19 AH21 AH20 AB17 AC17 AF20 AG20 AJ21 AK21 AF19 AF18 AG18 AH18 AB16 AC16 AD17 AE17 AF17 AG17 AD16 AE16 IO_L01P_5/CS_B_AG25 IO_L01N_5/RDWR_B_AF24 IO_L02P_5/D7_AC22 IO_L02N_5/D6_AD22 IO_L03P_5/D5_AG24 IO_L03N_5/D4_AH24 IO_L05_5/No_Pair_AD23 IO_L07P_5_AC21 IO_L07N_5/VREF_5_AD21 IO_L08P_5_AE24 IO_L08N_5_AE23 IO_L09P_5_AJ23 IO_L09N_5/VREF_5_AK23 IO_L37P_5_AC20 IO_L37N_5_AD20 IO_L38P_5_AF23 IO_L38N_5_AF22 IO_L39P_5_AF21 IO_L39N_5_AG21 IO_L43P_5_AC19 IO_L43N_5_AD19 IO_L44P_5_AE22 IO_L44N_5_AE21 IO_L45P_5_AH22 IO_L45N_5/VREF_5_AJ22 IO_L46P_5_AC18 IO_L46N_5_AD18 IO_L47P_5_AE20 IO_L47N_5_AE19 IO_L48P_5_AH21 IO_L48N_5_AH20 IO_L49P_5_AB17 IO_L49N_5_AC17 IO_L50_5/No_Pair_AF20 IO_L53_5/No_Pair_AG20 IO_L54P_5_AJ21 IO_L54N_5_AK21 IO_L56P_5_AF19 IO_L56N_5_AF18 IO_L57P_5_AG18 IO_L57N_5/VREF_5_AH18 IO_L67P_5_AB16 IO_L67N_5_AC16 IO_L68P_5_AD17 IO_L68N_5_AE17 IO_L69P_5_AF17 IO_L69N_5/VREF_5_AG17 IO_L73P_5_AD16 IO_L73N_5_AE16 AF16 AG16 AH16 AJ16 IO_L74P_5/GCLK4P_AF16 IO_L74N_5/GCLK5S_AG16 IO_L75P_5/GCLK6P_AH16 IO_L75N_5/GCLK7S_AJ16 U37 IO_L06P_5/VRN_5_AG23 IO_L06N_5/VRP_5_AH23 VCC2V5 D D R375 VRP_BANK5 10 NC NC NC 49.9 21,22 21,22 DDR_CKE0 DDR_CKE1 NC NC 21,22 21,22 DDR_A12 DDR_A11 21,22 21,22 21,22 21,22 DDR_A09 DDR_A07 DDR_A06 DDR_A04 NC NC NC NC NC NC NC VREF_DDR 10,11,12,21,23 21,22 C157 0.1UF C C156 0.01UF 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 B VCC2V5 R367 1 X6 OE1 VCC1 DDR_A08 NC NC NC NC DDR_A05 DDR_A01 DDR_A00 DDR_A10 DDR_A03 DDR_A02 DDR_BA0 DDR_S1_N DDR_BA1 DDR_S0_N DDR_CAS_N NC NC NC NC NC DDR_WE_N DDR_RAS_N 10 10 5,10 5,10 DDR_CLK_FB USER_CLKSYS LVDS_CLKLOC_P LVDS_CLKLOC_N 5,10 LVDS_CLKLOC_P 5,10 LVDS_CLKLOC_N AB18 AB19 AB20 AB21 AA16 AA17 AA18 AA19 AA20 AA21 VCCO_5_AB18 VCCO_5_AB19 VCCO_5_AB20 VCCO_5_AB21 VCCO_5_AA16 VCCO_5_AA17 VCCO_5_AA18 VCCO_5_AA19 VCCO_5_AA20 VCCO_5_AA21 C B 14 4.75K OSC C446 0.1UF 4 OE2 VCC2 11 R408 100 7 GND OUT MB2100H 100.0000MHZ NOSTUFF 8 USER_CLKSYS_R R366 USER_CLKSYS 10 24.9 XS6 SOCKETED 14-PIN DIP SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A BANK5: DDR A Date: 12-2-2003_13:35 Sheet Size: B Sheet 4 3 2 10 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 10,11,12,21,23 VCC2V5 D 2 XC2VP20-BANK6 FF896 (DIE DOWN) VREF_DDR 11 11 VRN_BANK6 VRP_BANK6 AK28 AJ28 21,22 21,22 21,22 DDR_DQ58 DDR_DQ62 DDR_DQM07 21,22 21,22 21,22 21,22 DDR_DQ59 DDR_DQ63 DDR_DQ56 DDR_DQ60 AH26 AG26 AH29 AH30 AH27 AG28 AD25 AD26 AG29 AG30 AF25 AE26 AB23 AB24 AE27 AE28 AF27 AF28 AC25 AC26 AF29 AF30 AD27 AD28 AA23 AA24 AE29 AE30 AB25 AB26 Y23 Y24 AD29 AD30 AC27 AC28 AA25 AA26 AC29 AB29 AB27 AB28 W23 W24 AA27 AA28 Y26 Y27 W25 W26 AB30 AA30 W27 W28 V23 V24 AA29 Y29 V25 V26 U23 U24 Y30 W30 V27 V28 U22 T22 W29 V29 U26 U27 T23 T24 U28 U29 T27 T28 T25 T26 V30 U30 U37 IO_L01P_6/VRN_6_AK28 IO_L01N_6/VRP_6_AJ28 VCC2V5 D R27 VRN_BANK6 11 49.9 R25 VRP_BANK6 11 49.9 21,22 21,22 21,22 DDR_DQS07 DDR_DQ57 DDR_DQ61 NC NC NC NC 21,22 21,22 21,22 21,22 C 10,11,12,21,23 VREF_DDR C158 0.1UF C159 0.01UF DDR_DQ51 DDR_DQ55 DDR_DQ49 DDR_DQ48 DDR_DQS06 DDR_DQ50 DDR_DQ54 NC DDR_DQM05 DDR_DQM06 NC 21,22 21,22 21,22 21,22 DDR_DQ53 DDR_DQ52 21,22 21,22 21,22 21 21 21,22 21,22 21,22 21,22 DDR_CK2_N DDR_CK2 DDR_DQ47 DDR_DQ46 DDR_DQ41 DDR_DQ45 NC NC NC 21,22 21,22 NOTE: THE PINOUT OF THE DDR DQ AND DQS SIGNALS IS INTENDED TO ALLOW THE USE OF LOCAL CLOCKING RESOURCES B 1 AS DESCRIBED IN XAPP609. 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 21,22 DDR_DQ43 DDR_DQ42 DDR_DQS05 DDR_DQ44 DDR_DQ40 DDR_DQ38 DDR_DQ34 DDR_DQM04 NC NC NC DDR_DQ35 DDR_DQ39 DDR_DQS04 DDR_DQ36 DDR_DQ32 DDR_DQM08 NC NC NC NC NC DDR_DQ37 DDR_DQ33 DDR_DQS08 DDR_CB7 DDR_CB3 DDR_CB5 DDR_CB4 NC NC NC NC 21,22 21,22 21,22 21,22 21 21 A DDR_CB6 DDR_CB2 DDR_CB1 DDR_CB0 DDR_CK0 DDR_CK0_N IO_L02P_6_AH26 IO_L02N_6_AG26 IO_L03P_6_AH29 IO_L03N_6/VREF_6_AH30 IO_L04P_6_AH27 IO_L04N_6_AG28 IO_L05P_6_AD25 IO_L05N_6_AD26 IO_L06P_6_AG29 IO_L06N_6_AG30 IO_L31P_6_AF25 IO_L31N_6_AE26 IO_L32P_6_AB23 IO_L32N_6_AB24 IO_L33P_6_AE27 IO_L33N_6/VREF_6_AE28 IO_L34P_6_AF27 IO_L34N_6_AF28 IO_L35P_6_AC25 IO_L35N_6_AC26 IO_L36P_6_AF29 IO_L36N_6_AF30 IO_L37P_6_AD27 IO_L37N_6_AD28 IO_L38P_6_AA23 IO_L38N_6_AA24 IO_L39P_6_AE29 IO_L39N_6/VREF_6_AE30 IO_L40P_6_AB25 IO_L40N_6_AB26 IO_L41P_6_Y23 IO_L41N_6_Y24 IO_L42P_6_AD29 IO_L42N_6_AD30 IO_L43P_6_AC27 IO_L43N_6_AC28 IO_L44P_6_AA25 IO_L44N_6_AA26 IO_L45P_6_AC29 IO_L45N_6/VREF_6_AB29 IO_L46P_6_AB27 IO_L46N_6_AB28 IO_L47P_6_W23 IO_L47N_6_W24 IO_L48P_6_AA27 IO_L48N_6_AA28 IO_L49P_6_Y26 IO_L49N_6_Y27 IO_L50P_6_W25 IO_L50N_6_W26 IO_L51P_6_AB30 IO_L51N_6/VREF_6_AA30 IO_L52P_6_W27 IO_L52N_6_W28 IO_L53P_6_V23 IO_L53N_6_V24 IO_L54P_6_AA29 IO_L54N_6_Y29 IO_L55P_6_V25 IO_L55N_6_V26 IO_L56P_6_U23 IO_L56N_6_U24 IO_L57P_6_Y30 IO_L57N_6/VREF_6_W30 IO_L58P_6_V27 IO_L58N_6_V28 IO_L59P_6_U22 IO_L59N_6_T22 IO_L60P_6_W29 IO_L60N_6_V29 IO_L85P_6_U26 IO_L85N_6_U27 IO_L86P_6_T23 IO_L86N_6_T24 IO_L87P_6_U28 IO_L87N_6/VREF_6_U29 IO_L88P_6_T27 IO_L88N_6_T28 IO_L89P_6_T25 IO_L89N_6_T26 IO_L90P_6_V30 IO_L90N_6_U30 VCCO_6_T21 VCCO_6_U21 VCCO_6_V21 VCCO_6_V22 VCCO_6_W21 VCCO_6_W22 VCCO_6_Y21 VCCO_6_Y22 VCCO_6_AA22 VCCO_6_AB22 * * * T21 U21 V21 V22 W21 W22 Y21 Y22 AA22 AB22 * * * * C * * * * * * B * * * * * * SCH P/N ART P/N FAB P/N * Title: * 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM BANK6: DDR A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 11 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 10,11,12,21,23 VCC2V5 D 12 12 R24 VRN_BANK7 2 XC2VP20-BANK7 FF896 (DIE DOWN) VREF_DDR VRN_BANK7 VRP_BANK7 B28 A28 18 18 18 18 PM_IO_84 PM_IO_85 PM_IO_86 PM_IO_87 NC R26 12 49.9 VREF_DDR 10,11,12,21,23 C179 0.1UF C C190 0.01UF 18 18 18 18 18 18 18 18 21,22 21,22 21,22 PM_IO_88 PM_IO_89 PM_IO_90 PM_IO_91 PM_IO_92 PM_IO_93 PM_IO_94 PM_IO_95 DDR_DQ00 DDR_DQ04 DDR_DQM00 21,22 DDR_DQM01 21,22 21,22 DDR_DQ05 DDR_DQ01 21,22 21,22 21,22 21,22 21,22 DDR_DQS00 DDR_DQ08 DDR_DQ09 DDR_DQ02 DDR_DQ06 NC NC NC 21,22 21,22 DDR_DQ07 DDR_DQ03 21,22 DDR_DQS01 21,22 21,22 DDR_DQ14 DDR_DQ15 21,22 21,22 21,22 21,22 21 21 DDR_DQ10 DDR_DQ11 DDR_DQ12 DDR_DQ13 DDR_CK1_N DDR_CK1 USE OF LOCAL CLOCKING RESOURCES AS DESCRIBED IN XAPP609. NC NC NC NC NC NC NOTE: THE PINOUT OF THE DDR DQ AND DQS SIGNALS IS INTENDED TO ALLOW THE 21,22 21,22 21,22 DDR_DQ19 DDR_DQ23 DDR_DQM02 21,22 21,22 21,22 21,22 DDR_DQ20 DDR_DQ16 DDR_DQ18 DDR_DQ22 21,22 DDR_DQS02 B 21,22 21,22 21,22 DDR_DQ17 DDR_DQ21 DDR_DQM03 21,22 21,22 DDR_DQ27 DDR_DQ31 21,22 DDR_DQS03 21,22 21,22 DDR_DQ26 DDR_DQ30 NC NC NC NC NC NC NC NC NC NC NC 21,22 21,22 21,22 21,22 A U37 IO_L01P_7/VRN_7_B28 IO_L01N_7/VRP_7_A28 VCC2V5 D 12 49.9 VRP_BANK7 1 DDR_DQ25 DDR_DQ29 DDR_DQ24 DDR_DQ28 G26 G25 D26 C26 C30 C29 J24 J23 D28 C27 D30 D29 H26 H25 E28 E27 E30 E29 K24 K23 F28 F27 F30 F29 J26 J25 G28 G27 G30 G29 L24 L23 H28 H27 J29 H29 M24 M23 K26 K25 K30 J30 M26 M25 J28 J27 L29 K29 N24 N23 K28 K27 M30 L30 N26 N25 L27 L26 N29 M29 R22 P22 M28 M27 P30 N30 P24 P23 N28 N27 P29 P28 R24 R23 P27 P26 T29 R29 R26 R25 R28 R27 IO_L02P_7_G26 IO_L02N_7_G25 IO_L03P_7_D26 IO_L03N_7_C26 IO_L04P_7_C30 IO_L04N_7/VREF_7_C29 IO_L05P_7_J24 IO_L05N_7_J23 IO_L06P_7_D28 IO_L06N_7_C27 IO_L31P_7_D30 IO_L31N_7_D29 IO_L32P_7_H26 IO_L32N_7_H25 IO_L33P_7_E28 IO_L33N_7_E27 IO_L34P_7_E30 IO_L34N_7/VREF_7_E29 IO_L35P_7_K24 IO_L35N_7_K23 IO_L36P_7_F28 IO_L36N_7_F27 IO_L37P_7_F30 IO_L37N_7_F29 IO_L38P_7_J26 IO_L38N_7_J25 IO_L39P_7_G28 IO_L39N_7_G27 IO_L40P_7_G30 IO_L40N_7/VREF_7_G29 IO_L41P_7_L24 IO_L41N_7_L23 IO_L42P_7_H28 IO_L42N_7_H27 IO_L43P_7_J29 IO_L43N_7_H29 IO_L44P_7_M24 IO_L44N_7_M23 IO_L45P_7_K26 IO_L45N_7_K25 IO_L46P_7_K30 IO_L46N_7/VREF_7_J30 IO_L47P_7_M26 IO_L47N_7_M25 IO_L48P_7_J28 IO_L48N_7_J27 IO_L49P_7_L29 IO_L49N_7_K29 IO_L50P_7_N24 IO_L50N_7_N23 IO_L51P_7_K28 IO_L51N_7_K27 IO_L52P_7_M30 IO_L52N_7/VREF_7_L30 IO_L53P_7_N26 IO_L53N_7_N25 IO_L54P_7_L27 IO_L54N_7_L26 IO_L55P_7_N29 IO_L55N_7_M29 IO_L56P_7_R22 IO_L56N_7_P22 IO_L57P_7_M28 IO_L57N_7_M27 IO_L58P_7_P30 IO_L58N_7/VREF_7_N30 IO_L59P_7_P24 IO_L59N_7_P23 IO_L60P_7_N28 IO_L60N_7_N27 IO_L85P_7_P29 IO_L85N_7_P28 IO_L86P_7_R24 IO_L86N_7_R23 IO_L87P_7_P27 IO_L87N_7_P26 IO_L88P_7_T29 IO_L88N_7/VREF_7_R29 IO_L89P_7_R26 IO_L89N_7_R25 IO_L90P_7_R28 IO_L90N_7_R27 VCCO_7_J22 VCCO_7_K22 VCCO_7_L21 VCCO_7_L22 VCCO_7_M21 VCCO_7_M22 VCCO_7_N21 VCCO_7_N22 VCCO_7_P21 VCCO_7_R21 J22 K22 L21 L22 M21 M22 N21 N22 P21 R21 * * C * * B * * SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM BANK7: DDR A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 12 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 VCC2V5 3 2 1 XC2VP20-MISC FF896 (DIE DOWN) U37 VCC2V5 R449 A2 A15 A16 A29 B1 B30 R1 R30 T1 T30 AJ1 AJ30 AK2 AK15 AK16 AK29 D VCCAUX_A2 VCCAUX_A15 VCCAUX_A16 VCCAUX_A29 VCCAUX_B1 VCCAUX_B30 VCCAUX_R1 VCCAUX_R30 VCCAUX_T1 VCCAUX_T30 VCCAUX_AJ1 VCCAUX_AJ30 VCCAUX_AK2 VCCAUX_AK15 VCCAUX_AK16 VCCAUX_AK29 VCC1V5 C L12 L13 L14 L15 L16 L17 L18 L19 M11 M20 N11 N20 P11 P20 R11 R20 T11 T20 U11 U20 V11 V20 W11 W20 Y12 Y13 Y14 Y15 Y16 Y17 Y18 Y19 VCCINT_L12 VCCINT_L13 VCCINT_L14 VCCINT_L15 VCCINT_L16 VCCINT_L17 VCCINT_L18 VCCINT_L19 VCCINT_M11 VCCINT_M20 VCCINT_N11 VCCINT_N20 VCCINT_P11 VCCINT_P20 VCCINT_R11 VCCINT_R20 VCCINT_T11 VCCINT_T20 VCCINT_U11 VCCINT_U20 VCCINT_V11 VCCINT_V20 VCCINT_W11 VCCINT_W20 VCCINT_Y12 VCCINT_Y13 VCCINT_Y14 VCCINT_Y15 VCCINT_Y16 VCCINT_Y17 VCCINT_Y18 VCCINT_Y19 DXP_H24 DXN_D25 H24 D25 PWRDWN_B_AD7 HSWAP_EN_H23 RSVD_D6 VBATT_H7 AD7 H23 D6 H7 CCLK_AC7 DONE_AC8 PROG_B_G24 FPGA_DXP FPGA_DXN 45 45 FPGA_PWRDWN_B FPGA_HSWAP 13 13 FPGA_VBATT 13 AC7 AC8 G24 FPGA_CCLK FPGA_DONE FPGA_PROG_B 13 13,46 13,20 TDO_F5 TDI_F26 TMS_H8 TCK_G7 F5 F26 H8 G7 FPGA_TDO FPGA_TDI FPGA_TMS FPGA_TCK 13,20 20 20 20 M2_AC23 M1_AC24 M0_AD24 AC23 AC24 AD24 NC FPGA_PWRDWN_B 13 0 FPGA_MODE_2 FPGA_MODE_1 FPGA_MODE_0 R384 FPGA_HSWAP 13 D 4.75K R416 FPGA_VBATT 13 VBATT 45 0 C534 0.1UF 13 13 13 VCC2V5 C R389 FPGA_PROG_B 13,20 4.75K R413 FPGA_CCLK 13 4.75K R452 FPGA_DONE 13,46 4.75K R420 FPGA_TDO 13,20 100 NOTE: TDO IS AN OPEN-DRAIN OUTPUT ON V2PRO DEVICES AND REQUIRES A STRONG PULLUP. NOSTUFF R403 FPGA_MODE_0 4.75K 13 4.75K FPGA_MODE_1 NOSTUFF 13 R395 FPGA_MODE_2 4.75K 13 NOSTUFF B R397 B GND;AK22,AK9,AJ29,AJ2,AH28,AH17,AH14,AH3 GND;AG27,AG22,AG19,AG12,AG9,AG4,AF26,AF5 GND;AE25,AE18,AE13,AE6,AC30,AC1,Y28,Y25 GND;Y20,Y11,Y6,Y3,W19,W18,W17,W16 GND;W15,W14,W13,W12,V19,V18,V17,V16 GND;V15,V14,V13,V12,U25,U19,U18,U17 GND;U16,U15,U14,U13,U12,U6,T19,T18 GND;T17,T16,T15,T14,T13,T12,R19,R18 GND;R17,R16,R15,R14,R13,R12,P25,P19 GND;P18,P17,P16,P15,P14,P13,P12,P6 GND;N19,N18,N17,N16,N15,N14,N13,N12 GND;M19,M18,M17,M16,M15,M14,M13,M12 GND;L28,L25,L20,L11,L6,L3,H30,H1 GND;F25,F18,F13,F6,E26,E5,D27,D22 GND;D19,D12,D9,D4,C28,C17,C14,C3 GND;B29,B2,A22,A9 SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A NOTE: MODE BITS HAVE INTERNAL PULLUPS AND DEFAULT TO SLAVE-SERIAL MODE. FPGA CONFIG AND MISC I/O THERE MAY BE SOME A Date: 10-6-2003_14:59 Ver: X.X Rev: X CONFLCITS BETWEEN THE JTAG MODES AND ICAP Sheet Size: B HOWEVER SLAVE-SERIAL MODE IS KNOWN TO WORK. Sheet 4 3 2 13 of Drawn By 52 XXX 1 4 3 2 1 VCC2V5 VCC2V5 C476 0.1UF C475 0.1UF C466 0.1UF C480 0.1UF C499 0.1UF C481 0.1UF C577 0.1UF C467 0.1UF C457 0.1UF C458 0.1UF C498 0.1UF BANK 0 C557 0.1UF C570 0.1UF C200 0.1UF C569 0.1UF C558 0.1UF C479 0.1UF C161 0.1UF C482 0.1UF C578 0.1UF BANK4 D VCC2V5 C178 0.1UF D VCC2V5 C181 0.1UF C172 0.1UF C500 0.1UF C175 0.1UF C177 0.1UF C492 0.1UF C541 0.1UF C188 0.1UF C538 0.1UF C192 0.1UF C189 0.1UF C191 0.1UF C171 0.1UF C170 0.1UF C209 0.1UF C556 0.1UF C232 0.1UF C576 0.1UF C574 0.1UF C573 0.1UF C231 0.1UF C537 0.1UF C230 0.1UF C215 0.1UF BANK3 BANK 5,6&7 VCC2V5 C C168 0.1UF C180 0.1UF C169 0.1UF C176 0.1UF C167 0.1UF C472 0.1UF C456 0.1UF C462 0.1UF C461 0.1UF C471 0.1UF C560 0.1UF C477 0.1UF C474 0.1UF C561 0.1UF VCC3_PCI C459 0.1UF C221 0.1UF C224 0.1UF C222 0.1UF C223 0.1UF C562 0.1UF C554 0.1UF C536 0.1UF C565 0.1UF C564 0.1UF C219 0.1UF C BANK1 VCC2V5 C510 0.1UF VCC3_PCI VCCAUX C164 0.1UF C163 0.1UF C486 0.1UF C518 0.1UF C160 0.1UF C497 0.1UF C513 0.1UF C484 0.1UF C490 0.1UF C162 0.1UF C165 0.1UF C166 0.1UF C483 0.1UF C519 0.1UF C198 0.1UF C559 0.1UF C539 0.1UF C535 0.1UF C555 0.1UF C217 0.1UF C563 0.1UF C226 0.1UF C227 0.1UF C228 0.1UF C208 0.1UF BANK2 B B VCC1V5 C516 0.1UF C491 0.1UF C520 0.1UF C515 0.1UF C503 0.1UF C528 0.1UF C575 0.1UF C508 0.1UF C521 0.1UF C225 0.1UF C572 0.1UF C571 0.1UF C567 0.1UF C229 0.1UF C566 0.1UF C512 0.1UF VCORE VCC1V5 A C540 0.1UF C470 0.1UF C465 0.1UF C468 0.1UF C473 0.1UF C568 0.1UF C460 0.1UF C517 0.1UF C201 0.1UF C514 0.1UF C529 0.1UF C464 0.1UF SCH P/N ART P/N FAB P/N C527 0.1UF C469 0.1UF C509 0.1UF C463 0.1UF Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM FPGA DECOUPLING A Date: 1-5-2004_13:05 Sheet Size: B Sheet 4 3 2 14 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 LVDS RECEIVE TERMINATION VCC3V3 C233 22UF 10V OUT 4 1 SHDN GND 3 5 ADJ TAB 6 LT1764AEQ MGT_AVCC 16,17,50 8,18 PM_IO_0 R33 PM_IO_1 8,18 9,18 R29 PM_IO_72 100 R2 1.07K D R441 U40 2 IN C238 330UF 6.3V 8,18 PM_IO_2 R48 PM_IO_3 8,18 9,18 PM_IO_4 1.00K R1 R450 VOUT = 1.21*(1+R2/R1) VOUT = 1.21*(1+1.07K/1.00K) VOUT = 2.504V PM_IO_6 PM_IO_75 9,18 PM_IO_77 9,18 100 R40 PM_IO_5 8,18 9,18 R30 PM_IO_76 100 8,18 9,18 D R32 PM_IO_74 100 8,18 PM_IO_73 100 100 R47 PM_IO_7 8,18 PM_IO_9 8,18 PM_IO_11 8,18 PM_IO_13 8,18 PM_IO_15 8,18 100 8,18 PM_IO_8 R34 100 8,18 PM_IO_10 VCC3V3 100 U34 C 2 SHDN ADJ 4 BYP MGT_VTT 8,18 GND6 6 R2 GND7 7 R39 100 8,18 C173 220UF 6.3V PM_IO_12 16,17,50 GND3 3 511 5 OUT 1 IN R371 8 C174 22UF 10V R46 PM_IO_14 R45 C 100 8,18 LT1763CS8 PM_IO_16 R36 PM_IO_17 8,18 PM_IO_19 8,18 PM_IO_21 8,18 PM_IO_23 8,18 PM_IO_25 8,18 PM_IO_27 8,18 PM_IO_29 8,18 PM_IO_31 8,18 PM_IO_33 8,18 PM_IO_35 8,18 100 C455 0.01UF 1.00K R1 R372 8,18 PM_IO_18 R55 100 8,18 VOUT = 1.21*(1+R2/R1) VOUT = 1.21*(1+511/1.00K) VOUT = 1.828V PM_IO_20 R51 100 8,18 PM_IO_22 R54 100 8,18 PM_IO_24 R56 100 8,18 PM_IO_26 R43 100 8,18 B PM_IO_28 R53 B 100 8,18 PM_IO_30 R44 100 8,18 PM_IO_32 R42 100 8,18 PM_IO_34 R52 100 SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A MGT POWER SUPPLIES,LVDS TERMINATION A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 15 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 U37 2 1 XC2VP20-TOP FF896 (DIE DOWN) 18 TXPPAD4_A26 18 TXNPAD4_A27 18 RXPPAD4_A25 18 RXNPAD4_A24 D A26 A27 AVCCAUXTX4_B26 B26 AVCC_TX4 MGT_AVCC BLM18AG TXPPAD4_A26 15,16,17,50 VTTXPAD4_B27 B27 RXPPAD4_A25 AVCCAUXRX4_B24 B24 VTRXPAD4_B25 B25 MGT_VTT 15,17,50 VTT_TX4 1 MGT_VTT_TOP 16 FB19 TXNPAD4_A27 MGT_AVCC 15,16,17,50 FB1 2 3 BLM18AG D J10 FB3 A25 A24 AVCC_RX4 BLM18AG FB21 RXNPAD4_A24 VTT_RX4 MGT_VTT_TOP 16 MGT_AVCC 15,16,17,50 BLM18AG C182 0.22UF GNDA4_C25 C25 AVCCAUXTX6_B19 B19 C485 0.22UF C185 0.22UF C488 0.22UF FB6 18 TXPPAD6_A19 18 TXNPAD6_A20 18 RXPPAD6_A18 18 RXNPAD6_A17 A19 A20 AVCC_TX6 BLM18AG TXPPAD6_A19 FB23 TXNPAD6_A20 VTTXPAD6_B20 B20 RXPPAD6_A18 AVCCAUXRX6_B17 B17 VTRXPAD6_B18 B18 VTT_TX6 BLM18AG C FB8 A18 A17 C AVCC_RX6 BLM18AG FB25 RXNPAD6_A17 VTT_RX6 MGT_VTT_TOP 16 MGT_AVCC 15,16,17,50 MGT_VTT_TOP 16 MGT_AVCC 15,16,17,50 BLM18AG C195 0.22UF GNDA6_C19 C19 AVCCAUXTX7_B13 B13 C502 0.22UF C197 0.22UF C507 0.22UF FB10 18 TXPPAD7_A13 18 TXNPAD7_A14 18 RXPPAD7_A12 18 RXNPAD7_A11 A13 A14 AVCC_TX7 BLM18AG TXPPAD7_A13 FB27 TXNPAD7_A14 VTTXPAD7_B14 B14 VTT_TX7 A12 RXPPAD7_A12 AVCCAUXRX7_B11 B11 AVCC_RX7 A11 RXNPAD7_A11 VTRXPAD7_B12 B12 VTT_RX7 BLM18AG FB12 B BLM18AG FB29 BLM18AG C202 0.22UF GNDA7_C12 C524 0.22UF C205 0.22UF B C526 0.22UF C12 FB14 18 TXPPAD9_A6 18 TXNPAD9_A7 18 RXPPAD9_A5 18 RXNPAD9_A4 A6 A7 AVCCAUXTX9_B6 B6 AVCC_TX9 BLM18AG TXPPAD9_A6 FB31 TXNPAD9_A7 VTTXPAD9_B7 B7 RXPPAD9_A5 AVCCAUXRX9_B4 B4 VTRXPAD9_B5 B5 VTT_TX9 BLM18AG FB17 A5 A4 AVCC_RX9 SCH P/N ART P/N FAB P/N BLM18AG FB33 RXNPAD9_A4 VTT_RX9 MGT_VTT_TOP BLM18AG 16 Title: C210 0.22UF A GNDA9_C6 4 C543 0.22UF C214 0.22UF 0381171-02 0531311-02 1280333-02 C549 0.22UF ML310 VIRTEX-II PRO PLAFTORM TOP MGT TRANSCEIVERS C6 A Date: FERRITE IS MURATA BLM18AG102SN1 Sheet Size: B FILTER CAP IS 0.22UF, 0603 PACKAGE Sheet 3 2 6-4-2004_12:59 16 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 U37 2 1 XC2VP20-BOT FF896 (DIE DOWN) 18 TXPPAD16_AK6 18 TXNPAD16_AK7 18 RXPPAD16_AK5 18 RXNPAD16_AK4 D AK6 AK7 AVCCAUXTX16_AJ6 AJ6 AVCC_TX16 MGT_AVCC BLM18AG TXPPAD16_AK6 15,16,17,50 VTTXPAD16_AJ7 AJ7 RXPPAD16_AK5 AVCCAUXRX16_AJ4 AJ4 VTRXPAD16_AJ5 AJ5 MGT_VTT 15,16,50 VTT_TX16 1 MGT_VTT_BOT 17 FB32 TXNPAD16_AK7 MGT_AVCC 15,16,17,50 FB15 2 3 BLM18AG D J11 FB18 AK5 AK4 AVCC_RX16 BLM18AG FB34 RXNPAD16_AK4 VTT_RX16 C211 0.22UF GNDA16_AH6 MGT_VTT_BOT 17 MGT_AVCC 15,16,17,50 BLM18AG C544 0.22UF C216 0.22UF C550 0.22UF AH6 FB11 18 TXPPAD18_AK13 18 TXNPAD18_AK14 18 RXPPAD18_AK12 18 RXNPAD18_AK11 AK13 AK14 AVCCAUXTX18_AJ13 AJ13 AVCC_TX18 BLM18AG TXPPAD18_AK13 FB28 TXNPAD18_AK14 VTTXPAD18_AJ14 AJ14 RXPPAD18_AK12 AVCCAUXRX18_AJ11 AJ11 VTRXPAD18_AJ12 AJ12 VTT_TX18 BLM18AG C FB13 AK12 AK11 C AVCC_RX18 BLM18AG FB30 RXNPAD18_AK11 VTT_RX18 MGT_VTT_BOT 17 MGT_AVCC 15,16,17,50 MGT_VTT_BOT 17 MGT_AVCC 15,16,17,50 BLM18AG C203 0.22UF GNDA18_AH12 AH12 AVCCAUXTX19_AJ19 AJ19 C525 0.22UF C206 0.22UF C530 0.22UF FB7 18 TXPPAD19_AK19 18 TXNPAD19_AK20 18 RXPPAD19_AK18 18 RXNPAD19_AK17 AK19 AK20 AVCC_TX19 BLM18AG TXPPAD19_AK19 FB24 TXNPAD19_AK20 VTTXPAD19_AJ20 AJ20 VTT_TX19 AK18 RXPPAD19_AK18 AVCCAUXRX19_AJ17 AJ17 AVCC_RX19 AK17 RXNPAD19_AK17 VTRXPAD19_AJ18 AJ18 VTT_RX19 BLM18AG FB9 B BLM18AG FB26 BLM18AG C196 0.22UF GNDA19_AH19 AH19 AVCCAUXTX21_AJ26 AJ26 C504 0.22UF C199 0.22UF B C511 0.22UF FB2 18 TXPPAD21_AK26 18 TXNPAD21_AK27 18 RXPPAD21_AK25 18 RXNPAD21_AK24 AK26 AK27 AVCC_TX21 BLM18AG TXPPAD21_AK26 FB20 TXNPAD21_AK27 VTTXPAD21_AJ27 AJ27 RXPPAD21_AK25 AVCCAUXRX21_AJ24 AJ24 VTT_TX21 BLM18AG FB4 AK25 AK24 AVCC_RX21 SCH P/N ART P/N FAB P/N BLM18AG FB22 RXNPAD21_AK24 VTRXPAD21_AJ25 AJ25 VTT_RX21 MGT_VTT_BOT BLM18AG 17 Title: C183 0.22UF A GNDA21_AH25 4 C487 0.22UF C186 0.22UF 0381171-02 0531311-02 1280333-02 C489 0.22UF ML310 VIRTEX-II PRO PLAFTORM BOT MGT TRANSCEIVERS AH25 A Date: FERRITE IS MURATA BLM18AG102SN1 Sheet Size: B FILTER CAP IS 0.22UF, 0603 PACKAGE Sheet 3 2 6-4-2004_12:59 17 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 2 1 12 12 PM_IO_94 PM_IO_95 PM1 A1A1 A2A2 12 12 PM_IO_92 PM_IO_93 PM1 D1D1 D2D2 8 8 PM_IO_69 PM_IO_68 PM2 A1A1 A2A2 8 8 PM_IO_71 PM_IO_70 PM2 D1D1 D2D2 12 12 PM_IO_90 PM_IO_91 C1C1 C2C2 12 12 PM_IO_88 PM_IO_89 F1F1 F2F2 8 8 PM_IO_53 PM_IO_52 C1C1 C2C2 8 8 PM_IO_41 PM_IO_40 F1F1 F2F2 12 12 PM_IO_86 PM_IO_87 A3A3 A4A4 12 12 PM_IO_84 PM_IO_85 D3D3 D4D4 8 8 PM_IO_67 PM_IO_66 A3A3 A4A4 8 8 PM_IO_63 PM_IO_62 D3D3 D4D4 6 6 PM_IO_3V_16 PM_IO_3V_12 C3C3 C4C4 6 6 PM_IO_3V_10 PM_IO_3V_4 F3F3 F4F4 8 8 PM_IO_61 PM_IO_60 C3C3 C4C4 8 8 PM_IO_65 PM_IO_64 F3F3 F4F4 6 6 PM_IO_3V_25 PM_IO_3V_18 A5A5 A6A6 6 6 PM_IO_3V_21 PM_IO_3V_20 D5D5 D6D6 8 8 PM_IO_55 PM_IO_54 A5A5 A6A6 8 8 PM_IO_59 PM_IO_58 D5D5 D6D6 6 6 PM_IO_3V_1 PM_IO_3V_3 C5C5 C6C6 6 6 PM_IO_3V_15 PM_IO_3V_0 F5F5 F6F6 8 8 PM_IO_39 PM_IO_38 C5C5 C6C6 8 8 PM_IO_47 PM_IO_46 F5F5 F6F6 6 6 PM_IO_3V_7 PM_IO_3V_22 A7A7 A8A8 6 6 PM_IO_3V_8 PM_IO_3V_6 D7D7 D8D8 8 8 PM_IO_51 PM_IO_50 A7A7 A8A8 8 8 PM_IO_43 PM_IO_42 D7D7 D8D8 6 6 PM_IO_3V_17 PM_IO_3V_5 C7C7 C8C8 6 6 PM_IO_3V_23 PM_IO_3V_11 F7F7 F8F8 8 8 PM_IO_49 PM_IO_48 C7C7 C8C8 8 8 PM_IO_37 PM_IO_36 F7F7 F8F8 6 6 PM_IO_3V_9 PM_IO_3V_13 A9A9 A10A10 6 6 PM_IO_3V_2 PM_IO_3V_14 D9D9 D10D10 8 8 PM_IO_45 PM_IO_44 A9A9 A10A10 8 8 PM_IO_57 PM_IO_56 D9D9 D10D10 5 5 PM_IO_80 PM_IO_81 C9C9 C10C10 5 PM_CLK_TOP F9F9 F10F10 9,15 9,15 PM_IO_74 PM_IO_75 C9C9 C10C10 9 5 5 PM_IO_82 PM_IO_83 A11A11 A12A12 5 5 PM_IO_78 PM_IO_79 D11D11 D12D12 9,15 9,15 PM_IO_72 PM_IO_73 A11A11 A12A12 9,15 9,15 6 6 PM_IO_3V_19 PM_IO_3V_24 C11C11 C12C12 6,9 6,9 LVDS_CLKEXT_N LVDS_CLKEXT_P F11F11 F12F12 8,15 8,15 PM_IO_20 PM_IO_21 C11C11 C12C12 8,15 8,15 PM_IO_32 PM_IO_33 F11F11 F12F12 D C 3 NC PM_CLK_BOT F9F9 F10F10 NC PM_IO_76 PM_IO_77 D11D11 D12D12 16 16 RXPPAD4_A25 RXNPAD4_A24 A13A13 A14A14 16 16 TXNPAD4_A27 TXPPAD4_A26 D13D13 D14D14 8,15 8,15 PM_IO_34 PM_IO_35 A13A13 A14A14 8,15 8,15 PM_IO_26 PM_IO_27 D13D13 D14D14 16 16 RXPPAD6_A18 RXNPAD6_A17 C13C13 C14C14 16 16 TXNPAD6_A20 TXPPAD6_A19 F13F13 F14F14 8,15 8,15 PM_IO_28 PM_IO_29 C13C13 C14C14 8,15 8,15 PM_IO_30 PM_IO_31 F13F13 F14F14 16 16 RXPPAD7_A12 RXNPAD7_A11 A15A15 A16A16 16 16 TXNPAD7_A14 TXPPAD7_A13 D15D15 D16D16 8,15 8,15 PM_IO_22 PM_IO_23 A15A15 A16A16 8,15 8,15 PM_IO_24 PM_IO_25 D15D15 D16D16 C15C15 C16C16 16 16 F15F15 F16F16 8,15 8,15 PM_IO_14 PM_IO_15 C15C15 C16C16 8,15 8,15 PM_IO_18 PM_IO_19 F15F15 F16F16 A17A17 A18A18 17 17 D17D17 D18D18 8,15 8,15 PM_IO_6 PM_IO_7 A17A17 A18A18 8,15 8,15 PM_IO_10 PM_IO_11 D17D17 D18D18 16 16 17 17 RXPPAD9_A5 RXNPAD9_A4 TXPPAD16_AK6 TXNPAD16_AK7 TXNPAD9_A7 TXPPAD9_A6 RXNPAD16_AK4 RXPPAD16_AK5 D 17 17 TXPPAD18_AK13 TXNPAD18_AK14 C17C17 C18C18 17 17 RXNPAD18_AK11 RXPPAD18_AK12 F17F17 F18F18 8,15 8,15 PM_IO_4 PM_IO_5 C17C17 C18C18 8,15 8,15 PM_IO_2 PM_IO_3 F17F17 F18F18 17 17 TXPPAD19_AK19 TXNPAD19_AK20 A19A19 A20A20 17 17 RXNPAD19_AK17 RXPPAD19_AK18 D19D19 D20D20 8,15 8,15 PM_IO_0 PM_IO_1 A19A19 A20A20 8,15 8,15 PM_IO_12 PM_IO_13 D19D19 D20D20 17 17 TXPPAD21_AK26 TXNPAD21_AK27 C19C19 C20C20 17 17 RXNPAD21_AK24 RXPPAD21_AK25 F19F19 F20F20 8,15 8,15 PM_IO_8 PM_IO_9 C19C19 C20C20 8,15 8,15 PM_IO_16 PM_IO_17 F19F19 F20F20 W1W1 X1X1 Y1Y1 Z1Z1 VCC12V_P W4W4 X4X4 Y4Y4 Z4Z4 VCC5V W5W5 X5X5 Y5Y5 Z5Z5 C B B W1W1 X1X1 Y1Y1 Z1Z1 VCC1V5 W4W4 X4X4 Y4Y4 Z4Z4 VCC2V5 W2W2 X2X2 Y2Y2 Z2Z2 VCC2V5 W5W5 X5X5 Y5Y5 Z5Z5 VCC5V W2W2 X2X2 Y2Y2 Z2Z2 VCC3V3 W3W3 X3X3 Y3Y3 Z3Z3 W6W6 X6X6 Y6Y6 Z6Z6 VCC12V_P W3W3 X3X3 Y3Y3 Z3Z3 ZDOK_550_RCPT ZDOK_550_RCPT GND;B1,B2,B3,B4,B5 GND;B6,B7,B8,B9,B10 GND;B11,B12,B13,B14,B15 GND;B16,B17,B18,B19,B20 GND;E1,E2,E3,E4,E5 GND;E6,E7,E8,E9,E10 GND;E11,E12,E13,E14,E15 GND;E16,E17,E18,E19,E20 W6W6 X6X6 Y6Y6 Z6Z6 ZDOK_550_RCPT ZDOK_550_RCPT GND;B1,B2,B3,B4,B5 GND;B6,B7,B8,B9,B10 GND;B11,B12,B13,B14,B15 GND;B16,B17,B18,B19,B20 GND;E1,E2,E3,E4,E5 GND;E6,E7,E8,E9,E10 GND;E11,E12,E13,E14,E15 GND;E16,E17,E18,E19,E20 SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A PERSONALITY MODULE CONNECTORS A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 18 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 VCC3V3 2 1 J9 NC 12 Vtst 2 Vref 19 PC4_TCK 6 TCK 19 PC4_TMS 4 TMS 19 PC4_TDI 10 FPGA_INIT 14 9,20,46 INIT 8 R415 2 19,20 SYSACE_TDO D VCC3V3 TDI 1 D TDO J19 1 Gtst 1.00K VCC3V3 3 GND 5 GND 7 GND 9 6,19 16 GND 13 GND 4.75K VCC U39 GND 11 R424 JTAG_SRC_SEL 15OE JTAG_SRC_SEL 1 A/B 19 PC4_TDI 2 A1 9,19 CPU_TDI 3 B1 6,19 CON_PC4 1 Y1 4 SYSACE_TDI VCC2V5 20 R352 0 19 CPU_VSENSE 0 19 PC4_TCK 9,19 CPU_TCK J12 C 19 CPU_TDO 1 2 9,19 CPU_TDI 3 4 CPU_TRST_N 9,19 5 6 CPU_VSENSE 19 9,19 CPU_TCK 7 8 9,19 CPU_TMS 9 NC 9,19 CPU_HALT_N NC 11 12 NC 13 14 NC 15 16 6 A2 B2 1 Y2 7 SYSACE_TCK R405 20 19 0 C TRC_VSENSE 0 NC 10 5 19 PC4_TMS 11A3 9,19 CPU_TMS 10B3 CPU_TDO_TMP 14A4 1 Y3 9 SYSACE_TMS R361 20 9,19 0 CPU_TDI 4.75K NC NC 9 NC 19,20 SYSACE_TDO 13B4 8 1 R425 Y412 CPU_TDO_R R347 CPU_TDO 0 19 9,19 CPU_TMS 100 4.75K GND R349 9,19 SN74LVC157A TSSOP-16 CPU_TCK 4.75K R339 P8 MICTOR 38 9,19 NOTE: THIS MUX INTRODUCES AN IMPLICIT 2.5V TO CPU_HALT_N 4.75K 3.3V LEVEL-SHIFT FOR THE CPU JTAG SIGNALS. R355 THE SERIES RESISTOR ON CPU_TDO IS INTENDED B 9,19 CPU_TRST_N B 19 9 TRC_TS6 TRC_TS5 TRC_TS4 TRC_TS3 TRC_TS2E TRC_TS1E TRC_TS2O TRC_TS1O ATD_16 ATD_17 ATD_18 ATD_19 TRC_VSENSE TRC_CLK NC NC NC NC NC ATD0 ATD1 ATD2 ATD3 ATD4 ATD5 ATD6 ATD7 ATD16 ATD17 ATD18 ATD19 NC14 VREF NC10 NC8 ATCLK NC4 NC2 ATD8 ATD9 ATD10 ATD11 ATD12 ATD13 ATD14 ATD15 NC21 TDI TMS TCK NC13 TDO NC9 NC7 NC5 NC3 NC1 1 3 5 7 9 1113151719212325272931333537 9 9 9 9 9 9 9 9 9 9 9 9 2 4 6 8101214161820222426283032343638 TO PROVIDE PROTECTION FOR A 2.5V JTAG PROBE. NC NC 4.75K VCC3V3 ATD_8 ATD_9 ATD_10 ATD_11 ATD_12 ATD_13 ATD_14 ATD_15 CPU_TRST_N CPU_TDI CPU_TMS CPU_TCK 9 9 9 9 9 9 9 9 9,19 9,19 9,19 9,19 CPU_TDO 19 CPU_HALT_N 9,19 VCC3V3 19 R423 PC4_TCK 4.75K C553 0.1UF SCH P/N ART P/N FAB P/N NC NC NC Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A JTAG, DEBUG, TRACE CONNECTORS A Date: 6-4-2004_13:01 Sheet Size: B Sheet GND; G1,G2,G3,G4,G5 MICTOR38 4 3 2 19 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 VCC2V5 C546 0.1UF 2 1 VCC3V3 C548 0.1UF C494 0.1UF C533 0.1UF C506 0.1UF C532 0.1UF C505 0.1UF C545 0.1UF VCC3V3 C551 0.1UF C493 0.1UF C547 0.1UF C523 0.1UF C495 0.1UF C552 0.1UF C496 0.1UF C522 0.1UF C579 0.1UF C580 0.1UF D D VCC2V5 VCC3V3 VCC3V3 NC R446 4.75K 1.00K R442 1.00K R443 35 34 CF_IOWR CF_IORD C 46_BVD1 45_BVD2 40_VS2 33_VS1 24_WP 43_INPACK 46 45 40 33 24 43 39_CSEL 41_RESET 39 41 50_GND 1_GND 50 1 NC NC NC NC NC NC CF_CSEL CF_RESET B VCC2V5 VCC3V3 DS24 20 35_IOWR 34_IORD SYSACE_RESET_N SYSACE_TDO SYSACE_TMS SYSACE_TCK SYSACE_TDI R404 19 19 19 19 38 13 R394 SYSACE_ERRLED 20 4.75K 48 38_VCC 13_VCC GND_35 GND_26 GND_18 GND_9 GND_144 GND_136 GND_129 GND_120 GND_111 46_GND 54_GND 64_GND 83_GND 75_GND 91_GND 100_GND GND_112 GND_110 CFGMODEPIN NC 25_CD2 49_D10 48_D09 23_D02 47_D08 22_D01 21_D00 20_A00 44_REG 19_A01 18_A02 42_WAIT 17_A03 16_A04 15_A05 14_A06 37_RDY/BSY 12_A07 36_WE 11_A08 10_A09 9_OEI 8_A10 32_CE2 7_CE1I 31_D15 6_D07 30_D14 5_D06 29_D13 4_D05 28_D12 3_D04 27_D11 2_D03 26_CD1 35 26 18 9 144 136 129 120 111 46 54 64 83 75 91 100 112 110 89 TSTTDO TSTTMS TSTTCK TSTTDI SYSACE_CFGMODE 97 98 101 102 20 25 49 48 23 47 22 21 20 44 19 18 42 17 16 15 14 37 12 36 11 10 9 8 32 7 31 6 30 5 29 4 28 3 27 2 26 ACEFLASH 33 B RESET_N STATLED ERRLED CFGADDR0 CFGADDR1 CFGADDR2 CLK SYSACE_CFCD2 SYSACE_CFD10 SYSACE_CFD09 SYSACE_CFD02 SYSACE_CFD08 SYSACE_CFD01 SYSACE_CFD00 SYSACE_CFA00 SYSACE_CFREG SYSACE_CFA01 SYSACE_CFA02 SYSACE_CFWAIT SYSACE_CFA03 SYSACE_CFA04 SYSACE_CFA05 SYSACE_CFA06 SYSACE_CFRDBSY SYSACE_CFA07 SYSACE_CFWE SYSACE_CFA08 SYSACE_CFA09 SYSACE_CFDE SYSACE_CFA10 SYSACE_CFCE2 SYSACE_CFCE1 SYSACE_CFD15 SYSACE_CFD07 SYSACE_CFD14 SYSACE_CFD06 SYSACE_CFD13 SYSACE_CFD05 SYSACE_CFD12 SYSACE_CFD04 SYSACE_CFD11 SYSACE_CFD03 SYSACE_CFCD1 R444 95 96 86 87 88 93 13 12 11 8 7 6 5 4 3 142 141 140 139 137 135 134 133 132 131 130 125 123 121 138 119 118 117 116 115 114 113 107 106 105 104 103 R445 SYSACE_STATLED SYSACE_ERRLED SYSACE_CFGA0 SYSACE_CFGA1 SYSACE_CFGA2 SYSACE_CLK CFCD2 CFD10 CFD09 CFD02 CFD08 CFD01 CFD00 CFA00 CFREG CFA01 CFA02 CFWAIT CFA03 CFA04 CFA05 CFA06 CFGRSVD CFA07 CFWE CFA08 CFA09 CFOE CFA10 CFCE2 CFCE1 CFD15 CFD07 CFD14 CFD06 CFD13 CFD05 CFD12 CFD04 CFD11 CFD03 CFCD1 1.00K 20 20 47 47 47 9 (DIE DOWN) VCC3V3 J22 1.00K CFGINIT CFGPROG CFGTCK CFGTDI CFGTDO CFGTMS TQFP144 POR_RESET POR_TEST POR_BYPASS 78 79 80 81 82 85 SYSTEMACE VCC3V3 72 74 108 FPGA_INIT FPGA_PROG_B FPGA_TCK FPGA_TDO FPGA_TDI FPGA_TMS 9,19,46 13 13 13 13 13 VCCH_128 VCCH_109 73_VCCH 92_VCCH 55_VCCH 37_VCCH VCCH_17 VCCH_1 MPBRDY MPIRQ MPCE MPA06 MPA05 MPA04 MPD15 MPD14 MPD13 MPD12 MPD11 MPD10 MPD09 MPD08 MPD07 MPD06 MPD05 MPD04 MPD03 MPD02 MPD01 MPD00 MPA03 MPA02 MPA01 MPA00 MPWE MPOE 128 109 73 92 55 37 17 1 39 41 42 43 44 45 47 48 49 50 51 52 53 56 58 59 60 61 62 63 65 66 67 68 69 70 76 77 VCCL_126 99_VCCL 94_VCCL 84_VCCL 57_VCCL VCCL_25 VCCL_15 VCCL_10 C SYSACE_MPBRDY SYSACE_MPIRQ SYSACE_MPCE SYSACE_MPA06 SYSACE_MPA05 SYSACE_MPA04 SYSACE_MPD15 SYSACE_MPD14 SYSACE_MPD13 SYSACE_MPD12 SYSACE_MPD11 SYSACE_MPD10 SYSACE_MPD09 SYSACE_MPD08 SYSACE_MPD07 SYSACE_MPD06 SYSACE_MPD05 SYSACE_MPD04 SYSACE_MPD03 SYSACE_MPD02 SYSACE_MPD01 SYSACE_MPD00 SYSACE_MPA03 SYSACE_MPA02 SYSACE_MPA01 SYSACE_MPA00 SYSACE_MPWE SYSACE_MPOE 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 126 99 94 84 57 25 15 10 U38 SCH P/N ART P/N FAB P/N SYSACE_CFGMODE 182 RED 0381171-02 0531311-02 1280333-02 Title: ML310 VIRTEX-II PRO PLAFTORM A 20 R392 A Date: 182 GREEN SYSTEM ACE AND COMPACT FLASH J14 DS23 SYSACE_STATLED 6-4-2004_13:02 Sheet Size: B Sheet 4 3 2 20 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 VCC2V5 1 VCC2V5 VCC2V5 DIMM184 10,11,12,21,23 12,22 D B 12,22 12,22 12,22 DDR_DQ01 DDR_DQS00 DDR_DQ02 12,22 DDR_DQ03 21 DDR_RST_N 12,22 12,22 12,22 DDR_DQ08 DDR_DQ09 DDR_DQS01 12 12 DDR_CK1 DDR_CK1_N 12,22 12,22 10,22 DDR_DQ10 DDR_DQ11 DDR_CKE0 12,22 12,22 12,22 DDR_DQ16 DDR_DQ17 DDR_DQS02 10,22 12,22 10,22 DDR_A09 DDR_DQ18 DDR_A07 12,22 10,22 12,22 DDR_DQ19 DDR_A05 DDR_DQ24 12,22 12,22 10,22 DDR_DQ25 DDR_DQS03 DDR_A04 12,22 12,22 10,22 DDR_DQ26 DDR_DQ27 DDR_A02 10,22 11,22 11,22 DDR_A01 DDR_CB0 DDR_CB1 11,22 10,22 11,22 DDR_DQS08 DDR_A00 DDR_CB2 11,22 10,22 11,22 DDR_CB3 DDR_BA1 DDR_DQ32 11,22 11,22 11,22 DDR_DQ33 DDR_DQS04 DDR_DQ34 10,22 11,22 11,22 DDR_BA0 DDR_DQ35 DDR_DQ40 10,22 11,22 10,22 DDR_WE_N DDR_DQ41 DDR_CAS_N 11,22 11,22 11,22 DDR_DQS05 DDR_DQ42 DDR_DQ43 11,22 11,22 DDR_DQ48 DDR_DQ49 11 11 A NC NC DDR_CK2_N DDR_CK2 11,22 11,22 11,22 DDR_DQS06 DDR_DQ50 DDR_DQ51 11,22 11,22 DDR_DQ56 DDR_DQ57 11,22 11,22 11,22 DDR_DQS07 DDR_DQ58 DDR_DQ59 DDR_SDA DDR_SCL 21 21 NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 1_VREF 2_DQ0 3_VSS 4_DQ1 5_DQS0 6_DQ2 7_VDD 8_DQ3 9_NC 10_RESET_N 11_VSS 12_DQ8 13_DQ9 14_DQS1 15_VDDQ 16_CK1 17_CK1_N 18_VSS 19_DQ10 20_DQ11 21_CKE0 22_VDDQ 23_DQ16 24_DQ17 25_DQS2 26_VSS 27_A9 28_DQ18 29_A7 30_VDDQ 31_DQ19 32_A5 33_DQ24 34_VSS 35_DQ25 36_DQS3 37_A4 38_VDD 39_DQ26 40_DQ27 41_A2 42_VSS 43_A1 44_CB0 45_CB1 46_VDD 47_DQS8 48_A0 49_CB2 50_VSS 51_CB3 52_BA1 53_DQ32 54_VDDQ 55_DQ33 56_DQS4 57_DQ34 58_VSS 59_BA0 60_DQ35 61_DQ40 62_VDDQ 63_WE_N 64_DQ41 65_CAS_N 66_VSS 67_DQS5 68_DQ42 69_DQ43 70_VDD 71_DNU 72_DQ48 73_DQ49 74_VSS 75_CK2_N 76_CK2 77_VDDQ 78_DQS6 79_DQ50 80_DQ51 81_VSS 82_NC 83_DQ56 84_DQ57 85_VDD 86_DQS7 87_DQ58 88_DQ59 89_VSS 90_WP 91_SDA 92_SCL DIMM 184 - SOCKET C VREF_DDR DDR_DQ00 R16 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 VSS_93 DQ4_94 DQ5_95 VDDQ_96 DQS9_97 DQ6_98 DQ7_99 VSS_100 NC_101 NC_102 NC_103 VDDQ_104 DQ12_105 DQ13_106 DQS10_107 VDD_108 DQ14_109 DQ15_110 CKE1_111 VDDQ_112 NC_113 DQ20_114 A12_115 VSS_116 DQ21_117 A11_118 DQS11_119 VDD_120 DQ22_121 A8_122 DQ23_123 VSS_124 A6_125 DQ28_126 DQ29_127 VDDQ_128 DQS12_129 A3_130 DQ30_131 VSS_132 DQ31_133 CB4_134 CB5_135 VDDQ_136 CK0_137 CK0_N_138 VSS_139 DQS17_140 A10_141 CB6_142 VDDQ_143 CB7_144 VSS_145 DQ36_146 DQ37_147 VDD_148 DQS13_149 DQ38_150 DQ39_151 VSS_152 DQ44_153 RAS_N_154 DQ45_155 VDDQ_156 S0_N_157 S1_N_158 DQS14_159 VSS_160 DQ46_161 DQ47_162 DNU_163 VDDQ_164 DQ52_165 DQ53_166 NC_167 VDD_168 DQS15_169 DQ54_170 DQ55_171 VDDQ_172 NC_173 DQ60_174 DQ61_175 VSS_176 DQS16_177 DQ62_178 DQ63_179 VDDQ_180 SA0_181 SA1_182 SA2_183 VDDSPD_184 DDR_DQ04 DDR_DQ05 12,22 12,22 DDR_DQM00 DDR_DQ06 DDR_DQ07 12,22 12,22 12,22 4.75K VCC3V3 D R21 DDR_SA2 21 NC NC NC NC 4.75K R20 DDR_DQ12 DDR_DQ13 DDR_DQM01 12,22 12,22 12,22 DDR_DQ14 DDR_DQ15 DDR_CKE1 12,22 12,22 10,22 DDR_DQ20 DDR_A12 12,22 10,22 DDR_DQ21 DDR_A11 DDR_DQM02 12,22 10,22 12,22 DDR_SA1 21 4.75K R19 DDR_SA0 21 4.75K I2C ADDR = 0xA8 R23 IIC_SCL 6,35,45 DDR_DQ22 DDR_A08 DDR_DQ23 12,22 10,22 12,22 DDR_A06 DDR_DQ28 DDR_DQ29 10,22 12,22 12,22 DDR_DQM03 DDR_A03 DDR_DQ30 12,22 10,22 12,22 DDR_DQ31 DDR_CB4 DDR_CB5 12,22 11,22 11,22 DDR_CK0 DDR_CK0_N 11 11 DDR_DQM08 DDR_A10 DDR_CB6 11,22 10,22 11,22 DDR_CB7 11,22 DDR_DQ36 DDR_DQ37 11,22 11,22 DDR_DQM04 DDR_DQ38 DDR_DQ39 11,22 11,22 11,22 DDR_DQ44 DDR_RAS_N DDR_DQ45 11,22 10,22 11,22 DDR_S0_N DDR_S1_N DDR_DQM05 10,22 10,22 11,22 DDR_DQ46 DDR_DQ47 11,22 11,22 DDR_DQ52 DDR_DQ53 11,22 11,22 DDR_DQM06 DDR_DQ54 DDR_DQ55 11,22 11,22 11,22 DDR_DQ60 DDR_DQ61 11,22 11,22 DDR_DQM07 DDR_DQ62 DDR_DQ63 11,22 11,22 11,22 DDR_SA0 DDR_SA1 DDR_SA2 21 21 21 3 21 DDR_SDA 21 R22 IIC_SDA 6,35,45 C 0 VREF_DDR 10,11,12,21,23 C138 0.1UF C139 0.01UF VCC2V5 B C151 0.1UF C150 0.1UF C148 0.1UF C143 0.1UF C147 0.1UF C144 0.1UF C145 0.1UF C146 0.1UF C140 0.1UF C149 0.1UF C142 0.1UF VCC2V5 NC C141 0.1UF NC NC SCH P/N ART P/N FAB P/N VCC3V3 Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM DDR DIMM CONNECTOR C152 0.1UF A Date: 1-5-2004_13:05 Sheet Size: B Sheet 4 DDR_SCL 0 VCC3V3 P7 DDR_RST_N 21 2 21 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 VTT_DDR VTT_DDR RP5 12,21 12,21 12,21 12,21 DDR_DQ00 DDR_DQ04 DDR_DQ05 DDR_DQ01 1 2 3 4 D 12,21 12,21 12,21 12,21 DDR_DQS00 DDR_DQM00 DDR_DQ02 DDR_DQ06 12,21 10,21 12,21 10,21 DDR_DQ23 DDR_A05 DDR_DQ24 DDR_A06 1 2 3 4 RP24 12,21 12,21 12,21 12,21 DDR_DQ28 DDR_DQ25 DDR_DQ29 DDR_DQS03 1 2 3 4 12,21 12,21 12,21 10,21,22 DDR_DQ14 DDR_DQ15 DDR_DQ10 DDR_CKE1 DDR_A04 DDR_DQM03 DDR_A03 DDR_DQ26 1 2 3 4 12,21 12,21 12,21 10,21 DDR_DQ30 DDR_DQ27 DDR_DQ31 DDR_A02 DDR_A10 DDR_CB2 DDR_CB6 DDR_CB3 DDR_CB7 DDR_BA1 DDR_DQ32 DDR_DQ36 DDR_DQ48 DDR_DQ49 DDR_DQ52 DDR_DQ53 11,21 11,21 11,21 11,21 DDR_DQ33 DDR_DQ37 DDR_DQS04 DDR_DQ34 47.5 C120 0.1UF C92 0.1UF C94 0.1UF C96 0.1UF C127 0.1UF C101 0.1UF C102 0.1UF C121 0.1UF C122 0.1UF C103 0.1UF C104 0.1UF C105 0.1UF C107 0.1UF C108 0.1UF C123 0.1UF C126 0.1UF C128 0.1UF C116 0.1UF C81 0.1UF C109 0.1UF C97 0.1UF C111 0.1UF C112 0.1UF C125 0.1UF C82 0.1UF C84 0.1UF C87 0.1UF C91 0.1UF C93 0.1UF C95 0.1UF C88 0.1UF C89 0.1UF C90 0.1UF C C98 0.1UF 8 7 6 5 VTT_DDR C117 0.1UF DDR_DQS06 DDR_DQM06 DDR_DQ54 DDR_DQ50 1 2 3 4 8 7 6 5 VTT_DDR 47.5 RP30 8 7 6 5 1 2 3 4 C86 0.1UF RP29 11,21 11,21 11,21 11,21 11,21 11,21 11,21 11,21 DDR_DQ55 DDR_DQ51 DDR_DQ60 DDR_DQ61 1 2 3 4 C119 0.1UF 8 7 6 5 B 47.5 RP22 8 7 6 5 C118 0.1UF VTT_DDR 8 7 6 5 1 2 3 4 47.5 RP13 1 2 3 4 C106 0.1UF 47.5 8 7 6 5 1 2 3 4 C83 0.1UF RP28 11,21 11,21 11,21 11,21 RP21 11,21 10,21 11,21 11,21 C114 0.1UF VTT_DDR 8 7 6 5 1 2 3 4 47.5 8 7 6 5 C113 0.1UF 47.5 8 7 6 5 1 2 3 4 47.5 DDR_A07 DDR_DQ22 DDR_A08 DDR_DQ19 DDR_DQ42 DDR_DQ43 DDR_DQ46 DDR_DQ47 RP20 10,21 11,21 11,21 11,21 RP12 10,21 12,21 10,21 12,21 11,21 11,21 11,21 11,21 47.5 8 7 6 5 1 2 3 4 8 7 6 5 1 2 3 4 47.5 B 1 2 3 4 RP19 DDR_CB1 DDR_DQS08 DDR_DQM08 DDR_A00 RP11 1 2 3 4 DDR_A11 DDR_A09 DDR_DQM02 DDR_DQ18 DDR_S0_N DDR_S1_N DDR_DQS05 DDR_DQM05 47.5 11,21 11,21 11,21 10,21 C100 0.1UF RP26 10,21 10,21 11,21 11,21 RP27 8 7 6 5 C110 0.1UF 47.5 8 7 6 5 1 2 3 4 C124 0.1UF VTT_DDR 8 7 6 5 47.5 47.5 10,21 10,21 12,21 12,21 1 2 3 4 RP18 1 2 3 4 DDR_A12 DDR_DQ17 DDR_DQS02 DDR_DQ21 DDR_WE_N DDR_DQ45 DDR_DQ41 DDR_CAS_N 47.5 DDR_CB4 DDR_CB5 DDR_A01 DDR_CB0 C99 0.1UF RP25 10,21 11,21 11,21 10,21 RP9 11,21 11,21 10,21 11,21 C115 0.1UF D 8 7 6 5 47.5 8 7 6 5 C85 0.1UF 47.5 8 7 6 5 1 2 3 4 RP10 10,21 12,21 12,21 12,21 1 2 3 4 RP17 8 7 6 5 1 2 3 4 DDR_DQ11 DDR_CKE0 DDR_DQ20 DDR_DQ16 DDR_DQ35 DDR_DQ40 DDR_DQ44 DDR_RAS_N 47.5 47.5 12,21 10,21,22 12,21 12,21 11,21 11,21 11,21 10,21 RP16 10,21 12,21 10,21 12,21 RP8 1 2 3 4 8 7 6 5 47.5 8 7 6 5 VTT_DDR 8 7 6 5 RP15 47.5 C 1 2 3 4 RP6 1 2 3 4 DDR_DQ12 DDR_DQS01 DDR_DQ13 DDR_DQM01 DDR_DQM04 DDR_DQ38 DDR_BA0 DDR_DQ39 47.5 RP7 12,21 12,21 12,21 12,21 11,21 11,21 10,21 11,21 47.5 8 7 6 5 1 RP23 8 7 6 5 47.5 1 2 3 4 DDR_DQ07 DDR_DQ03 DDR_DQ08 DDR_DQ09 VTT_DDR RP14 8 7 6 5 47.5 12,21 12,21 12,21 12,21 2 VTT_DDR RP31 8 7 6 5 11,21 11,21 11,21 11,21 DDR_DQ56 DDR_DQ57 DDR_DQM07 DDR_DQS07 1 2 3 4 47.5 8 7 6 5 C129 0.1UF C130 0.1UF 47.5 RP32 11,21 11,21 11,21 11,21 DDR_DQ62 DDR_DQ63 DDR_DQ58 DDR_DQ59 1 2 3 4 8 7 6 5 47.5 VTT_DDR R18 10,21,22 DDR_CKE0 1.00K NOSTUFF C73 C72 C71 C70 C75 C74 220UF 6.3V 220UF 6.3V 220UF 6.3V 220UF 6.3V 220UF 6.3V 220UF 6.3V SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A R17 10,21,22 DDR SSTL-2 TERMINATION DDR_CKE1 A 1.00K Date: NOSTUFF Sheet Size: B Sheet 4 1-5-2004_13:05 3 2 22 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 VCC3V3 VCC3V3 VCC2V5 R244 100 VCC2V5 C414 0.1UF TREG_VDD C413 0.1UF C58 23 23 100 D R284 D VCC3V3 TREG_AVCC C403 0.1UF C404 0.1UF C57 220UF 6.3V 220UF 6.3V VCC2V5 VCC3V3 VCC2V5 VTT_DDR U25 C 23 TREG_SD_N 23 VREF_DDR_R 1GND 2SD_L 3VSENSE 4VREF 1 VTT8 PVIN7 AVIN6 VDDQ5 TREG_VDD 23 L1 U26 2 1 2 3 4 5 6 7 8 TREG_VLOUT 3.3UH LP2996MR C69 C76 220UF 6.3V 220UF 6.3V C402 0.1UF NOSTUFF C420 0.1UF VDD_1 PVDD1 VL1 PGND1 PGND2 VL2 PVDD2 DGND AVCC VCCQ VREFOUT AGND SHDN VREFIN VFB VDD_2 16 15 14 13 12 11 10 9 TREG_AVCC 23 VREF_DDR_R 23 TREG_SHDN_N 23 TREG_VDD 23 C NC ML6554CU VCC2V5 NOTE: THE NATIONAL LP2996 REGULATOR IS AN ALTERNATE LINEAR REGULATOR SOLUTION FOR DDR TERMINATION. R294 R293 1.00K 0.1UF 100K EVALUTE ITS PERFORMANCE VERSUS THE ML6554. C411 0.1UF TREG_VFB C421 THIS CIRCUIT MAY BE OPTIONALLY POPULATED IN ORDER VCC2V5 R258 4.75K TREG_SHDN_N 23 SCH P/N ART P/N FAB P/N NOSTUFF 23 NOSTUFF TREG_SD_N R261 C419 0.01UF R286 NOSTUFF R285 4.75K C418 0.1UF 4.75K 10,11,12,21 0 VCC3V3 NOSTUFF VREF_DDR R257 VREF_DDR_R 4.75K VCC2V5 C412 0.1UF 4.75K R259 23 NOSTUFF R260 B 4.75K B Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A DDR TERMINATION SUPPLY A NOTE: THESE RESISTORS SHOULD BE STUFFED BASED Date: ON WHICH REGULATOR IS ACTIVE ON THE BOARD. Sheet Size: B Sheet 4 3 10-6-2003_14:59 2 23 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 VCC3V3 1 R133 VCC3V3 7,25,27,29,31 R177 7,25,27,29,31,33 25,26,28 PCI_S_FRAME_N 4.75K R183 7,25,27,29,31,33 7,25,27,29,31,33 7,25,27,29,31,33 1.00K R178 PCI_P_FRAME_N 4.75K D PCI_P_RST_N VCC3V3 R184 PCI_P_IRDY_N 25,26,28 PCI_S_IRDY_N 4.75K R192 R193 PCI_P_TRDY_N 25,26,28 4.75K R210 R211 25,26,28 25,26,28 PCI_S_RST_N 4.75K PCI_S_TRDY_N 4.75K PCI_P_STOP_N D R134 4.75K VCC3V3 PCI_S_STOP_N 4.75K R131 7,27,29,33 4.75K PCI_P_INTA_N 4.75K R204 7,25,27,29,31,33 R205 PCI_P_DEVSEL_N 25,26,28 PCI_S_DEVSEL_N 4.75K R110 7,27,29,33 4.75K PCI_P_INTB_N 4.75K R234 7,25,27,29,31 R235 PCI_P_PERR_N 25,26,28 PCI_S_PERR_N 4.75K R118 7,27,29,31,33 4.75K PCI_P_INTC_N 4.75K R238 7,25,27,29,31,33 R239 PCI_P_SERR_N 25,26,28 PCI_S_SERR_N 4.75K R112 7,27,29,33 4.75K PCI_P_INTD_N C C 4.75K R219 7,25,27,29 R220 PCI_P_LOCK_N 25,26,28 PCI_S_LOCK_N 4.75K VCC3V3 4.75K R119 VCC3V3 VCC3V3 7,26,28,33 PCI_S_INTA_N 4.75K R321 7,27 R346 PCI_P_GNT0_N 25,26 PCI_S_GNT0_N R111 4.75K 4.75K R323 R341 7,26,28,33 PCI_S_INTB_N 4.75K 7,29 PCI_P_GNT1_N 25,28 PCI_S_GNT1_N R132 4.75K 4.75K R317 R334 26,28 PCI_S_INTC_N 4.75K 7,31 PCI_P_GNT2_N 25 PCI_S_GNT2_N R113 4.75K 4.75K R319 R369 26,28 PCI_S_INTD_N 4.75K 7,33 PCI_P_GNT3_N B 25 PCI_S_GNT3_N 4.75K B 4.75K R391 7,25 PCI_P_GNT4_N 4.75K VCC3V3 VCC3V3 R316 7,27 R359 PCI_P_REQ0_N 25,26 PCI_S_REQ0_N 4.75K 4.75K R318 7,29 R357 PCI_P_REQ1_N 25,28 PCI_S_REQ1_N 4.75K 4.75K R322 7,31 R354 PCI_P_REQ2_N 25 4.75K 7,33,36 0381171-02 0531311-02 1280333-02 4.75K R233 A SCH P/N ART P/N FAB P/N PCI_S_REQ2_N R351 PCI_P_REQ3_N 25 4.75K Title: ML310 VIRTEX-II PRO PLAFTORM PCI_S_REQ3_N PCI BUS PULLUPS 4.75K A R370 7,25 Date: 6-4-2004_12:35 Ver: X.X Rev: X PCI_P_REQ4_N Sheet Size: B 4.75K Sheet 4 3 2 24 of Drawn By 52 XXX 1 4 3 2 PCI-PCI BRIDGE 1 VCC3V3 PCI2250_PGF D 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 PCI_P_GNT4_N 7,24 B 74P_GNT_N PCI_P_REQ4_N 7,24 75P_REQ_N PCI_P_CLK4 PCI_P_DEVSEL_N PCI_P_FRAME_N PCI_P_IRDY_N PCI_P_LOCK_N PCI_P_PAR PCI_P_PERR_N PCI_P_RST_N PCI_P_SERR_N PCI_P_STOP_N PCI_P_TRDY_N PCI_P_IDSEL 7 7,24,27,29,31,33 7,24,27,29,31,33 7,24,27,29,31,33 7,24,27,29 7,27,29,31,33 7,24,27,29,31 7,24,27,29,31 7,24,27,29,31,33 7,24,27,29,31,33 7,24,27,29,31,33 25 72P_CLK 110P_DEVSEL_N 106P_FRAME_N 107P_IRDY_N 112P_MFUNC 116P_PAR 114P_PERR_N 70P_RST_N 115P_SERR_N 111P_STOP_N 109P_TRDY_N 93P_IDSEL GND PCIBR_MS0 PCIBR_MS1 25 25 135P_C/BE0_N 117P_C/BE1_N 105P_C/BE2_N 91P_C/BE3_N NC VCC3V3 69GOZ_N 68NO/HSLED 132MS0 174MS1/BPCC SECONDARY PCI_P_CBE0_N PCI_P_CBE1_N PCI_P_CBE2_N PCI_P_CBE3_N PRIMARY C U32 147P_AD0 146P_AD1 144P_AD2 143P_AD3 141P_AD4 140P_AD5 138P_AD6 137P_AD7 128P_AD8 127P_AD9 125P_AD10 124P_AD11 123P_AD12 121P_AD13 120P_AD14 119P_AD15 103P_AD16 102P_AD17 101P_AD18 99P_AD19 98P_AD20 97P_AD21 95P_AD22 94P_AD23 86P_AD24 84P_AD25 83P_AD26 82P_AD27 80P_AD28 79P_AD29 78P_AD30 76P_AD31 PCI_P_AD00 PCI_P_AD01 PCI_P_AD02 PCI_P_AD03 PCI_P_AD04 PCI_P_AD05 PCI_P_AD06 PCI_P_AD07 PCI_P_AD08 PCI_P_AD09 PCI_P_AD10 PCI_P_AD11 PCI_P_AD12 PCI_P_AD13 PCI_P_AD14 PCI_P_AD15 PCI_P_AD16 PCI_P_AD17 PCI_P_AD18 PCI_P_AD19 PCI_P_AD20 PCI_P_AD21 PCI_P_AD22 PCI_P_AD23 PCI_P_AD24 PCI_P_AD25 PCI_P_AD26 PCI_P_AD27 PCI_P_AD28 PCI_P_AD29 PCI_P_AD30 PCI_P_AD31 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,25,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 7,27,29,31,33 S_AD0 S_AD1 S_AD2 S_AD3 S_AD4 S_AD5 S_AD6 S_AD7 S_AD8 S_AD9 S_AD10 S_AD11 S_AD12 S_AD13 S_AD14 S_AD15 S_AD16 S_AD17 S_AD18 S_AD19 S_AD20 S_AD21 S_AD22 S_AD23 S_AD24 S_AD25 S_AD26 S_AD27 S_AD28 S_AD29 S_AD30 S_AD31 148 150 151 152 154 155 156 158 160 162 163 164 166 167 169 170 16 18 19 20 22 23 24 26 28 30 31 33 34 35 37 38 PCI_S_AD00 PCI_S_AD01 PCI_S_AD02 PCI_S_AD03 PCI_S_AD04 PCI_S_AD05 PCI_S_AD06 PCI_S_AD07 PCI_S_AD08 PCI_S_AD09 PCI_S_AD10 PCI_S_AD11 PCI_S_AD12 PCI_S_AD13 PCI_S_AD14 PCI_S_AD15 PCI_S_AD16 PCI_S_AD17 PCI_S_AD18 PCI_S_AD19 PCI_S_AD20 PCI_S_AD21 PCI_S_AD22 PCI_S_AD23 PCI_S_AD24 PCI_S_AD25 PCI_S_AD26 PCI_S_AD27 PCI_S_AD28 PCI_S_AD29 PCI_S_AD30 PCI_S_AD31 S_C/BE0_N S_C/BE1_N S_C/BE2_N S_C/BE3_N 159 172 15 27 PCI_S_CBE0_N PCI_S_CBE1_N PCI_S_CBE2_N PCI_S_CBE3_N S_GNT0_N S_GNT1_N S_GNT2_N S_GNT3_N 49 50 51 53 PCI_S_GNT0_N PCI_S_GNT1_N PCI_S_GNT2_N PCI_S_GNT3_N S_REQO_N S_REQ1_N S_REQ2_N S_REQ3_N 39 40 42 47 PCI_S_REQ0_N PCI_S_REQ1_N PCI_S_REQ2_N PCI_S_REQ3_N 24,26 24,28 24 24 S_CLKOUT0 S_CLKOUT1 S_CLKOUT2 S_CLKOUT3 S_CLKOUT4 59 61 63 65 67 PCI_S_CLK0_R PCI_S_CLK1_R PCI_S_CLK2_R PCI_S_CLK3_R PCI_S_CLK4_R 25 25 25 25 25 S_CLK S_DEVSEL_N S_FRAME_N S_IRDY_N S_MFUNC S_PAR S_PERR_N S_RST_N S_SERR_N S_STOP_N S_TRDY_N 57 9 13 12 7 3 6 54 5 8 11 PCI_S_CLK4 PCI_S_DEVSEL_N PCI_S_FRAME_N PCI_S_IRDY_N PCI_S_LOCK_N PCI_S_PAR PCI_S_PERR_N PCI_S_RST_N PCI_S_SERR_N PCI_S_STOP_N PCI_S_TRDY_N 25 24,26,28 24,26,28 24,26,28 24,26,28 26,28 24,26,28 24,26,28 24,26,28 24,26,28 24,26,28 S_VCCP 58 C437 0.1UF 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 26,28 C439 0.1UF S_C/CFN_N C445 0.1UF C453 0.1UF C432 0.1UF C452 0.1UF C450 0.1UF C451 0.1UF VCC3V3 C449 0.1UF C448 0.1UF C444 0.1UF C441 0.1UF C438 0.1UF C436 0.1UF C427 0.1UF C428 0.1UF C430 0.1UF C429 0.1UF VCC3V3 R335 25 PCIBR_MS0 4.75K R365 25 PCIBR_MS1 4.75K C R377 25 26,28 26,28 26,28 26,28 PCIBR_CFN_N 0 24,26 24,28 24 24 R383 7,25,27,29,31,33 PCI_P_AD25 0 25 25 PCI_P_IDSEL R378 PCI_S_CLK0_R PCI_S_CLK0 26 PCI_S_CLK1 28 PCI_S_CLK4 25 24.9 25 R379 PCI_S_CLK1_R B 24.9 25 R380 PCI_S_CLK2_R NC 24.9 VCC5V PCIBR_CFN_N C431 0.1UF D 25 55 C442 0.1UF R381 PCI_S_CLK3_R NC 24.9 25 73P_VCCP 25 PCI2250 R363 PCI_S_CLK4_R 24.9 VCC3V3;10,17,25,32,44,52,62,66,81,88,100 VCC3V3;108,118,126,139,145,153,161,168,176 GND;1,14,21,29,36,45,56,60,64,71,77,89 GND;96,104,113,122,130,133,142,149,157,165,171 VCC5V SCH P/N ART P/N FAB P/N NC=2,4,41,43,46,48,85,87,90,92,129,131,134,136,173,175 0381171-02 0531311-02 1280333-02 C434 0.1UF Title: ML310 VIRTEX-II PRO PLAFTORM A PCI-PCI BRIDGE A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 25 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 P6 SLOT6_TCK 26 PB02 NC 7,24,28,33 24,28 26 PCI_S_INTB_N PCI_S_INTD_N SLOT6_PRS1_N 26 SLOT6_PRS2_N NC NC PCI_S_CLK0 25 INTB_N INTD_N PRS1_N RES1 PRS2_N PB14 RES3 PB18 PB20 PB21 CLK REQ_N 25,28 25,28 PCI_S_AD31 PCI_S_AD29 AD31 AD29 25,28 25,28 PCI_S_AD27 PCI_S_AD25 PB23 PB24 AD27 AD25 25,28 25,28 PCI_S_CBE3_N PCI_S_AD23 PB26 PB27 CBE3_N AD23 25,28 25,28 PCI_S_AD21 PCI_S_AD19 PB29 PB30 AD21 AD19 25,28 25,28 PCI_S_AD17 PCI_S_CBE2_N PB32 PB33 AD17 CBE2_N 24,25,28 PCI_S_IRDY_N PB35 IRDY_N PB37 DVSL_N 24,25,28 PCI_S_DEVSEL_N 24,25,28 24,25,28 PCI_S_LOCK_N PCI_S_PERR_N PB39 PB40 LOCK_N PERR_N 24,25,28 PCI_S_SERR_N PB42 SERR_N 25,28 25,28 PCI_S_CBE1_N PCI_S_AD14 PB44 PB45 CBE1_N AD14 25,28 25,28 PCI_S_AD12 PCI_S_AD10 PB47 PB48 AD12 AD10 25,28 25,28 PCI_S_AD08 PCI_S_AD07 PB52 PB53 25,28 25,28 PCI_S_AD05 PCI_S_AD03 PB55 PB56 AD05 AD03 25,28 PCI_S_AD01 PB58 AD01 SLOT6_ACK64_N 26 PB60 SLOT C PB07 PB08 PB09 PB10 PB11 PB16 PCI_S_REQ0_N 24,25 TDO PCI 32 - 5.0V D PB04 TRST_N PA01 SLOT6_TRST_N 26 TMS TDI PA03 PA04 SLOT6_TMS SLOT6_TDI 26 26 INTA_N INTC_N PA06 PA07 PCI_S_INTA_N PCI_S_INTC_N 7,24,28,33 24,28 RES0 PA09 NC RES2 PA11 NC 3.3VAUX RST_N PA14 PA15 NC GNT_N PA17 PME_N AD30 PA19 PA20 AD28 AD26 TCK AD08 AD07 ACK64_N VCC3V3 RP4 SLOT6_TMS SLOT6_TDI SLOT6_TCK SLOT6_TRST_N 26 26 26 26 1 2 3 4 8 7 6 5 D 4.75K PCI_S_RST_N 24,25,28 PCI_S_GNT0_N NC 24,25 PCI_S_AD30 25,28 PA22 PA23 PCI_S_AD28 PCI_S_AD26 25,28 25,28 AD24 IDSEL PA25 PA26 PCI_S_AD24 SLOT6_IDSEL 25,28 26 AD22 AD20 PA28 PA29 PCI_S_AD22 PCI_S_AD20 25,28 25,28 AD18 AD16 PA31 PA32 PCI_S_AD18 PCI_S_AD16 25,26,28 25,28 FRAM_N PA34 PCI_S_FRAME_N 24,25,28 TRDY_N PA36 PCI_S_TRDY_N 24,25,28 STOP_N PA38 PCI_S_STOP_N RES4 RES5 PA40 PA41 PAR AD15 PA43 PA44 PCI_S_PAR PCI_S_AD15 25,28 25,28 AD13 AD11 PA46 PA47 PCI_S_AD13 PCI_S_AD11 25,28 25,28 AD09 PA49 PCI_S_AD09 25,28 CBE0_N PA52 AD06 AD04 PA54 PA55 PCI_S_AD06 PCI_S_AD04 25,28 25,28 AD02 AD00 PA57 PA58 PCI_S_AD02 PCI_S_AD00 25,28 25,28 REQ64_N VCC3V3 R10 4.75K R14 SLOT6_ACK64_N 26 4.75K C 26 SLOT6_PRS2_N 26 SLOT6_PRS1_N 24,25,28 NC NC PCI_S_CBE0_N SLOT6_REQ64_N PA60 SLOT6_REQ64_N 26 C21 0.1UF C27 0.1UF 25,28 R6 25,26,28 PCI_S_AD18 0 SLOT6_IDSEL 26 26 B B VCC12V_P;PA02 VCC12V_N;PB01 VCC5V;PA05,PB05,PB06,PA08 VCC5V;PA61,PB61,PA62,PB62 VCC3V3;PA21,PB25,PA27,PB31,PA33,PB36 VCC3V3;PA39,PB41,PB43,PA45,PA53,PB54 VCCIO VCC5V;PA10,PA16,PB19,PB59,PA59 GND;PB03,PB15,PB17,PA18,PB22,PA24 GND;PB28,PA30,PB34,PA35,PA37,PB38 GND;PA42,PB46,PA48,PB49,PA56,PB57 GND;PB12,PA12,PB13,PA13 VCC12V_P VCC12V_N VCC5V VCC3V3 SCH P/N ART P/N FAB P/N C32 22UF 25V A C14 0.1UF C10 0.1UF C80 C134 0.1UF C40 0.1UF 100UF 10V C63 C68 0.1UF C56 0.1UF C50 0.1UF 0381171-02 0531311-02 1280333-02 C44 0.1UF 220UF 6.3V Title: ML310 VIRTEX-II PRO PLAFTORM PCI SLOT 6, 5.0V, SECONDARY BUS A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 26 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 P5 SLOT5_TCK 27 PB02 NC D 7,24,29,33 7,24,29,33 27 PCI_P_INTB_N PCI_P_INTD_N SLOT5_PRS1_N 27 SLOT5_PRS2_N NC PB04 TRST_N PA01 SLOT5_TRST_N 27 TMS TDI PA03 PA04 SLOT5_TMS SLOT5_TDI 27 27 INTA_N INTC_N PA06 PA07 PCI_P_INTA_N PCI_P_INTC_N 7,24,29,33 7,24,29,31,33 RES0 PA09 NC RES2 PA11 NC 3.3VAUX RST_N PA14 PA15 NC GNT_N PA17 PME_N AD30 PA19 PA20 AD28 AD26 TCK TDO PB07 PB08 PB09 PB10 PB11 INTB_N INTD_N PRS1_N RES1 PRS2_N PB14 RES3 VCC3V3 RP3 SLOT5_TMS SLOT5_TDI SLOT5_TCK SLOT5_TRST_N 27 27 27 27 1 2 3 4 8 7 6 5 D 4.75K NC PCI_P_REQ0_N 7,24 PB18 PB20 PB21 CLK REQ_N 7,25,29,31,33 7,25,29,31,33 PCI_P_AD31 PCI_P_AD29 7,25,29,31,33 7,25,29,31,33 PCI_P_AD27 PCI_P_AD25 PB23 PB24 AD27 AD25 7,25,29,31,33 7,25,29,31,33 PCI_P_CBE3_N PCI_P_AD23 PB26 PB27 CBE3_N AD23 AD31 AD29 PB29 PB30 AD21 AD19 7,25,29,31,33 7,25,29,31,33 PCI_P_AD17 PCI_P_CBE2_N PB32 PB33 AD17 CBE2_N 7,24,25,29,31,33 PCI_P_IRDY_N PB35 IRDY_N PB37 DVSL_N PCI_P_DEVSEL_N 7,24,25,29,31,33 7,24,25,29 7,24,25,29,31 PCI_P_LOCK_N PCI_P_PERR_N PB39 PB40 LOCK_N PERR_N 7,24,25,29,31,33 PCI_P_SERR_N PB42 SERR_N 7,25,29,31,33 7,25,29,31,33 PCI_P_CBE1_N PCI_P_AD14 PB44 PB45 CBE1_N AD14 7,25,29,31,33 7,25,29,31,33 PCI_P_AD12 PCI_P_AD10 PB47 PB48 AD12 AD10 7,25,29,31,33 7,25,29,31,33 PCI_P_AD08 PCI_P_AD07 PB52 PB53 7,25,29,31,33 7,25,29,31,33 PCI_P_AD05 PCI_P_AD03 PB55 PB56 AD05 AD03 7,25,29,31,33 PCI_P_AD01 PB58 AD01 SLOT5_ACK64_N 27 PB60 SLOT PCI_P_AD21 PCI_P_AD19 7,25,27,29,31,33 7,25,29,31,33 C PB16 PCI 32 - 3.3V PCI_P_CLK0 7 AD08 AD07 ACK64_N PCI_P_RST_N 7,24,25,29,31 PCI_P_GNT0_N NC 7,24 PCI_P_AD30 7,25,29,31,33 PA22 PA23 PCI_P_AD28 PCI_P_AD26 7,25,29,31,33 7,25,29,31,33 AD24 IDSEL PA25 PA26 PCI_P_AD24 SLOT5_IDSEL 7,25,29,31,33 27 AD22 AD20 PA28 PA29 PCI_P_AD22 PCI_P_AD20 7,25,29,31,33 7,25,29,31,33 AD18 AD16 PA31 PA32 PCI_P_AD18 PCI_P_AD16 7,25,29,31,33 7,25,29,31,33 FRAM_N PA34 PCI_P_FRAME_N 7,24,25,29,31,33 TRDY_N PA36 PCI_P_TRDY_N 7,24,25,29,31,33 STOP_N PA38 PCI_P_STOP_N RES4 RES5 PA40 PA41 PAR AD15 PA43 PA44 PCI_P_PAR PCI_P_AD15 7,25,29,31,33 7,25,29,31,33 AD13 AD11 PA46 PA47 PCI_P_AD13 PCI_P_AD11 7,25,29,31,33 7,25,29,31,33 AD09 PA49 PCI_P_AD09 7,25,29,31,33 CBE0_N PA52 AD06 AD04 PA54 PA55 PCI_P_AD06 PCI_P_AD04 7,25,29,31,33 7,25,29,31,33 AD02 AD00 PA57 PA58 PCI_P_AD02 PCI_P_AD00 7,25,29,31,33 7,25,29,31,33 REQ64_N VCC3V3 R9 4.75K R13 SLOT5_ACK64_N 27 4.75K C 27 SLOT5_PRS2_N 27 SLOT5_PRS1_N 7,24,25,29,31,33 NC NC PCI_P_CBE0_N SLOT5_REQ64_N PA60 SLOT5_REQ64_N 27 C20 0.1UF C26 0.1UF 7,25,29,31,33 R5 7,25,27,29,31,33 PCI_P_AD21 0 SLOT5_IDSEL 27 27 B B VCC12V_P;PA02 VCC12V_N;PB01 VCC5V;PA05,PB05,PB06,PA08 VCC5V;PA61,PB61,PA62,PB62 VCC3V3;PA21,PB25,PA27,PB31,PA33,PB36 VCC3V3;PA39,PB41,PB43,PA45,PA53,PB54 VCCIO VCC3V3;PA10,PA16,PB19,PB59,PA59 GND;PB03,PB15,PB17,PA18,PB22,PA24 GND;PB28,PA30,PB34,PA35,PA37,PB38 GND;PA42,PB46,PA48,PB49,PA56,PB57 GND;PB50,PA50,PB51,PA51 VCC12V_P VCC12V_N VCC5V VCC3V3 SCH P/N ART P/N FAB P/N C31 22UF 25V A C13 0.1UF C9 0.1UF C79 C133 0.1UF C39 0.1UF 100UF 10V C62 C55 0.1UF C67 0.1UF C43 0.1UF 0381171-02 0531311-02 1280333-02 C49 0.1UF 220UF 6.3V Title: ML310 VIRTEX-II PRO PLAFTORM PCI SLOT 5, 3.3V, PRIMARY BUS A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 27 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 P4 SLOT4_TCK 28 PB02 NC 24,26 7,24,26,33 28 PCI_S_INTC_N PCI_S_INTA_N SLOT4_PRS1_N 28 SLOT4_PRS2_N NC NC PCI_S_CLK1 25 INTB_N INTD_N PRS1_N RES1 PRS2_N PB14 RES3 PB18 PB20 PB21 CLK REQ_N PCI_S_AD31 PCI_S_AD29 25,26 25,26 PCI_S_AD27 PCI_S_AD25 PB23 PB24 AD27 AD25 25,26 25,26 PCI_S_CBE3_N PCI_S_AD23 PB26 PB27 CBE3_N AD23 AD31 AD29 PCI_S_AD21 PCI_S_AD19 PB29 PB30 AD21 AD19 25,26 25,26 PCI_S_AD17 PCI_S_CBE2_N PB32 PB33 AD17 CBE2_N 24,25,26 PCI_S_IRDY_N PB35 IRDY_N PB37 DVSL_N 24,25,26 PCI_S_DEVSEL_N 24,25,26 24,25,26 PCI_S_LOCK_N PCI_S_PERR_N PB39 PB40 LOCK_N PERR_N 24,25,26 PCI_S_SERR_N PB42 SERR_N 25,26 25,26 PCI_S_CBE1_N PCI_S_AD14 PB44 PB45 CBE1_N AD14 25,26 25,26 PCI_S_AD12 PCI_S_AD10 PB47 PB48 AD12 AD10 PB52 PB53 25,26 25,26 PCI_S_AD08 PCI_S_AD07 25,26 25,26 PCI_S_AD05 PCI_S_AD03 PB55 PB56 AD05 AD03 25,26 PCI_S_AD01 PB58 AD01 SLOT4_ACK64_N 28 PB60 PA01 SLOT4_TRST_N 28 TMS TDI PA03 PA04 SLOT4_TMS SLOT4_TDI 28 28 INTA_N INTC_N PA06 PA07 PCI_S_INTB_N PCI_S_INTD_N 7,24,26,33 24,26 RES0 PA09 NC RES2 PA11 NC 3.3VAUX RST_N PA14 PA15 NC GNT_N PA17 PME_N AD30 PA19 PA20 AD28 AD26 VCC3V3 RP2 SLOT4_TMS SLOT4_TDI SLOT4_TCK SLOT4_TRST_N 28 28 28 28 1 2 3 4 8 7 6 5 D 4.75K SLOT 25,26 25,26 25,26 25,26,28 C PB07 PB08 PB09 PB10 PB11 PB16 PCI_S_REQ1_N 24,25 TDO PCI 32 - 5.0V D PB04 TRST_N TCK AD08 AD07 ACK64_N PCI_S_RST_N 24,25,26 PCI_S_GNT1_N NC 24,25 PCI_S_AD30 25,26 PA22 PA23 PCI_S_AD28 PCI_S_AD26 25,26 25,26 AD24 IDSEL PA25 PA26 PCI_S_AD24 SLOT4_IDSEL 25,26 28 AD22 AD20 PA28 PA29 PCI_S_AD22 PCI_S_AD20 25,26 25,26 AD18 AD16 PA31 PA32 PCI_S_AD18 PCI_S_AD16 25,26 25,26 FRAM_N PA34 PCI_S_FRAME_N 24,25,26 TRDY_N PA36 PCI_S_TRDY_N 24,25,26 STOP_N PA38 PCI_S_STOP_N RES4 RES5 PA40 PA41 PAR AD15 PA43 PA44 PCI_S_PAR PCI_S_AD15 25,26 25,26 AD13 AD11 PA46 PA47 PCI_S_AD13 PCI_S_AD11 25,26 25,26 AD09 PA49 PCI_S_AD09 25,26 CBE0_N PA52 AD06 AD04 PA54 PA55 PCI_S_AD06 PCI_S_AD04 25,26 25,26 AD02 AD00 PA57 PA58 PCI_S_AD02 PCI_S_AD00 25,26 25,26 REQ64_N VCC3V3 R8 4.75K R12 SLOT4_ACK64_N 28 4.75K C 28 SLOT4_PRS2_N 28 SLOT4_PRS1_N 24,25,26 NC NC PCI_S_CBE0_N SLOT4_REQ64_N PA60 SLOT4_REQ64_N 28 C19 0.1UF C25 0.1UF 25,26 R4 25,26,28 PCI_S_AD19 0 SLOT4_IDSEL 28 28 B B VCC12V_P;PA02 VCC12V_N;PB01 VCC5V;PA05,PB05,PB06,PA08 VCC5V;PA61,PB61,PA62,PB62 VCC3V3;PA21,PB25,PA27,PB31,PA33,PB36 VCC3V3;PA39,PB41,PB43,PA45,PA53,PB54 VCCIO VCC5V;PA10,PA16,PB19,PB59,PA59 GND;PB03,PB15,PB17,PA18,PB22,PA24 GND;PB28,PA30,PB34,PA35,PA37,PB38 GND;PA42,PB46,PA48,PB49,PA56,PB57 GND;PB12,PA12,PB13,PA13 VCC12V_P VCC12V_N VCC5V VCC3V3 SCH P/N ART P/N FAB P/N C30 22UF 25V A C12 0.1UF C8 0.1UF C78 C38 0.1UF C132 0.1UF 100UF 10V C61 C54 0.1UF C66 0.1UF C48 0.1UF 0381171-02 0531311-02 1280333-02 C42 0.1UF 220UF 6.3V Title: ML310 VIRTEX-II PRO PLAFTORM PCI SLOT 4, 5.0V, SECONDARY BUS A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 28 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 P3 SLOT3_TCK 29 PB02 NC D 7,24,27,31,33 7,24,27,33 29 PCI_P_INTC_N PCI_P_INTA_N SLOT3_PRS1_N 29 SLOT3_PRS2_N NC PB04 TRST_N PA01 SLOT3_TRST_N 29 TMS TDI PA03 PA04 SLOT3_TMS SLOT3_TDI 29 29 INTA_N INTC_N PA06 PA07 PCI_P_INTB_N PCI_P_INTD_N 7,24,27,33 7,24,27,33 RES0 PA09 NC RES2 PA11 NC 3.3VAUX RST_N PA14 PA15 NC GNT_N PA17 PME_N AD30 PA19 PA20 AD28 AD26 TCK TDO PB07 PB08 PB09 PB10 PB11 INTB_N INTD_N PRS1_N RES1 PRS2_N PB14 RES3 VCC3V3 RP1 SLOT3_TMS SLOT3_TDI SLOT3_TCK SLOT3_TRST_N 29 29 29 29 1 2 3 4 8 7 6 5 D 4.75K NC PCI_P_REQ1_N 7,24 PB18 PB20 PB21 CLK REQ_N 7,25,27,31,33 7,25,27,31,33 PCI_P_AD31 PCI_P_AD29 AD31 AD29 7,25,27,31,33 7,25,27,31,33 PCI_P_AD27 PCI_P_AD25 PB23 PB24 AD27 AD25 7,25,27,31,33 7,25,27,31,33 PCI_P_CBE3_N PCI_P_AD23 PB26 PB27 CBE3_N AD23 7,25,27,31,33 7,25,27,31,33 PCI_P_AD21 PCI_P_AD19 PB29 PB30 AD21 AD19 7,25,27,31,33 7,25,27,31,33 PCI_P_AD17 PCI_P_CBE2_N PB32 PB33 AD17 CBE2_N 7,24,25,27,31,33 PCI_P_IRDY_N PB35 IRDY_N PB37 DVSL_N PCI_P_DEVSEL_N 7,24,25,27,31,33 7,24,25,27 7,24,25,27,31 PCI_P_LOCK_N PCI_P_PERR_N PB39 PB40 LOCK_N PERR_N 7,24,25,27,31,33 PCI_P_SERR_N PB42 SERR_N 7,25,27,31,33 7,25,27,31,33 PCI_P_CBE1_N PCI_P_AD14 PB44 PB45 CBE1_N AD14 7,25,27,31,33 7,25,27,31,33 PCI_P_AD12 PCI_P_AD10 PB47 PB48 AD12 AD10 7,25,27,31,33 7,25,27,31,33 PCI_P_AD08 PCI_P_AD07 PB52 PB53 7,25,27,31,33 7,25,27,31,33 PCI_P_AD05 PCI_P_AD03 PB55 PB56 AD05 AD03 7,25,27,31,33 PCI_P_AD01 PB58 AD01 SLOT3_ACK64_N 29 PB60 SLOT C PB16 PCI 32 - 3.3V PCI_P_CLK1 7 AD08 AD07 ACK64_N PCI_P_RST_N 7,24,25,27,31 PCI_P_GNT1_N NC 7,24 PCI_P_AD30 7,25,27,31,33 PA22 PA23 PCI_P_AD28 PCI_P_AD26 7,25,27,31,33 7,25,27,31,33 AD24 IDSEL PA25 PA26 PCI_P_AD24 SLOT3_IDSEL 7,25,27,31,33 29 AD22 AD20 PA28 PA29 PCI_P_AD22 PCI_P_AD20 7,25,27,29,31,33 7,25,27,31,33 AD18 AD16 PA31 PA32 PCI_P_AD18 PCI_P_AD16 7,25,27,31,33 7,25,27,31,33 FRAM_N PA34 PCI_P_FRAME_N 7,24,25,27,31,33 TRDY_N PA36 PCI_P_TRDY_N 7,24,25,27,31,33 STOP_N PA38 PCI_P_STOP_N RES4 RES5 PA40 PA41 PAR AD15 PA43 PA44 PCI_P_PAR PCI_P_AD15 7,25,27,31,33 7,25,27,31,33 AD13 AD11 PA46 PA47 PCI_P_AD13 PCI_P_AD11 7,25,27,31,33 7,25,27,31,33 AD09 PA49 PCI_P_AD09 7,25,27,31,33 CBE0_N PA52 AD06 AD04 PA54 PA55 PCI_P_AD06 PCI_P_AD04 7,25,27,31,33 7,25,27,31,33 AD02 AD00 PA57 PA58 PCI_P_AD02 PCI_P_AD00 7,25,27,31,33 7,25,27,31,33 REQ64_N VCC3V3 R7 4.75K R11 SLOT3_ACK64_N 29 4.75K C 29 SLOT3_PRS2_N 29 SLOT3_PRS1_N 7,24,25,27,31,33 NC NC PCI_P_CBE0_N SLOT3_REQ64_N PA60 SLOT3_REQ64_N 29 C18 0.1UF C24 0.1UF 7,25,27,31,33 R3 7,25,27,29,31,33 PCI_P_AD22 0 SLOT3_IDSEL 29 29 B B VCC12V_P;PA02 VCC12V_N;PB01 VCC5V;PA05,PB05,PB06,PA08 VCC5V;PA61,PB61,PA62,PB62 VCC3V3;PA21,PB25,PA27,PB31,PA33,PB36 VCC3V3;PA39,PB41,PB43,PA45,PA53,PB54 VCCIO VCC3V3;PA10,PA16,PB19,PB59,PA59 GND;PB03,PB15,PB17,PA18,PB22,PA24 GND;PB28,PA30,PB34,PA35,PA37,PB38 GND;PA42,PB46,PA48,PB49,PA56,PB57 GND;PB50,PA50,PB51,PA51 VCC12V_P VCC12V_N VCC5V VCC3V3 SCH P/N ART P/N FAB P/N C29 22UF 25V A C11 0.1UF C7 0.1UF C77 C37 0.1UF C131 0.1UF 100UF 10V C60 C53 0.1UF C65 0.1UF C41 0.1UF 0381171-02 0531311-02 1280333-02 C47 0.1UF 220UF 6.3V Title: ML310 VIRTEX-II PRO PLAFTORM PCI SLOT 3, 3.3V, PRIMARY BUS A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 29 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 D D C C THIS PAGE IS BLANK B B SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A <<BLANK>> A Date: 1-5-2004_13:05 Sheet Size: B Sheet 4 3 2 30 of Ver: X.X Rev: X Drawn By 52 XXX 1 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,31,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 U11 N7AD0 M7AD1 P6AD2 P5AD3 N5AD4 M5AD5 P4AD6 N4AD7 P3AD8 N3AD9 N2AD10 M1AD11 M2AD12 M3AD13 L1AD14 L2AD15 K1AD16 E3AD17 D1AD18 D2AD19 D3AD20 C1AD21 B1AD22 B2AD23 B4AD24 A5AD25 B5AD26 B6AD27 C6AD28 C7AD29 A8AD30 B8AD31 ETH_IDSEL A4IDSEL PCI_P_CBE0_N PCI_P_CBE1_N PCI_P_CBE2_N PCI_P_CBE3_N 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 7,25,27,29,33 M4C/BE0_N L3C/BE1_N F3C/BE2_N C4C/BE3_N PCI_P_REQ2_N PCI_P_GNT2_N PCI_P_CLK2 C3REQ_N J3GNT_N G1CLK 7,24,25,27,29,33 7,24,25,27,29,33 7,24,25,27,29,33 7,24,25,27,29,33 7,24,25,27,29,33 7,25,27,29,33 PCI_P_FRAME_N PCI_P_IRDY_N PCI_P_TRDY_N PCI_P_DEVSEL_N PCI_P_STOP_N PCI_P_PAR F2FRAME_N F1IRDY_N G3TRDY_N H3DEVSEL_N H1STOP_N J1PAR 7,24,27,29,33 7,24,25,27,29 7,24,25,27,29,33 7,24,25,27,29 PCI_P_INTC_N PCI_P_PERR_N PCI_P_SERR_N PCI_P_RST_N H2INTA_N J2PERR_N A2SERR_N C2RST_N 31 31 31 ETH_ISOLATE_N ETH_ALTRST_N ETH_PME_N B9ISOLATE_N A9ALTRST_N A6PME_N 31 31 31 ETH_SMBALRT_N ETH_SMBCLK ETH_SMBD B10SMBALRT_N A10SMBCLK C9SMBD 7,24 7,24 7 B 31 ETH_CLKRUN_N 31 PHY_VIO NC X1 N11 X2 P11 TDP C13 ETH_TDP 32 VCC3V3 C14 ETH_TDN RDP E13 ETH_RDP 32 RDN E14 ETH_RDN 32 P7 ETH_EECS 32 4 32 FLD7 FLD6 FLD5 FLD4 FLD3 FLD2 FLD1 FLD0 J14 H12 H13 H14 G12 F12 F13 F14 NC NC NC NC NC NC NC NC CFCS# CFCLK FLCS#/AEN L7 L8 N9 NC NC NC FLOE# FLWE# M8 M9 NC NC TEXEC TCK TI TO D13 D14 D12 B12 NC NC NC NC VREF C12 NC TEST A13 RBIAS10 B14 NC ETH_EESK ETH_EEDO ETH_EEDI D C384 0.1UF OSC 31 R206 ETH_CLK ETH_CLK_R 3 OUT GND 2 SG-636PCE 25.0000MHZ 32 32 32 R152 VCC5V 31 ETH_TEST 4.75K R144 31 ETH_RBIAS10 549 R148 PHY_VIO 31 31 ETH_RBIAS100 C392 0.1UF 619 C VCC3V3 R156 31 ETH_RBIAS10 R179 4.75K NC NC NC NC NC NC NC NC NC NC NC NC NC ETH_TEST X5 1 OE VCC 24.9 P9 M10 N10 P10 M11 M12 N13 P13 N14 M13 M14 L12 L13 L14 K14 J12 J13 G2VIO 31 1 NC FLA16/CLK25 FLA15/EESK FLA14/EEDO FLA13/EEDI FLA12/MCNTSM_N FLA11/MINT FLA10/MRING_N FLA9/MRST FLA8/IOCHRDY FLA7/CLKEN FLA6 FLA5 FLA4 FLA3 FLA2 FLA1 FLA0 C5CSTSCHG/WOL C8CLKRUN_N ETH_CLK TDN EECS FAST ETHERNET 31 C PCI_P_AD00 PCI_P_AD01 PCI_P_AD02 PCI_P_AD03 PCI_P_AD04 PCI_P_AD05 PCI_P_AD06 PCI_P_AD07 PCI_P_AD08 PCI_P_AD09 PCI_P_AD10 PCI_P_AD11 PCI_P_AD12 PCI_P_AD13 PCI_P_AD14 PCI_P_AD15 PCI_P_AD16 PCI_P_AD17 PCI_P_AD18 PCI_P_AD19 PCI_P_AD20 PCI_P_AD21 PCI_P_AD22 PCI_P_AD23 PCI_P_AD24 PCI_P_AD25 PCI_P_AD26 PCI_P_AD27 PCI_P_AD28 PCI_P_AD29 PCI_P_AD30 PCI_P_AD31 2 4.75K D 3 R199 4 ETH_ISOLATE_N 4.75K R151 31 ETH_ALTRST_N 4.75K R166 31 ETH_PME_N 4.75K R147 31 ETH_SMBALRT_N 31 4.75K R143 31 31 RBIAS100 B13 ETH_RBIAS100 31 LILED ACTLED SPEEDLED A12 C11 B11 ETH_LILED ETH_ACTLED ETH_SPDLED 32 32 32 ETH_SMBCLK B 4.75K R165 31 ETH_SMBD 4.75K 82559 R157 VCC3V3;A3,A7,E1,K3,N6,P2 VCC3V3;G13,K13,N8,P12 VCC3V3;K4,K5,K6,K7,K8,K9,K10,K11,L4,L5,L9,L10 VCC3V3;A11 VCC3V3;E12,G5,G6,H5,H6,H7,H8,J5,J6,J7,J8,J9,J10,J11, 31 ETH_CLKRUN_N 4.75K R198 GND;F4,F5,F6,F7,F8,F9,F10,F11,G7,G8,G9,G10,G11,H9,H10,H11,L6,L11 GND;D4,D5,D6,D7,D8,D11,E4,E5,E6,E7,E8,E9,E10,E11 GND;C10 GND;B3,B7,E2,K2,M6,N1 GND;G14,K12,N12,P8 7,25,27,29,31,33 PCI_P_AD23 0 31 ETH_IDSEL NC=A1,A14,D9,D10,G4,H4,P1,P14 SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A PCI ETHERNET MAC/PHY A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 31 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 VCC3V3 D C341 0.1UF 2 1 VCC3V3 C342 0.1UF C343 0.1UF C344 0.1UF C345 0.1UF C348 0.1UF C351 0.1UF C357 0.1UF VCC3V3 C373 0.1UF C363 0.1UF C361 0.1UF C352 0.1UF C349 0.1UF D C346 0.1UF VCC3V3 31 31 31 31 VCC3V3 ETH_EECS ETH_EESK ETH_EEDI ETH_EEDO U16 1CS 2SK 3DI 4DO VCC8 DC7 NC6 GND5 VCC3V3 C386 0.1UF NC NC AT93C46A C347 0.1UF C353 0.1UF C354 0.1UF C356 0.1UF C355 0.1UF C358 0.1UF C364 0.1UF C350 0.1UF C362 0.1UF C365 0.1UF C377 0.1UF C376 0.1UF C375 0.1UF C374 0.1UF VCC3V3 182 C R108 C J3 31 ETH_SPDLED 31 ETH_ACTLED E8LED1+ E7LED1- R109 182 31 ETH_LILED 31 ETH_TDP YLW E10LED2+ E9LED2- GRN ORG R101 ETH_TDN 31 ETH_RDP 31 ETH_TDP E2TX+ ETH_TCT E1TCT ETH_TDN E3TX- ETH_RDP E4RX+ ETH_RCT E6RCT ETH_RDN E5RX- TRANSMIT B R102 B 100 31 100 1:1 MAGNETICS RECEIVE ETH_RDN C328 8.2PF G1GND1 G2GND2 G3GND3 G4GND4 G5GND5 G6GND6 G7GND7 G8GND8 C329 0.1UF ASSY_RJ45_USB OPTION SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A PCI ETHERNET INTERFACE, PROM A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 32 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 33 M1535D+ NC NC 7,24,25,27,29,31 7,24,25,27,29,31 7,24,25,27,29,31 7,24,25,27,29,31 7,24,25,27,29,31 7,24,25,27,29,31 7,25,27,29,31 7,24 7,24,36 B 7,24,27,29 7,24,27,29 7,24,27,29,31 7,24,27,29 7,24,26,28 7,24,26,28 PCI_P_FRAME_N PCI_P_TRDY_N PCI_P_IRDY_N PCI_P_STOP_N PCI_P_DEVSEL_N PCI_P_SERR_N PCI_P_PAR B11 E8 PCI_REQJ PCICLK B10 C5 PCI_STPJ PCIRSTJ A3 C4 D4 A4 B4 D5 B5 PCI_P_GNT3_N PCI_P_REQ3_N PCI_P_INTA_N PCI_P_INTB_N PCI_P_INTC_N PCI_P_INTD_N PCI_S_INTA_N PCI_S_INTB_N A10 C11 F4 F5 G3 G4 G5 H4 VCC3V3 F6 F7 F14 P6 X4 PWG 33 OSC14M D10 OSC14_CLK 33 CLK32KO V13 CLK32KO 36 USBCLK H5 USB_CLK 33 INIT CPURST IGNNEJ INTR NMI A20MJ C14 B13 C13 B12 C12 A14 SBR_INTR SBR_NMI 7,33 7,33 FERRJ A12 UNUSED_PU33V_4 37 NC NC NC R116 U10 33 10.0M PWG 3 1 NC NC 2 MC-156 32.768KHZ OSC32K_I C339 12PF C340 12PF R117 33 33 D 10.0M CBEJ0_N CBEJ1_N CBEJ2_N CBEJ3_N OSC32K_I OSC32K_II NC VCC3V3 4 X2 OE VCC R106 1 4.75K 1 C336 0.1UF OSC PCI INTERFACE UNUSED_PU33V_1 PCI_P_CLK3 B7 A5 B3 D2 SOUTH BRIDGE 1/5 37 7 PCI_P_CBE0_N PCI_P_CBE1_N PCI_P_CBE2_N PCI_P_CBE3_N W6 Y6 OSC32KI OSC32KII U15 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 OSC32K_II 4 M1535DPLUS C A9 B9 C9 A8 B8 C8 D8 A7 C7 D7 E7 A6 B6 C6 D6 E6 C3 A2 B2 C2 A1 B1 C1 D3 D1 E3 E2 E1 F3 F2 F1 G2 BGA352-50M D 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 7,25,27,29,31 PCI_P_AD00 PCI_P_AD01 PCI_P_AD02 PCI_P_AD03 PCI_P_AD04 PCI_P_AD05 PCI_P_AD06 PCI_P_AD07 PCI_P_AD08 PCI_P_AD09 PCI_P_AD10 PCI_P_AD11 PCI_P_AD12 PCI_P_AD13 PCI_P_AD14 PCI_P_AD15 PCI_P_AD16 PCI_P_AD17 PCI_P_AD18 PCI_P_AD19 PCI_P_AD20 PCI_P_AD21 PCI_P_AD22 PCI_P_AD23 PCI_P_AD24 PCI_P_AD25 PCI_P_AD26 PCI_P_AD27 PCI_P_AD28 PCI_P_AD29 PCI_P_AD30 PCI_P_AD31 1 33 USB_CLK R104 USB_CLK_R 3 OUT 24.9 GND 2 2 SG-636PCW 48.0000MHZ C VCC3V3 4 X3 1 OE VCC R107 4.75K FRAMEJ TRDYJ IRDYJ STOPJ DEVSELJ SERRJ PAR PDMA_REQJ PDMA_GNTJ PHLDAJ PHOLDJ INTAJ_MI INTBJ_S0 INTCJ_S1 INTDJ_S2 INTEJ INTFJ VCC_3C_1 VCC_3C_2 VCC_3C_3 VCC_3C_4 E4 E5 VCC_5A_1 VCC_5A_2 VCC_5A_3 VCC_5A_4 VCC_5A_5 E10 G6 N6 N15 R15 VCCR_5D_1 VCCR_5D_2 R7 R13 VCC_3B P15 VCCR_3E_1 VCCR_3E_2 VCCR_3E_3 R6 R8 R14 UPSPWR T10 VCC_G F15 1 C337 0.1UF OSC UNUSED_PU5V_1 UNUSED_PU5V_2 37 37 33 OSC14_CLK R105 OSC14_CLK_R 3 24.9 OUT GND 2 2 SG-636PCE 14.3181MHZ VCC5V VCC3V3 R168 B 4.75K R163 VCC3V3 7 SBR_PWG PWG 33 0 VCC3V3 7,33 VCC5V 4.75K 7,33 C371 0.1UF R209 SBR_INTR VCC3V3 C381 0.1UF C368 0.1UF C389 0.1UF C369 0.1UF C385 0.1UF C394 0.1UF C380 0.1UF R218 SBR_NMI 4.75K C396 0.1UF SCH P/N ART P/N FAB P/N VCC3V3 Title: C372 0.1UF A C395 0.1UF C378 0.1UF C390 0.1UF C391 0.1UF C383 0.1UF C382 0.1UF C379 0.1UF C393 0.1UF C370 0.1UF 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM PCI SOUTH BRIDGE, PART 1 A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 33 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 M1535D+ SIN2 SOUT2 RTS2J DTR2J CTS2J DSR2J DCD2J RI2J K4 K2 K3 L2 K1 K5 J1 L1 UART2_RXD UART2_TXD UART2_RTS_N UART2_DTR_N UART2_CTS_N UART2_DSR_N UART2_DCD_N UART2_RI_N 39 39 36,39 36,39 39 39 39 39 OVCRJ1 OVCRJ0 USB_PWENJ GPIO22 GPIO23 T6 T5 V9 U5 U6 USB1_OVCR_N USB0_OVCR_N USB_POWEN_N GPIO_23 GPIO_22 40 40 40 42 42 USBP0+ USBP0- W8 V8 USB0_DP_R USB0_DN_R 40 40 USBP1+ USBP1- U9 Y7 USB1_DP_R USB1_DN_R 40 40 USBP2+ USBP2- W7 V7 GPI_34 UNUSED_PD_1 42 37 USBP3+ USBP3- U8 T8 GPI_36 UNUSED_PD_2 42 37 IRRXH IRRX IRTX L4 L3 M1 UNUSED_PD_3 UNUSED_PD_4 37 37 KBCLK KBDATA U11 U12 KBCLK_R KBDATA_R 40 40 KBINH V12 KBINH 34,47 MSCLK MSDATA T11 T12 MSCLK_R MSDATA_R 40 40 USB PORTS IrDA MOUSE KEYBRD B NC IDE INTERFACE 39 39 36,39 39 39 39 39 39 U15 UART1_RXD UART1_TXD UART1_RTS_N UART1_DTR_N UART1_CTS_N UART1_DSR_N UART1_DCD_N UART1_RI_N GROUP F VCC=3.3V H2 J5 H1 J3 J4 H3 G1 J2 SERIAL PORT2 SIN1 SOUT1 RTS1J DTR1J CTS1J DSR1J DCD1J RI1J M1535D+ SOUTH BRIDGE 3/5 PORT1 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 SERIAL PP_STROBE_N_R PP_AUTOFD_N_R PP_DATA0_R PP_ERROR_N_R PP_DATA1_R PP_INIT_N_R PP_DATA2_R PP_SLCTIN_N_R PP_DATA3_R PP_DATA4_R PP_DATA5_R PP_DATA6_R PP_DATA7_R PP_ACK_N_R PP_BUSY_R PP_PEND_R PP_SELECT_R M1535DPLUS PARALLEL PORT SOUTH BRIDGE 2/5 C P1 R1 P2 T1 P3 R2 N1 R3 N2 N3 N4 N5 M2 M3 M4 M5 L5 BGA352-50M U15 M1535DPLUS BGA352-50M D STROBJ AUTOFDJ PD0 ERRORJ PD1 PRINITJ PD2 SLCTINJ PD3 PD4 PD5 PD6 PD7 PRNACKJ BUSY PE SLCT 1 PIDED0 PIDED1 PIDED2 PIDED3 PIDED4 PIDED5 PIDED6 PIDED7 PIDED8 PIDED9 PIDED10 PIDED11 PIDED12 PIDED13 PIDED14 PIDED15 G17 F20 F18 F16 E19 D20 D18 B20 C20 D19 E18 E20 F17 F19 G16 G18 PIDE_D0_R PIDE_D1_R PIDE_D2_R PIDE_D3_R PIDE_D4_R PIDE_D5_R PIDE_D6_R PIDE_D7_R PIDE_D8_R PIDE_D9_R PIDE_D10_R PIDE_D11_R PIDE_D12_R PIDE_D13_R PIDE_D14_R PIDE_D15_R 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 PIDEA0 PIDEA1 PIDEA2 H20 H19 J16 PIDE_A0_R PIDE_A1_R PIDE_A2_R 41 41 41 SIRQI PIDEDRQ PIDEDAKJ PIDERDY PIDEIORJ PIDEIOWJ PIDECS1J PIDECS3J CBLID_P N16 G19 H18 H17 H16 G20 J17 J18 D11 PIDE_INTRQ_R PIDE_DMARQ_R PIDE_DMACK_N_R PIDE_IORDY_R PIDE_DIOR_N_R PIDE_DIOW_N_R PIDE_CS1_N_R PIDE_CS3_N_R PIDE_PDIAG_N_R 41 41 41 41 41 41 41 41 41 SIDED0 SIDED1 SIDED2 SIDED3 SIDED4 SIDED5 SIDED6 SIDED7 SIDED8 SIDED9 SIDED10 SIDED11 SIDED12 SIDED13 SIDED14 SIDED15 A17 D16 B16 E15 C15 A15 D14 E13 D13 E14 B15 D15 A16 C16 E16 B17 SIDE_D0_R SIDE_D1_R SIDE_D2_R SIDE_D3_R SIDE_D4_R SIDE_D5_R SIDE_D6_R SIDE_D7_R SIDE_D8_R SIDE_D9_R SIDE_D10_R SIDE_D11_R SIDE_D12_R SIDE_D13_R SIDE_D14_R SIDE_D15_R 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 SIDEA0 SIDEA1 SIDEA2 A19 C18 B19 SIDE_A0_R SIDE_A1_R SIDE_A2_R 41 41 41 SIRQII SIDEDRQ SIDEDAKJ SIDERDY SIDEIORJ SIDEIOWJ SIDECS1J SIDECS3J CBLID_S P16 C17 B18 A18 E17 D17 C19 A20 E11 SIDE_INTRQ_R SIDE_DMARQ_R SIDE_DMACK_N_R SIDE_IORDY_R SIDE_DIOR_N_R SIDE_DIOW_N_R SIDE_CS1_N_R SIDE_CS3_N_R SIDE_PDIAG_N_R 41 41 41 41 41 41 41 41 41 VCC_F1 VCC_F2 G15 K16 D VCC5V R202 KBINH 34,47 4.75K C B VCC3V3 SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A PCI SOUTH BRIDGE, PART 2-3 A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 34 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 M1535D+ 35 UNUSED_PU33V_5 UNUSED_PU33V_6 37 37 V14 W14 Y14 SPLED Y13 SPLED 36 RSM_ENT0 RSM_ENT1 RSM_ENT8 W11 Y11 Y10 RSM_ENT0 UNUSED_PU5V_3 UNUSED_PD_5 36 37 37 PMEJ RI W12 V11 UNUSED_PU33V_7 UNUSED_PD_6 37 37 IRQ8J Y12 UNUSED_PU5V_4 37 RSM_ENT3 T9 UNUSED_PD_7 37 SMIJ STPCLKJ SLEEPJ ZZ NUINP1 CPU_STPJ A13 B14 D12 E12 A11 C10 THRMJ T18 IIC_THERM_N 6,45 SQWO V6 SQWO 36 SMBCLK SMBDATA SMBALERTJ T7 U7 T2 SMB_SCL SMB_SDA IIC_ALERT_N 35 35 6,45 E9 P18 P19 GPI_25 GPO_34 GPO_35 42 36,42 36,42 NC NC NC NC NC NC UNUSED_PU5V_5 UNUSED_PD_8 37 37 NC SOUND CNTRL Y9 W9 Y8 U1 P4 P5 R4 T4 ACGAME0 ACGAME1 ACGAME2 ACGAME3 ACGAME4 ACGAME5 ACGAME6 ACGAME7 V1 V2 V3 W1 W2 W3 Y1 Y2 ACGP_UPJ ACGP_MUTEJ ACGP_DOWNJ U3 U2 R5 FANOUT1 FANOUT2 FANIN2 W5 V5 Y5 NC NC SPDIF_OUT SPDIF_IN D9 U4 NC NC AC_RESET_N AC_SDATA_IN0 UNUSED_PD_9 AC_SDATA_OUT AC_SYNC AC_BIT_CLK 43 43 37 43 43 43 UNUSED_PD_10 37 NC NC NC NC NC NC NC NC UNUSED_PU5V_7 UNUSED_PU5V_8 UNUSED_PU5V_9 MISCELLANEOUS LOGIC AC97 INTERFACE ACRESETJ ACSDATA_IN0 ACSDATA_IN1 ACSDATA_OUT ACSYNC ACBIT_CLK ACMIDI_TXD ACMIDI_RXD FLOPPY DISK OFF_PWR0 OFF_PWR1 OFF_PWR2 XD(ISA) BUS Y15 V10 SOUTH BRIDGE 5/5 PWRBTNJ SLPBTNJ NC U15 RSM_RSTJ M1535DPLUS POWER MANAGEMENT UNIT2 SOUTH BRIDGE 4/5 W10 W13 GPI25 GPO34 GPO35 B 1 M1535D+ RSM_RSTJ SUSPENDJ BGA352-50M POWER MANAGEMENT UNIT1 U15 M1535DPLUS C BGA352-50M D 2 37 37 37 XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7 U20 U19 U18 Y20 W20 V20 Y19 W19 ROM_D0 ROM_D1 ROM_D2 ROM_D3 ROM_D4 ROM_D5 ROM_D6 ROM_D7 42 42 42 42 42 42 42 42 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 V19 Y18 W18 V18 Y17 W17 V17 U17 T17 R17 Y16 W16 V16 U16 T16 W15 ROM_A0 ROM_A1 ROM_A2 ROM_A3 ROM_A4 ROM_A5 ROM_A6 ROM_A7 ROM_A8 ROM_A9 ROM_A10 ROM_A11 ROM_A12 ROM_A13 ROM_A14 ROM_A15 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 BIOSA16 BIOSA17 BIOSA18 V15 U15 T15 ROM_A16 ROM_A17 ROM_A18 42 42 42 MEMRJ MEMWJ IORJ IOWJ T14 U14 T13 U13 ROM_OE_N ROM_WE_N 35,42 35,42 RDATAJ WGATEJ WDATAJ HDSELJ FD_DIRJ STEPJ DSKCHGJ DRV0J DRV1J MOT0J MOT1J WPROTJ TRK0J INDEXJ DENSEL M18 L19 L18 M19 L16 L17 M20 K19 K20 K17 K18 M16 L20 J20 J19 SPKR RTCAS RTCRW RTCDS ROMKBCSJ IRQSER T19 R20 R19 R18 T20 N19 GPI24 GPO29 GPO30 PCSOJ PCS1J UNUSED_PU5V_6 37 RUN_ENT0 RUN_ENT1 RUN_ENT2 RUN_ENT3 UNUSED_PU5V_10 37 GPO10 LFRAMEJ LDRQJ VCC3V3 4.75K R175 7 SBR_RSM_RSTJ RSM_RSTJ VCC5V R237 35,42 ROM_OE_N 4.75K R232 35,42 ROM_WE_N 4.75K C UNUSED_PU5V_11 37 6,21,45 UNUSED_PU5V_12 37 UNUSED_PU5V_13 UNUSED_PU5V_14 UNUSED_PU5V_15 37 37 37 SPKR 43,47 ROMKBCSJ UNUSED_PU5V_16 36,42 37 M17 N17 N18 GPI_24 GPO_29 GPO_30 42 36,42 36,42 P20 R16 PCS0J PCS1J 36 36 Y3 V4 W4 Y4 GPIO_0 GPIO_1 GPIO_2 GPIO_3 42 42 42 42 T3 GPO_10 42 N20 P17 UNUSED_PU5V_17 UNUSED_PU5V_18 37 37 NC NC NC NC 35 0 NC NC NC NC NC NC NC D R181 R146 IIC_SCL SMB_SCL 35 SMB_SDA 35 0 6,21,45 R150 IIC_SDA 0 NC NC NC NC B SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A PCI SOUTH BRIDGE, PART 4-5 A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 35 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 VCC5V R252 35,42 R217 GPO_34 RESERVED/PULLED HIGH FOR NORMAL OPERATION 33 CLK32KO PULLED DOWN FOR NORMAL OPERATION 4.75K 1.00K D D VCC5V VCC5V SIO BASE ADDRESS CONFIGURATION R250 35,42 R141 ROMKBCSJ 34,39 FLASH ROM FUNCTION MODE SELECT 4.75K UART1_RTS_N BASE ADDR = 0x3F0 RTS1J 4.75K DISABLED VCC5V R263 35,42 GPO_35 INTERNAL KEYBOARD CONTROLLER ENABLE R140 1.00K 34,39 UART2_RTS_N ENABLED RTS2J 4.75K VCC5V KEYBOARD CONTROLLER MODE SELECT VCC3V3 R139 34,39 R191 PCI_P_REQ3_N 7,24,33 PHOLDJ RESERVED/PULLED HIGH FOR NORMAL OPERATION UART2_DTR_N PS/2 MODE DTR2J 4.75K VCC3V3 4.75K R190 35 C R253 35 POWER CONTROL ACTIVE LEVEL SELECT RSM_ENT0 ACTIVE HIGH 4MBIT FLASH ROM LINEAR MODE C 4.75K PCS0J ENABLED 4.75K VCC5V SWITCH GPI24/IOCHRDY AND GPO30/AEN FUNCTIONS R251 35 PCS1J GPI24 AND GPO30 ENABLED 4.75K VCC5V R264 35,42 GPO_30 4.75K RESERVED/PULLED HIGH FOR NORMAL OPERATION B B R267 35,42 GPO_29 4.75K VCC5V CPU SUPPORT SELECT R154 35 SQWO PENTIUM-II MODE 4.75K VCC5V R208 35 SPLED AT/ATX MODE SELECT 1.00K AT MODE SCH P/N ART P/N FAB P/N 0381171-02 0531311-02 1280333-02 NOTE: AT MODE IS USED HERE TO DISABLE THE SOFT-POWER FUNCTIONALITY OF THE SOUTH BRIDGE Title: ML310 VIRTEX-II PRO PLAFTORM A PCI SOUTH BRIDGE, CONFIG RESISTORS A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 36 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 VCC5V UNUSED_PU5V_1 R169 33 UNUSED_PU33V_1 10.0K R153 34 UNUSED_PD_1 10.0K 1.00K R155 D 33 R167 UNUSED_PU5V_2 34 1.00K R201 35 35 35 UNUSED_PU5V_3 R203 33 UNUSED_PU33V_4 10.0K R216 R236 35 UNUSED_PU33V_5 10.0K R182 R180 35 UNUSED_PU33V_6 10.0K R149 R231 UNUSED_PU5V_6 35 10.0K R128 UNUSED_PU33V_7 UNUSED_PD_4 1.00K R189 35 10.0K UNUSED_PD_3 1.00K 34 10.0K UNUSED_PU5V_5 R129 34 10.0K UNUSED_PU5V_4 UNUSED_PD_5 1.00K R207 35 UNUSED_PD_6 10.0K 1.00K R126 35 35 R174 UNUSED_PU5V_7 35 C UNUSED_PD_7 10.0K 1.00K R125 R176 UNUSED_PU5V_8 35 1.00K R127 R162 UNUSED_PU5V_9 35 UNUSED_PD_9 10.0K 1.00K R145 35 C UNUSED_PD_8 10.0K 35 D UNUSED_PD_2 10.0K 35 1 VCC3V3 R130 33 2 R142 UNUSED_PU5V_10 35 10.0K UNUSED_PD_10 1.00K R266 35 UNUSED_PU5V_11 10.0K R255 35 UNUSED_PU5V_12 10.0K R268 B 35 B UNUSED_PU5V_13 10.0K R256 35 UNUSED_PU5V_14 10.0K R269 35 UNUSED_PU5V_15 10.0K R265 35 UNUSED_PU5V_16 10.0K R254 35 UNUSED_PU5V_17 SCH P/N ART P/N FAB P/N 10.0K 0381171-02 0531311-02 1280333-02 R262 35 UNUSED_PU5V_18 Title: A ML310 VIRTEX-II PRO PLAFTORM 10.0K PCI SOUTH BRIDGE, UNUSED PIN RESISTORS A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 37 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 VCC5V D1 D D 1.00K 8 7 6 5 R103 1.00K RP36 1 2 3 4 1 2 3 4 RP33 1.00K 8 7 6 5 1N4148 SOD-123 RP37 34 34 34 34 PP_STROBE_N_R PP_AUTOFD_N_R PP_INIT_N_R PP_SLCTIN_N_R 8 7 6 5 1 2 3 4 PP_STROBE_N PP_AUTOFD_N PP_INIT_N PP_SLCTIN_N 56.2 34 R99 PP_ERROR_N_R PP_ERROR_N 22.1 C278 180PF C283 180PF C279 180PF C281 180PF C285 180PF C C P1 RP34 PP_DATA0_R PP_DATA1_R PP_DATA2_R PP_DATA3_R 8 7 6 5 1 2 3 4 PP_DATA0 PP_DATA1 PP_DATA2 PP_DATA3 PP_STROBE_N PP_AUTOFD_N PP_DATA0 PP_ERROR_N PP_DATA1 PP_INIT_N PP_DATA2 PP_SLCTIN_N PP_DATA3 56.2 C280 180PF C284 180PF C282 180PF C286 180PF PP_DATA4 PP_DATA5 RP35 B 34 34 34 34 PP_DATA4_R PP_DATA5_R PP_DATA6_R PP_DATA7_R 8 7 6 5 PP_DATA6 1 2 3 4 PP_DATA4 PP_DATA5 PP_DATA6 PP_DATA7 PP_DATA7 PP_ACK_N 56.2 PP_BUSY C287 180PF C289 180PF C288 180PF PP_PEND C290 180PF PP_SELECT PP_ACK_N_R PP_BUSY_R PP_PEND_R PP_SELECT_R 8 7 6 5 1 2 3 4 B 44 GND1 45GND2 46GND3 47GND4 RP38 34 34 34 34 1 14 2 15 3 16 4 17 5 18 6 19 7 20 8 21 9 22 10 23 11 24 12 25 13 Parallel Port 34 34 34 34 PP_ACK_N PP_BUSY PP_PEND PP_SELECT 22.1 C291 180PF C293 180PF C292 180PF SCH P/N ART P/N FAB P/N C294 180PF Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A PARALLEL PORT INTERFACE A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 2 38 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 NOTE: PORT B IS ADJACENT TO THE PS/2 CONNECTOR WHERE COM1 IS TRADITIONALLY LOCATED. THE CONNECTOR NAMES ARE MISLEADING. D D P1 VCC12V_N U6 11 UART1_RI_N 12 34 UART1_DTR_N 13 34 UART1_CTS_N 14 34 UART1_TXD 15 UART1_RTS_N 16 34 UART1_RXD 17 34 UART1_DSR_N 18 34 UART1_DCD_N 19 34,36 20 VCC5V VSS RY5 RA5 DA3 RY4 DA2 TI GD75232 34 GND DY3 RA4 DY2 DA1 DY1 RY3 RA3 RY2 RA2 RY1 RA1 VCC VDD 10 5B GND 9 COM1_RI 9B 8 COM1_DTR 4B 7 COM1_CTS 8B 6 COM1_TXD_N 3B 5 COM1_RTS 7B 4 COM1_RXD_N 2B 3 COM1_DSR 6B 2 COM1_DCD 1B 1 VCC12V_P C312 180PF C296 180PF C295 180PF C C297 180PF C324 180PF GND RI DTR CTS TXD RTS RXD DSR DCD Serial Port B GND C298 180PF C325 180PF C305 180PF C P1 VCC12V_N U5 12 34,36 UART2_DTR_N 13 34 UART2_CTS_N 14 34 UART2_TXD 15 UART2_RTS_N 16 34 UART2_RXD 17 34 UART2_DSR_N 18 34 UART2_DCD_N 19 34,36 VCC5V 20 GND RY5 DA3 RY4 DA2 DA1 10 VSS RA5 TI GD75232 UART2_RI_N 34 B 11 DY3 RA4 DY2 DY1 RY3 RA3 RY2 RA2 RY1 RA1 VCC VDD 5A GND 9 COM2_RI 9A 8 COM2_DTR 4A 7 COM2_CTS 8A 6 COM2_TXD_N 3A 5 COM2_RTS 7A 4 COM2_RXD_N 2A 3 COM2_DSR 6A 2 COM2_DCD 1A 1 VCC12V_P C310 180PF C275 180PF C274 180PF C276 180PF C322 180PF GND RI DTR CTS TXD RTS RXD DSR DCD Serial Port A GND B C277 180PF C323 180PF C311 180PF SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A RS232 SERIAL PORT INTERFACE A Date: 1-5-2004_13:05 Sheet Size: B Sheet 4 3 2 39 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 VCC5V L9 F1 KBVCC 0805 C303 0.1UF VCC5V D C17 100UF 10V D NC 8 7 6 5 NC KNC6 KVCC KNC2 1 3 5 KDAT KGND KCLK 7 9 11 MDAT MGND MCLK 2.21K NC NC P2 1 2 3 4 KBD RP39 6 4 2 MINIDIN6_DUAL MNC6 MVCC MNC2 MOUSE 12 10 8 L13 34 KBDATA_R 1 2 KBDATA 0805 KBCLK L12 34 KBCLK_R 1 MSDATA 2 MSCLK 0805 C300 180PF L15 34 MSDATA_R 1 C302 180PF C299 180PF 2 13 14 15 16 17 C301 180PF 0805 C GND1 GND2 GND3 GND4 GND5 L14 34 MSCLK_R 1 C 2 0805 4.75K L18 VCC5V 0805 OUTA8 IN7 GND6 OUTB5 USB0_VCCSW USB1_VCCSW L17 MIC2076-2 34 4.75K R120 B USB0_DP_R USB1_VCC B 0805 C338 0.1UF R137 C34 100UF 10V C33 100UF 10V USB0_DP 22.1 34 USB0_DN_R R138 C332 180PF USB0_DN A4 GND A3 D+ A2 D- A1 VBUS B4 GND B3 D+ B2 D- B1 VBUS C333 180PF J3 A U9 1ENA 2FLGA 3FLGB 4ENB USB_POWEN_N USB0_OVCR_N USB1_OVCR_N USB0_VCC USB R114 R115 34 34 34 4.75K VCC5V 22.1 R135 USB1_DP 22.1 34 USB1_DN_R R136 USB1_DN 15.0K R122 15.0K R121 15.0K R124 R123 A 15.0K 22.1 C334 180PF C335 180PF SCH P/N ART P/N FAB P/N J3 Title: ML310 VIRTEX-II PRO PLAFTORM KBD/MOUSE AND USB INTERFACES A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 0381171-02 0531311-02 1280333-02 B USB1_DP_R USB 34 2 40 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 Pin 20 must be removed. PIDE_D7 PIDE_D8 PIDE_D6 PIDE_D9 41 41 41 41 47.5 RP50 8 7 6 5 1 2 3 4 PIDE_D5 PIDE_D10 PIDE_D4 PIDE_D11 41 41 41 41 47.5 RP49 34 34 34 34 PIDE_D3_R PIDE_D12_R PIDE_D2_R PIDE_D13_R 8 7 6 5 1 2 3 4 PIDE_D3 PIDE_D12 PIDE_D2 PIDE_D13 41 41 41 41 47.5 RP48 34 34 34 34 PIDE_D1_R PIDE_D14_R PIDE_D0_R PIDE_D15_R 8 7 6 5 1 2 3 4 PIDE_D1 PIDE_D14 PIDE_D0 PIDE_D15 41 41 41 41 47.5 C 34 1 R303 PIDE_DMARQ_R 2 PIDE_DMARQ 8 7 6 5 1 2 3 4 PIDE_DIOW_N PIDE_DIOR_N PIDE_IORDY PIDE_DMACK_N 41 PIDE_DMARQ 41 PIDE_DIOW_N 41 PIDE_DIOR_N 41 41 41 PIDE_IORDY PIDE_CSEL PIDE_DMACK_N 41 PIDE_INTRQ 41 41 41 41 41 41 41,47 RP47 PIDE_DIOW_N_R PIDE_DIOR_N_R PIDE_IORDY_R PIDE_DMACK_N_R PIDE_D7 PIDE_D8 PIDE_D6 PIDE_D9 PIDE_D5 PIDE_D10 PIDE_D4 PIDE_D11 PIDE_D3 PIDE_D12 PIDE_D2 PIDE_D13 PIDE_D1 PIDE_D14 PIDE_D0 PIDE_D15 41 82.0 34 34 34 34 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 PIDE_A1 PIDE_PDIAG_N PIDE_A0 PIDE_A2 PIDE_CS1_N PIDE_CS3_N PIDE_DASP_N 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 NC NC 33.2 34 1 R301 PIDE_INTRQ_R SIDE_D7_R SIDE_D8_R SIDE_D6_R SIDE_D9_R 8 7 6 5 PIDE_INTRQ SIDE_D5_R SIDE_D10_R SIDE_D4_R SIDE_D11_R 8 7 6 5 SIDE_D3_R SIDE_D12_R SIDE_D2_R SIDE_D13_R 8 7 6 5 34 34 34 34 SIDE_D1_R SIDE_D14_R SIDE_D0_R SIDE_D15_R 8 7 6 5 41 41 41 41 34 PIDE_CS3_N 41 1 R291 SIDE_DMARQ_R 41 34 34 34 34 SIDE_DIOW_N_R SIDE_DIOR_N_R SIDE_IORDY_R SIDE_DMACK_N_R 8 7 6 5 34 34 34 34 1 R289 SIDE_INTRQ_R SIDE_A1_R SIDE_A0_R SIDE_A2_R SIDE_CS1_N_R 8 7 6 5 34 R292 SIDE_CS3_N_R 34 R290 SIDE_PDIAG_N_R SIDE_A1 SIDE_A0 SIDE_A2 SIDE_CS1_N 41 41 41 41 SIDE_CS3_N 41 SIDE_PDIAG_N 41 41 SIDE_INTRQ NC SIDE_A1 SIDE_PDIAG_N SIDE_A0 SIDE_A2 SIDE_CS1_N SIDE_CS3_N SIDE_DASP_N C CON_IDE40 VCC3V3 B SIDE_DASP_N Silkscreen: "IDE S LED" 10.0K R305 SIDE_INTRQ 4.75K 41 R307 SIDE_D7 10.0K R309 41 R310 SIDE_DMARQ 5.62K R299 41 R287 SIDE_CSEL 475 SCH P/N ART P/N FAB P/N 475 R314 41 R308 SIDE_PDIAG_N 100K 100K C425 A 1 2 3 4 SIDE_IORDY SIDE_CSEL SIDE_DMACK_N DS21 41 R313 PIDE_PDIAG_N 41 41 41 41 D R312 SIDE_IORDY 5.62K 41 SIDE_INTRQ SIDE_DIOR_N 41,47 41 PIDE_CSEL 2 41 41 41 41 41 41 41 41,47 41 41 41 41 PIDE_DASP_N 10.0K 41 SIDE_DIOW_N SIDE_DIOR_N SIDE_IORDY SIDE_DMACK_N SIDE_DIOW_N VCC3V3 R306 PIDE_DMARQ 1 2 3 4 41 NC 0 4.75K 41 41 SIDE_DMARQ 33.2 Silkscreen: "IDE P LED" 10.0K PIDE_D7 SIDE_DMARQ 41 33.2 DS22 41,47 41 2 RP43 R311 PIDE_INTRQ 41 41 41 41 SIDE_D7 SIDE_D8 SIDE_D6 SIDE_D9 SIDE_D5 SIDE_D10 SIDE_D4 SIDE_D11 SIDE_D3 SIDE_D12 SIDE_D2 SIDE_D13 SIDE_D1 SIDE_D14 SIDE_D0 SIDE_D15 GREEN PIDE_PDIAG_N VCC3V3 41 SIDE_D1 SIDE_D14 SIDE_D0 SIDE_D15 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 41 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 33.2 B 41 1 2 3 4 82.0 VCC3V3 0 PIDE_IORDY 41 41 41 41 SIDE_RESET_N RP45 PIDE_A1 PIDE_A0 PIDE_A2 PIDE_CS1_N GREEN R304 PIDE_PDIAG_N_R SIDE_D3 SIDE_D12 SIDE_D2 SIDE_D13 47.5 33.2 34 1 2 3 4 RP44 34 R390 PIDE_CS3_N_R 41 41 41 41 47.5 41 33.2 34 SIDE_D5 SIDE_D10 SIDE_D4 SIDE_D11 41 82.0 1 2 3 4 R302 1 2 3 4 RP42 34 34 34 34 182 8 7 6 5 41 41 41 41 47.5 RP46 PIDE_A1_R PIDE_A0_R PIDE_A2_R PIDE_CS1_N_R SIDE_D7 SIDE_D8 SIDE_D6 SIDE_D9 RP41 34 34 34 34 82.0 34 34 34 34 1 2 3 4 47.5 CON_IDE40 2 J15 RP40 34 34 34 34 182 PIDE_D5_R PIDE_D10_R PIDE_D4_R PIDE_D11_R PIDE_RESET_N R387 34 34 34 34 41 IDE SECONDARY CONN D 1 2 3 4 IDE PRIMARY CONN 8 7 6 5 Mark Pin 1 Pin20=Key Silkscreen: "IDE SECONDARY" J16 RP51 PIDE_D7_R PIDE_D8_R PIDE_D6_R PIDE_D9_R Pin 20 must be removed. Mark Pin 1 Pin20=Key Silkscreen: "IDE PRIMARY" 34 34 34 34 1 Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM C424 IDE INTERFACES 0.047UF 7,41 R288 SBR_IDE_RST_N 0.047UF SIDE_RESET_N 0 7,41 R300 SBR_IDE_RST_N 3 10-6-2003_14:59 Sheet Size: B PIDE_RESET_N Sheet 41 0 4 A Date: 41 2 41 of Ver: X.X Rev: X Drawn By 51 XXX 1 4 3 2 1 SOUTH BRIDGE D D GPIO HEADER U4 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 35 9 6 10 11 5 4 12 1 31 2 3 13 14 15 16 17 18 19 20 ROM_A18 ROM_A17 ROM_A16 ROM_A15 ROM_A14 ROM_A13 ROM_A12 ROM_A11 ROM_A10 ROM_A9 ROM_A8 ROM_A7 ROM_A6 ROM_A5 ROM_A4 ROM_A3 ROM_A2 ROM_A1 ROM_A0 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 J5 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 35,36 35 35 30 32 7 ROMKBCSJ ROM_OE_N ROM_WE_N CE_L OE_L WE_L ROM_D7 ROM_D6 ROM_D5 ROM_D4 ROM_D3 ROM_D2 ROM_D1 ROM_D0 VCC5V VCC C 29 28 27 26 25 23 22 21 35 35 35 35 35 35 35 35 GPI_24 1 2 35,42 GPI_25 3 4 34,42 GPI_34 5 6 34,42 GPI_36 7 8 35,42 GPIO_0 9 10 35,42 GPIO_1 11 12 35,42 GPIO_2 13 14 35,42 GPIO_3 15 16 34,42 GPIO_22 17 18 34,42 GPIO_23 19 20 GPO_30 35,36 35 GPO_10 21 22 GPO_34 35,36 35,36 GPO_29 23 24 GPO_35 35,36 VCC5V 8 C304 0.1UF GND 35,42 24 C HDR_2X12 AM29F040B PKG_TYPE=TSSOP-32 VCC3V3 35,42 GPI_24 R77 1.00K 35,42 GPI_25 R76 1.00K 34,42 GPI_34 R75 1.00K 34,42 GPI_36 R74 1.00K B B 35,42 GPIO_0 R73 1.00K 35,42 GPIO_1 R72 1.00K 35,42 GPIO_2 R71 1.00K 35,42 GPIO_3 R70 1.00K 34,42 GPIO_22 R69 1.00K 34,42 GPIO_23 R68 SCH P/N ART P/N FAB P/N 1.00K Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A SOUTH BRIDGE ROM AND GPIO A Date: 6-16-2004_18:00 Sheet Size: B Sheet 4 3 2 42 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 VCC12V_P VCC3V3 U3 4 5 C3 C249 0.1UF 22UF 25V OSC 2 GND OUT 3 R57 AC97_CLK_R AC97_CLK GND6 6 ADJ GND7 7 BYP C267 0.01UF AC_AGND L6 2 0805 R64 AC_BIT_CLK AC_BIT_CLK_R 43 R1 VOUT = 1.21*(1+R2/R1) VOUT = 1.21*(1+3.09K/1.00K) VOUT = 4.949V AC_AGND 49.9 AC_AGND 47.5K SPKR VCC3V3 AC_PC_BEEP 4.75K U1 43 1 9 DVDD1 DVDD2 35 35 35 35 43 B 43 43 43 AC_PC_BEEP AC_NC1 AC_NC2 AC_NC3 AC_NC4 AC_NC5 AC_CD_INL AC_CD_GNDREF AC_CD_INR AC_MIC_IN AC_NC6 AC_LINE_INL AC_LINE_INR XTL_IN XTL_OUT C314 0.1UF AC_NC1 PC_BEEP PHONE_IN AUXIN_L AUXIN_R VIDEO_L VIDEO_R CD_L CD_GND_REF CD_R MICIN_1 MICIN_2 LINE_IN_L LINE_IN_R AC_CS0 AC_CS1 AC_MODE C243 0.022UF 44 44 NC 39 40 41 EAPD 47 AC_EAPD 44 34 33 AC_3DP AC_3DN 43 43 AC_3DN RESET SDATA_OUT SDATA_IN SYNC BIT_CLK 45 46 48 AC_HEAD_OUTL AC_HEAD_OUTC AC_HEAD_OUTR 28 27 AC_VREFOUT AC_VREF 44 43 29 30 31 32 NC_AFILT1 NC_AFILT2 NC_FILT_R NC_FILT_L 44 44 44 C246 0.047UF NOSTUFF AC_AGND 3DP 3DN VREFOUT VREF_FLTR 11 5 8 10 6 AC_RESET_N AC_SDATA_OUT AC_SDATA_IN0 AC_SYNC AC_BIT_CLK_R AC_LINE_OUTL AC_LINE_OUTR HP_OUT_L HP_OUT_C HP_OUT_R NC_AFILT1 NC_AFLIT2 NC_FILT_R NC_FILT_L CS0 CS1 CIN_MODE NC43 NC44 DVSS2 DVSS1 NC_AVSS2 AVSS1 43 44 C262 270PF C253 1UF NC NC AC_AVDD 43,44 C252 1UF B AC_VREF 43 C260 270PF C268 0.1UF C2 10UF 6.3V 42 26 AC_AGND 43 AC_NC3 AC_NC4 43 AC_CS0 43 VCC3V3 4.75K 43 NOSTUFF 43,44 43 R61 AC_CS1 43 C250 0.1UF 4.75K AC_NC5 AC_NC6 AC_AGND AC_AGND R58 C316 0.1UF AC_3DP LM4550 TQFP48-500MM AC_NC2 C318 0.1UF C315 0.1UF C 43,44 43 12 13 14 15 16 17 18 19 20 21 22 23 24 7 4 C317 0.1UF LINE_OUT_L LINE_OUT_R MONO_OUT 35 36 37 AC_AVDD 2 43 43 43 43 43 43 43 44 44 44 44 43 44 44 C319 0.1UF 25 38 43 2 3 AC97_CLK NC A AVDD1 NC_AVDD2 1 R86 R83 C 10.0K C257 1UF R79 35,47 D 100UF 10V AC_AGND 1 35 C4 R2 LT1763CS8 43 24.9 SG-636PCE 24.5760MHZ GND3 3 SHDN R92 D 2 AC_AVDD 3.09K VCC 4.75K OUT 1 IN 1.00K X1 1 OE R60 R91 8 43 C258 0.1UF SCH P/N ART P/N FAB P/N AC_AVDD C251 0.1UF C259 0.1UF Title: ML310 VIRTEX-II PRO PLAFTORM NOSTUFF AC97 CODEC R63 43 AC_MODE A 43 Date: 4.75K AC_AGND 3 2 10-6-2003_14:59 Sheet Size: B Sheet AC_AGND 4 0381171-02 0531311-02 1280333-02 43 of Ver: X.X Rev: X Drawn By 52 XXX 1 R85 4.75K C273 180PF L8 43 2 J2 L16 AC_LINE_OUTL 2 21 22 23 24 NC NC LIME TOP D 0805 CON_JACK2 R82 43 1 C266 180PF 100K C309 180PF G11 G22 G33 G44 G55 R89 0805 AC_LINE_OUTR 0805 AC_LINE_INL 4.75K J2 4.75K R84 D R90 2 43 R100 L11 1 43 1 4.75K BLUE BOT AC_LINE_INR C308 1UF 0805 100K 2 1 C320 1UF L10 1 2 C265 1UF 3 C272 1UF 4 C321 180PF CON_JACK2 AC_AGND L3 1 R62 2 AC_VREFOUT C1 470UF 6.3V AC_AGND 43 0805 AC_AMP_OUTR 44 2.21K L4 C 0805 R59 C245 180PF L5 1 AC_AMP_OUTL 44 AC_AGND NC NC LIME TOP C CON_JACK2 C247 0.1UF CON_JACK2 2 0805 R67 C248 180PF G11 G22 G33 G44 G55 J1 21 22 23 24 43 47.5K J1 AC_MIC_IN C256 180PF 47.5K 2 R78 1 2 0805 47.5K L2 C5 470UF 6.3V NC C244 1UF 1 BLUE BOT C261 180PF AC_AGND AC_AGND L7 2 43 AC_AVDD 1 0 2 AC_AGND 43 AC_HEAD_OUTL U2 R87 4 VDD8 OUTA1 6INB OUTB7 43 B R94 4.75K R93 2INA 3BYPASS C264 1UF 44 AC_CD_INR AC_CD_GNDREF 43 AC_CD_INL 43 4.75K 5SHUTDOWN 20.0K 20.0K AC_AMP_OUTR 4.75K R95 R65 3 R96 R97 AC_HEAD_OUTR C306 1UF 43 C254 1UF AC_AGND CD-ROM AUDIO 2 4.75K C269 1UF 1 B C271 1UF R98 J6 C270 1UF C263 0.1UF 4.75K R81 0805 4.75K 1 R80 AC_EAPD 4.75K 43 GND4 AC_AMP_OUTL LM4880 44 AC_AGND AC_AGND AC_AGND SCH P/N ART P/N FAB P/N C255 5PF 43 AC_HEAD_OUTC C242 1UF R66 A Title: 27.4K A Date: 10-6-2003_14:59 Sheet Size: B R88 Sheet 27.4K 4 ML310 VIRTEX-II PRO PLAFTORM AC97 CONNECTORS C307 5PF AC_AGND 0381171-02 0531311-02 1280333-02 3 2 44 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 VCC3V3 2 1 VCC3V3 VCC3V3 VCC12V_P NC 3NC SMBUS24 IIC_SDA 4.75K 1ADD_NTEST_OUT IIC_SDA IIC_SCL IIC_ALERT_N IIC_THERM_N IIC_RESET_N IIC_RESET_N 10ALERT_L 2THERM_L 12RESET_L VCC3V3 R226 511 R276 511 R274 511 R275 511 R273 100K CI7 DACOUT_NTEST_IN11 NC FAN_DACOUT 52 VCC3V3 FAN_SPD3 52 FPGA_DXP 13 C407 0.1UF C406 2200PF 9VDD 8GND C 1 C59 10UF 6.3V 2 FPGA_DXN C 13 LM87 VCC3V3 VCC12V_N R227 D1P14 D1N13 VCC3V3 IIC_ALERT_N D FAN1_AIN15 FAN2_AIN26 24VID0_IRQ0 23VID1_IRQ1 22VID2_IRQ2 21VID3_IRQ3 20VID4_IRQ4 NC NC NC NC NC 4.75K R225 VCC1V5 VIN1215 VIN516 VIN25_D2P18 VCCP2_D2N17 VCCP119 3SMBDATA 4SMBCLK VCC3V3 6,35 VCC3_PCI U20 IIC_SCL LTC1694 7 VCC2V5 20.0K SMBUS15 511 R229 U27 1VCC 2GND VCC5V 4.75K R224 1.00K VCC3V3 R272 D R279 R278 1.00K C415 0.1UF Silkscreen: "RTC OSC OUT" TP12 U22 7SDA 6SCL IIC_SDA IIC_SCL VCC3V3 1 VCC3V3 VCC2V5 RTC-8564JE 2 1 2 3 C399 1000PF D3 3 1 I2C ADDR = 0xA2 R245 IIC_IRQ_N 3.00K R230 6 VCC4 CLKOE3 CLKOUT5 GND9 10INT 4.75K IIC_IRQ_N TP D2 IIC_THERM_N 6,35 NC R228 4.75K I2C ADDR = 0x5C VCC3V3 B R277 NC VBATT VCC3V3 4.75K NOSTUFF 6,21,35 6,21,35 IIC_SCL IIC_SDA IIC_SCL IIC_SDA VCC WP SCL SDA A0 A1 A2 VSS 1 B1 VCC3V3 U21 8 7 6 5 1 2 3 4 B 13 C408 0.1UF 24LC64 2 A 9 9 SPI_DATA_CS_N SPI_DATA_OUT 4.75K R221 R271 4.75K 4.75K R270 4.75K R222 4.75K R223 VCC2V5 U19 1CS 2SO 3WP 4VSS VCC8 HOLD7 SCK6 SI5 25LC640 9 9 SCH P/N ART P/N FAB P/N VCC2V5 Title: ML310 VIRTEX-II PRO PLAFTORM I2C AND SPI DEVICES C405 0.1UF A SPI_DATA_IN SPI_CLK Date: 6-16-2004_18:02 Sheet Size: B Sheet 4 3 0381171-02 0531311-02 1280333-02 2 45 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 VCC3V3 DS20 R368 182 GREEN D D DS19 182 GREEN VCC3V3 U36 20VCCA 192OE 112A1 132A2 152A3 172A4 R362 182 GREEN 1Y118 1Y216 1Y314 1Y412 BUFFER 6 6 6 6 DBG_LED_4 DBG_LED_5 DBG_LED_6 DBG_LED_7 DS18 NON-INVERTING 11OE 21A1 41A2 61A3 81A4 4.75K 6 6 6 6 DBG_LED_0 DBG_LED_1 DBG_LED_2 DBG_LED_3 R399 R364 DS17 R356 182 GREEN 2Y19 2Y27 2Y35 2Y43 DS16 GND10 R353 182 GREEN VCC3V3 SN74LVC244A DS15 R350 C501 0.1UF C 182 GREEN DS14 C R348 182 GREEN DS13 R340 182 GREEN VCC3V3 RED 2 R315 1 GRN 182 4 3 DS9 B B VCC3V3 VCC3V3 U33 20VCCA FPGA_LCD_RS FPGA_LCD_E FPGA_LCD_RW BUFFER 5 5 5 192OE 112A1 132A2 152A3 172A4 NON-INVERTING 9 9 13 9,19,20 11OE 21A1 41A2 61A3 81A4 OPB_BUS_ERROR PLB_BUS_ERROR FPGA_DONE FPGA_INIT RED 2 R320 1Y118 1Y216 1Y314 1Y412 LED_OPB_ERROR LED_PLB_ERROR LED_DONE LED_INIT 2Y19 2Y27 2Y35 2Y43 LCD_RS LCD_E LCD_RW LED_DONE_BUF GND10 1 GRN 182 4 3 DS10 47 47 47 47 DS12 R333 182 GREEN SCH P/N ART P/N FAB P/N SN74LVC244A 4.75K R358 VCC3V3 A VCC3V3 ML310 VIRTEX-II PRO PLAFTORM DS11 R329 DEBUG AND STATUS LEDS 182 C443 0.1UF Title: RED A Date: 10-6-2003_14:59 Sheet Size: B Sheet 4 3 0381171-02 0531311-02 1280333-02 2 46 of Ver: X.X Rev: X Drawn By 51 XXX 1 4 VCC3V3 C454 0.1UF U35 FPGA_LCD_DB2 5 5 FPGA_LCD_DB3 6 5 FPGA_LCD_DB4 7 5 FPGA_LCD_DB5 8 5 FPGA_LCD_DB6 9 5 FPGA_LCD_DB7 10 OE A2 B1 A3 B2 A4 A5 A6 A7 A8 11 12 B3 B4 B5 B6 B7 GND1 B8 GND2 GND3 VCC5V NC 22 21 LCD_DB0 47 20 LCD_DB1 47 19 LCD_DB2 47 18 LCD_DB3 47 17 LCD_DB4 47 16 LCD_DB5 47 15 LCD_DB6 47 14 LCD_DB7 47 20,47 20,47 20,47 SYSACE_CFGA0 SYSACE_CFGA1 SYSACE_CFGA2 1 2 3 6 5 4 SW3 LCD_VLC 47 VCC5V J13 13 GND 1 2 47 LCD_VLC 3 4 LCD_RS 46 46 LCD_RW 5 6 LCD_E 46 47 LCD_DB0 7 8 47 LCD_DB2 9 47 LCD_DB4 47 LCD_DB6 VCC5V 47 11 12 LCD_DB5 47 13 14 LCD_DB7 47 15 16 20,47 SYSACE_CFGA1 3 4 20,47 SYSACE_CFGA2 5 6 47 LED_DONE_R 7 8 47 ATX_PWRLED 9 10 NC 11 12 GND 13 14 47 B GND MANF=ASTRON MANF_PN=27-0103-208-11 J23 1 2 FPGA_LED_USER1 SYSACE_CFGA0 C LCD_BLV 47 FPGA_LED_USER2 9 9 NC R376 GND ATX_SPKR 47 34 KBINH 15 16 47 ATX_IDELED_R 17 18 49 PWR_SUPPLY_ON 19 20 GND 48 PB_SYSACE_RESET 21 22 GND 48 PB_FPGA_CPU_RESET 23 24 GND 47 1 Q3 NC GND ATX_SPKR 33 VCC5V 35,43 SPKR C R360 470 1 2 B C478 180PF 3 B E 2 3904 1N4148 SOD-123 182 LCD_DB3 20,47 VCC3V3 R453 47 10 D4 47 LCD_BLV LCD_DB1 C440 0.1UF C R430 SN74LVCC3245A ATX_PWRLED 1.00K 5 A1 23 100 4 NC D 1.00K 5 FPGA_LCD_DB1 DIR 24 R406 5 3 VCCB R409 2 FPGA_LCD_DB0 VCCA TRANSLATOR 1 VOLTAGE LEVEL D R393 C447 0.1UF VCC3V3 VCC2V5 R398 VCC2V5 VCC2V5 1 4.75K 4.75K R396 R373 0 4.75K R388 2 4.75K FPGA_LCD_DIR 5 3 HDR_2X12 46 R433 LED_DONE_BUF LED_DONE_R 47 VCC5V D5 182 41 PIDE_DASP_N ATX_IDELED 2 1 3 R451 ATX_IDELED_R SCH P/N ART P/N FAB P/N 47 182 NC C531 0.1UF C582 0.1UF Title: D6 A 41 SIDE_DASP_N 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM ATX AND FRONT PANEL CONNECTORS 2 1 3 A NC Date: 6-4-2004_13:03 Sheet Size: B Sheet 4 3 2 47 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 R345 NOTE: SW1 PRESSED < 2S ASSERTS CPU RESET SW1 PRESSED > 2S ASSERTS SYSACE_RESET 4.75K VCC2V5 D D SYSACE_RESET_N 20 VCC3V3 R344 4.75K PB_SYSACE_RESET SYSACE_RESET_N PB_SYSACE_RESET NC LTC1326 SW1 C435 0.1UF C 1 4.75K VCC3V3 R332 VCC2V5 VCC3V3 47 2 PBR8 SRST7 RST6 RST5 0 R343 1.00K U31 1VCC3 2VCC25 3VCCA 4GND R331 VCC2V5 402 VCC3V3 R342 VCC1V5 C426 0.1UF C FPGA_CPU_RESET_N 5 PB_FPGA_CPU_RESET 47 R330 VCC3V3 PBR8 SRST7 RST6 RST5 PB_FPGA_CPU_RESET FPGA_CPU_RESET_N HARD_CPU_RESET_N 2 U30 1VCC3 2VCC25 3VCCA 4GND 4.75K VCC3V3 NC LTC1326 1 SW2 B B 6 6 6 6 U7 11DIN1 10DIN2 12ROUT1 9ROUT2 UART0_TXD UART0_RTS_N UART0_RXD UART0_CTS_N J4 DOUT114 DOUT27 RIN113 RIN28 COM0_TXD_N COM0_RTS COM0_RXD_N COM0_CTS 48 48 48 48 1 2 48 COM0_RXD_N 3 4 COM0_RTS 48 48 COM0_TXD_N 5 6 COM0_CTS 48 7 8 NC 9 10 NC NC VCC3V3 NC 1C1+ VCC16 C330 0.1UF C326 0.1UF 3C1- V+2 4C2+ V-6 C331 0.1UF HEADER2X5 VCC3V3 C327 0.1UF 5C2- NC USE A DTK-PINOUT IDC10 DSR C313 0.1UF GND15 MAX3232 A CD 2 RX 3 TX 6 RTS 7 CTS 8 RI 1 4 DTR 5 GND 9 TO DB9 PLUG CABLE. SCH P/N ART P/N FAB P/N 0381171-02 0531311-02 1280333-02 RS232 DTE PINOUT Title: ML310 VIRTEX-II PRO PLAFTORM CONNECTS TO PC WITH RESET SWITCHES AND FPGA SERIAL PORT F/F NULL MODEL CABLE. A Date: LOOKING INTO DB9 PLUG Sheet Size: B Sheet 4 3 6-4-2004_13:04 2 48 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 VCC5V 2 1 VCC3V3_ATX VCC5V VCC1V5 U8 13VIN1 12VIN2 VCC12V_N J18 11 D 12 13 47 PWR_SUPPLY_ON 14 15 16 17 NC 18 19 20 3.3-C 3.3-A -12V 3.3-B COM-D COM-A PS-ON 5V-A COM-E COM-B COM-F 5V-B COM-G COM-C -5V PW-OK 5V-C 5VSB 5V-D 12V 6VID0 7VID1 8VID2 9VID3 10VID4 C16 100UF 10V 1 VO11 VO22 VO34 2 3 TRIM15 16EN 11GND2 4 1.5V SENS3 NC C23 220UF 6.3V C22 220UF 6.3V D GND15 SC10A_DAC 5 6 VCC5V VCC2V5 7 U10 8 NC 9 NC 13VIN1 12VIN2 VCC12V_P 6VID0 7VID1 8VID2 9VID3 10VID4 C28 100UF 10V 10 VO11 VO22 VO34 2.5V SENS3 TRIM15 16EN 11GND2 NC C36 220UF 6.3V C35 220UF 6.3V GND15 SC10A_DAC VCC5V VCC12V_P VCC3V3_ATX VCC5V C VCC3V3 C U14 C204 470UF 25V VCC12V_N C241 470UF 25V C239 1000UF 10V C234 1000UF 10V 13VIN1 12VIN2 C218 1000UF 10V VO11 VO22 VO34 6VID0 7VID1 8VID2 9VID3 10VID4 C52 100UF 10V TRIM15 16EN 11GND2 ATX Power Connector 3.3V SENS3 NC C45 220UF 6.3V C46 220UF 6.3V GND15 SC10A_DAC NOTE: TYPICAL ATX POWER SUPPLIES MAY NOT PRODUCE A WELL-REGULATED 3.3V SUPPLY UNLESS THERE IS A MINIMUM LOAD ON THE 5V OUTPUT. THEREFORE 3.3V IS REGULATED SEPERATELY FOR ON-BOARD USE. B VCC1V5 VCC3V3 B VCC3V3_ATX C137 220UF 6.3V C220 220UF 6.3V C153 220UF 6.3V C155 220UF 6.3V C6 220UF 6.3V C136 220UF 6.3V VCC3V3 1 R187 C15 220UF 6.3V 2 NOTE: THESE RESISTORS ALLOW THE 3.3V REGULATOR TO 0 NOSTUFF 1 R186 BE NOSTUFFED AND 3.3V POWER TAKEN DIRECTLY FROM THE ATX SUPPLY IN THE CASE WHERE IT IS WELL 2 BEHAVED GIVEN THE LOAD ON THE OTHER OUTPUTS. 0 VCC2V5 NOSTUFF VCC5V 1 R185 2 0 C235 220UF 6.3V C64 220UF 6.3V C154 220UF 6.3V C51 220UF 6.3V NOSTUFF C135 100UF 10V SCH P/N ART P/N FAB P/N C187 C240 100UF 10V 22UF 25V A 1 R188 VCC12V_N 0381171-02 0531311-02 1280333-02 2 0 Title: ML310 VIRTEX-II PRO PLAFTORM NOSTUFF ATX CONNECTOR AND DC-DC CONVERTORS A Date: 10-6-2003_14:59 Ver: X.X Rev: X BULK CAPS DISTRIBUTED AROUND BOARD. Sheet Size: B Sheet 4 3 2 49 of Drawn By 52 XXX 1 2 VCC5V C423 0.1UF R295 330 DS8 VTT_DDR U24 1VEF 2IN1 3IN2 4GND VCC8 MODE7 OUT16 OUT25 Silkscreen: "VCC 2.5V" VCC5V RED 2 R249 GRN 4 3 330 R243 1 VCC5V VCC8 MODE7 OUT16 OUT25 VCC5V RED 2 R296 GRN 4 3 330 R281 1 VCC5V C422 0.1UF D 330 MC34161D DS7 VCC5V C400 0.1UF C410 0.1UF 330 MC34161D U28 1VEF 2IN1 3IN2 4GND Silkscreen: "VCC 5.0V" VTT_DDR R246 R242 R248 1.33K VCC5V C401 0.1UF R280 GRN 4 3 330 R283 VCC5V C416 0.1UF 4.42K R298 VCC5V VCC2V5 1.62K VCC2V5 RED 2 1 MC34161D 1.62K R297 D VCC8 MODE7 OUT16 OUT25 VCC5V R240 R282 U29 1VEF 2IN1 3IN2 4GND Silkscreen: "VCC 1.5V" 1.62K VCC5V C417 0.1UF 1 VCC5V 4.75K VCC1V5 154 VCC1V5 3 DS6 34.0K 4 U23 1VEF 2IN1 3IN2 4GND VCC8 MODE7 OUT16 OUT25 Silkscreen: "VTT_DDR" VCC5V RED 2 R247 GRN 4 3 330 R241 1 VCC5V C409 0.1UF 330 MC34161D DS5 C C VCC3_PCI VCC3_PCI 15,16,17,50 MGT_AVCC 2.5V VCC3V3 4 RED 2 R215 GRN 3 330 R197 VCC5V C387 0.1UF C398 0.1UF R212 330 MC34161D VCC5V R194 1 VCC5V DS4 VCC3V3 15,16,17,50 1.33K VCC8 MODE7 OUT16 OUT25 Silkscreen: "VCC 3.0V" 1.62K U18 1VEF 2IN1 3IN2 4GND 1.62K R214 R196 C388 0.1UF 1.96K VCC5V U17 1VEF 2IN1 3IN2 4GND VCC8 MODE7 OUT16 OUT25 Silkscreen: "VCC_MGT1" 1 4 VCC5V RED 2 R213 GRN 3 330 R195 VCC5V C397 0.1UF 330 MC34161D DS3 MGT_VTT 1.8V 4 RED 2 R173 GRN 3 330 R161 VCC5V C359 0.1UF C367 0.1UF 330 MC34161D DS2 "1.5V" "2.5V" "VCC3_PCI" "3.3V" "5V" VCC1V5 VCC2V5 VCC3_PCI VCC3V3 VCC5V VCC5V R158 1 VCC5V 523 VCC8 MODE7 OUT16 OUT25 Silkscreen: "VCC 3.3V" R170 U13 1VEF 2IN1 3IN2 4GND 1.62K R160 R172 2.32K VCC5V C360 0.1UF 1.62K B U12 1VEF 2IN1 3IN2 4GND VCC8 MODE7 OUT16 OUT25 B Silkscreen: "VCC_MGT2" 1 4 VCC5V RED 2 R171 GRN 3 330 R159 VCC5V C366 0.1UF 330 MC34161D DS1 "VTT_DDR" 15,16,17,50 VTT_DDR VCC3V3_ATX VCC12V_N MGT_AVCC TP TP9 TP TP7 SCH P/N ART P/N FAB P/N VCC12V_P 15,16,17,50 MGT_VTT Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A TP TP TP TP TP TP TP TP TP TP17 TP14 TP10 TP8 TP16 TP13 TP20 TP19 TP18 POWER SUPPLY MONITORS AND LEDS A Date: 6-4-2004_13:05 Sheet Size: B Sheet 4 3 2 50 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 Mounting holes for ATX Form Factor D D M5 M16 M18 M28 M12 M11 M14 M25 M13 1 1 1 1 1 1 1 1 1 M4 M7 1 1 M17 M26 M29 1 1 1 M2 1 M3 1 NC NC NC NC NC NC NC M6 M20 M19 M21 M15 M8 M10 M23 1 1 1 1 1 1 1 NC NC NC NC NC 1 NC NC NC M27 C C 1 M24 M22 1 1 NC NC M9 1 NC M1 1 NC B B Spread out on the board. TP22 TP11 TP6 TP15 TP1 TP28 TP21 TP23 TP3 TP5 TP2 TP25 TP24 TP27 TP4 TP26 TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Silkscreen: "GND" SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A ATX MOUNTING HOLES AND TEST POINTS A Date: 1-5-2004_13:05 Sheet Size: B Sheet 4 3 2 51 of Ver: X.X Rev: X Drawn By 52 XXX 1 4 3 2 1 D D VCC12V_P VCC5V R324 2 0 NOSTUFF G S IRFL9110 C FAN_DACOUT TAB 1 Q1 45 4 D 1 R15 1 C 2 2 100K Q2 J8 R325 1 3 B C 3 0 E 2 3904 VCC5V R328 3 FAN_SPD3 R338 J7 R337 45 47.5K VCC12V_N 10.0K 2 4.75K 1 R336 240 R326 2.4K R327 1.00K C433 0.1UF B B SCH P/N ART P/N FAB P/N Title: 0381171-02 0531311-02 1280333-02 ML310 VIRTEX-II PRO PLAFTORM A FPGA FAN SWITCH AND TACH A Date: 6-4-2004_13:06 Sheet Size: B Sheet 4 3 2 52 of Ver: X.X Rev: X Drawn By 52 XXX 1
