PCB ARTWORK SCHEMATICS PCB FABRICATION XILINX PART

4 3 2 Dual PCI Express Slots Dual 64 Bit DDR2 DIMMS Personality Modules Pages 31-32 P53, P54 Pages 25-30 P9, P48 +12V ATX Pages 52 PM1, PM2 1 3.3V ATX 5V ATX Power Supply D Linear 3.0V@500mA max (VCC3_PCI) PCIe controller / switcher 3.3V@3A max Slot A 3.3V@3A max Slot B 3.3V@375mA max Slot A AUX 3.3V@375mA max Slot B AUX Switcher 0.9V@2A max (VTT_DDR2) 0.9V@10mA max (VREF_DDR2) 1.8V@10A max (VCC1V8) 12V@2.1A max Slot A 12V@2.1A max Slot A MII/RGMII/SGMII 10/100/1000 PHY RJ45 Magnetics Page 49 U47 System Clock USER Clock SMA Clock IN/OUT GTP CLK SMA INPUT Pages 22-23 Linear 4.949V@500mA max (AC_AVDD) Linear 3.3V@500mA max (DVI_VCCA) Switcher Module 1.0V@30A max (VCC1V0) SGMII 10/100/1000 PHY RJ45 Magnetics Page 50 U53 Dual UARTs GPIO / LEDs Pages 44, 61 Switcher Module 2.5V@15A max (VCC2V5) DVI Page 53-54 U59, P10 Linear Flash Page 59 U43 C Mictor and CPU Debug Header Page 59 J9, J12, P8 Switcher Module 2.0V@15A max (VCC2V0) DEVICE IIC / SMBus Page 55 DUAL SATA Page 51 J25, J26 IIC Fan Controller Page 66 2 line Character LCD Header Page 62 J13 SystemACE Page 57 U38 PC4 B REFDES ADDR LM87CIMT u20 0x5C RTC-8564JE u22 0xA2 24LC64-I/SN u21 0xA0 87705-1001 p9 0xA6 87705-1001 p48 0xA8 MIC2592B-2BTQ U55 0x8E C Linear 1.2V@4A max(1.0V for FXT) (GTP_AVCC_PLL) Linear 1.2V@4A max (GTP_AVTTRX) Linear 1.0V@4A max (GTP_AVCC) 5V Bridge Page 33 U32 PCI SOUTH BRIDGE DUAL IDE ATA 100 Page 46 Linear 1.2V@4A max (GTP_AVTTTX) IIC Device Addresses Virtex 5 FXT / LXT D XILINX PART NUMBERS B Page 40-43 U15 DUAL DUAL 3.3V 5V PCI PCI Pages 35, 37 PS2 Keybaord & Mouse Page 45 AC97 Audio Pages 47-48 SCHEMATICS 0381255 PCB ARTWORK 0532059 PCB FABRICATION 1280432 NOTE: PLEASE REVIEW THE ML510 BOM FOR ITEMS DESIGNATED AS "DNP". Pages 34, 36 USB Host & Peripheral 1.0 Page 45 DNP ITEMS ARE NOT POPULATED ON THE PCB. THE ML510 BOM CONTAINS THE MOST ACCURATE INFORMATION ABOUT DNP DISCRETES AND COMPONENTS SCH P/N ART P/N FAB P/N JTAG Chain J9 TMS,TCK PC4 A 2 0 1 System ACE CF FPGA U38 u37 TSTTDI CFGTDO Title: TDI TDO TDI 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM TABLE OF CONTENTS XPM Interface 0 1 TSTTDO A CFGTDI 0 R641 Sheet Size: B TDO DNP To debug headers J12, P8 4 3 7-10-2008_10:19 Date: PM2 Sheet R640 2 1 of Ver: C Rev: 01 Drawn By 70 BF 1 4 Page D C B A 3 Title 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 2 Page Block Diagram Page Index FPGA - BANK 0, 1, 2, 3, 4 FPGA - BANK 5,6 FPGA - BANK 11,12 FPGA - BANK 13,15 FPGA - BANK 17,18 FPGA - BANK 19,20 FPGA - BANK 21,23 FPGA - BANK 24,25 FPGA - BANK 26 FPGA - BANK 112, 114, 116 FPGA - BANK 118,120,122 FPGA - BANK 124,126,128 FPGA - BANK 130,132,134 FPGA - VCCAUX, VCCINT, NC FPGA - GND FPGA - BANK 7,8,27,29,31,33,34 FPGA DECOUPLING FPGA DECOUPLING GTP POWER FILTER CLOCKS: USER,MGT,SYSACE SATA AND SGMII CLKS PCIe CLOCKS DDR2 DIMM0 CONNECTOR DIMM0 DDR2 SSTL-2 TERMINATION DIMM0 DDR2 DECOUPLING DDR2 DIMM1 CONNECTOR DIMM1 DDR2 SSTL-2 TERMINATION DIMM1 DDR2 DECOUPLING PCI-E SLOT A PCI-E SLOT B PCI-PCI BRIDGE PCI SLOT 6, 5.0V, SECONDARY BUS PCI SLOT 5, 3.3V, PRIMARY BUS 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 1 Title PCI SLOT 4, 5.0V, SECONDARY BUS PCI SLOT 3, 3.3V, PRIMARY BUS PCI BUS PULLUPS PCI SUPPLY AND TERMINATION PCI SOUTH BRIDGE, PART 1 PCI SOUTH BRIDGE, PART 2-3 PCI SOUTH BRIDGE, PART 4-5 PCI SOUTH BRIDGE, CONFIG, UNUSED RS232 SERIAL PORT INTERFACE KBD/MOUSE AND USB INTERFACES IDE INTERFACES AC97 CODEC AC97 CONNECTORS MII/RGMII/SGMII TRI-MODE ENET PHY SGMII TRI-MODE ETHERNET PHY SATA INTERFACE PERSONALITY MODULE CONNECTORS DVI CODEC DVI VIDEO CONNECTOR I2C AND SPI DEVICES FPGA CONFIG, RESET, AND MISC I/O SYSTEM ACE AND COMPACT FLASH JTAG, DEBUG, TRACE CONNECTORS SYNC. SRAM FLASH SYSMON HEADER / AVDD VREFP SUPPLY DEBUG AND STATUS LEDS ATX AND FRONT PANEL CONNECTORS ATX CONNECTOR, PWR TOGGLE POWER SUPPLY MONITORS AND LEDS ATX MOUNTING HOLES / TEST POINTS FPGA FAN SWITCH AND TACH FPGA CORE AND IO VOLTAGE GTP POWER SUPPLIES DDR2 POWER SUPPLY PCI-E PWR MGMT CONTROLLER D C B Page Index SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM PAGE INDEX A 7-10-2008_10:19 Date: Sheet Size: B Sheet 4 3 2 2 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCC3V3 Changed Bank 0 and SystemACE to 3.3V to accommodate DVI and FLASH U37 60 60 TEST_MON_AVDD TEST_MON_VREFP D Y22AVDD_0 Y21AVSS_0 AB22VREFP_0 AA21VREFN_0 AG30VCCO1_0 AL28VCCO2_0 FF1738 BANK0 CCLK_0AH14 CS_B_0T30 D_IN_0R15 D_OUT_BUSY_0AJ16 DONE_0R14 DXN_0AC21 DXP_0AC22 HSWAPEN_0P15 INIT_B_0T14 M0_0AH29 M1_0AH30 M2_0AJ28 PROGRAM_B_0R29 RSVD0AF30 RDWR_B_0R30 TCK_0AG29 TDI_0AH16 TDO_0AJ15 TMS_0AH15 VBATT_0P30 RSVD1V31 VN_0AB21 VP_0AA22 FPGA_CCLK 56 R476 NC NC VCC2V5 4.75K FPGA_DONE FPGA_DX_N FPGA_DX_P FPGA_HSWAP FPGA_INIT FPGA_MODE_0 FPGA_MODE_1 FPGA_MODE_2 FPGA_PROG_B 56,61 Should be routed 60 differentially 60 39,57,61 56 56 56 56,57 TEST_MON_VN0_N TEST_MON_VP0_P R475 4.75K U37 Series resistors to protect FPGA clamp diodes R474 2 1K 2 52,57 R473 57 52,57 52,57 55 FPGA_TCK FPGA_TDI FPGA_TDO FPGA_TMS FPGA_VBATT D 1 E26VCCO1_3 H27VCCO2_3 1 DNP FF1738 BANK3 60 60 5VLX330TFF1738 C534 0.1UF C IO_L0N_CC_GC_3J15 IO_L0P_CC_GC_3J16 IO_L1N_CC_GC_3L27 IO_L1P_CC_GC_3M26 IO_L2N_GC_VRP_3K17 IO_L2P_GC_VRN_3J17 IO_L3N_GC_3M28 IO_L3P_GC_3M27 IO_L4N_GC_VREF_3M17 IO_L4P_GC_3L17 IO_L5N_GC_3K28 IO_L5P_GC_3L29 IO_L6N_GC_3L15 IO_L6P_GC_3L16 IO_L7N_GC_3J30 IO_L7P_GC_3K29 IO_L8N_GC_3K15 IO_L8P_GC_3L14 IO_L9N_GC_3L30 IO_L9P_GC_3K30 FPGA_CPU_RESET_B 56 ATCB_CLK_R 39 PCIE_SLOTA_PERST_B 31 PHY0_TXCLK 49 PCIE_SLOTA_WAKE_B_R PHY0_RXCLK 49 PCIE_SLOTA_PRSNT2_B_R PM_CLK_TOP 52 SBR_PWG_RSM_RSTJ 42 SYSACE_FPGA_CLK 22 SBR_INTR_R R611 PCIE_SLOTA_WAKE_B 100 R612 PCIE_SLOTA_PRSNT2_B 31 31 100 R613 USER_CLKSYS 22 PCIE_SLOTB_PERST_B 32 PCI_P_CLK5 39 PCIE_SLOTB_WAKE_B_R USER_CLK2 22 PCIE_SLOTB_PRSNT2_B_R PM_CLK_BOT 52 USER_SMA_CLK_N 22 USER_SMA_CLK_P 22 SBR_INTR 40 100 R616 PCIE_SLOTB_WAKE_B 100 R618 PCIE_SLOTB_PRSNT2_B 32 32 100 C VCC3V3 5VLX330TFF1738 U37 VCC3V3 F13VCCO1_1 J14VCCO2_1 B FF1738 BANK1 FLASH_A18 FLASH_A19 FLASH_A16 FLASH_A17 FLASH_A14 FLASH_A15 FLASH_A12 FLASH_A13 FLASH_A10 FLASH_A11 FLASH_A8 FLASH_A9 FLASH_A6 FLASH_A7 FLASH_A4 FLASH_A5 FLASH_A2 FLASH_A3 FLASH_A0 FLASH_A1 IO_L0N_A18_1P25 IO_L0P_A19_1N25 IO_L1N_A16_1P17 IO_L1P_A17_1P18 IO_L2N_A14_D30_1N26 IO_L2P_A15_D31_1P26 IO_L3N_A12_D28_1N16 IO_L3P_A13_D29_1M16 IO_L4N_VREF_A10_D26_1P28 IO_L4P_A11_D27_1P27 IO_L5N_A8_D24_1N14 IO_L5P_A9_D25_1N15 IO_L6N_A6_D22_1N29 IO_L6P_A7_D23_1N28 IO_L7N_A4_D20_1M13 IO_L7P_A5_D21_1M14 IO_L8N_CC_A2_D18_1M29 IO_L8P_CC_A3_D19_1N30 IO_L9N_CC_A0_D16_1P13 IO_L9P_CC_A1_D17_1N13 59 59 59 59 59 59 59 59 59 59 59 59 59 59 59 59 59 59 59 59 U37 AR16VCCO1_4 AT13VCCO2_4 FF1738 BANK4 VCC3V3 5VLX330TFF1738 FLASH_D14 FLASH_D15 FLASH_D12 FLASH_D13 FLASH_D10 FLASH_D11 FLASH_D8 FLASH_D9 FLASH_CLK DVI_H DVI_V DVI_D8 DVI_D6 DVI_D7 DVI_D4 DVI_D5 DVI_D2 DVI_D3 DVI_D0 DVI_D1 IO_L0N_GC_D14_4AP30 IO_L0P_GC_D15_4AN30 IO_L1N_GC_D12_4AL17 IO_L1P_GC_D13_4AK17 IO_L2N_GC_D10_4AP28 IO_L2P_GC_D11_4AN29 IO_L3N_GC_D8_4AL16 IO_L3P_GC_D9_4AL15 IO_L4N_GC_VREF_4AN28 IO_L4P_GC_4AP27 IO_L5N_GC_4AM17 IO_L5P_GC_4AM16 IO_L6N_GC_4AM26 IO_L6P_GC_4AM27 IO_L7N_GC_VRP_4AN16 IO_L7P_GC_VRN_4AN15 IO_L8N_CC_GC_4AL26 IO_L8P_CC_GC_4AL27 IO_L9N_CC_GC_4AP15 IO_L9P_CC_GC_4AP16 59 59 59 59 59 59 59 59 59 53 53 53 53 53 53 53 53 53 53 53 B U37 5VLX330TFF1738 AR26VCCO1_2 AV27VCCO2_2 A FF1738 BANK2 IO_L0N_CC_RS0_2AK13 IO_L0P_CC_RS1_2AK12 IO_L1N_CC_A24_2AK30 IO_L1P_CC_A25_2AJ30 IO_L2N_A22_2AK14 IO_L2P_A23_2AK15 IO_L3N_A20_2AM29 IO_L3P_A21_2AL30 IO_L4N_VREF_FOE_B_MOSI_2AM13 IO_L4P_FCS_B_2AL14 IO_L5N_CSO_B_2AL29 IO_L5P_FWE_B_2AM28 IO_L6N_D6_2AP13 IO_L6P_D7_2AN13 IO_L7N_D4_2AK29 IO_L7P_D5_2AK28 IO_L8N_D2_FS2_2AM14 IO_L8P_D3_2AN14 IO_L9N_D0_FS0_2AJ26 IO_L9P_D1_FS1_2AK27 SYSACE_FLASH_CFGA0 SYSACE_FLASH_CFGA1 DVI_D11 DVI_D10 FPGA_A22 DVI_D9 FLASH_A20 FLASH_A21 FLASH_OE_B FLASH_CE_B FLASH_ADV_B FLASH_WE_B FLASH_D6 FLASH_D7 FLASH_D4 FLASH_D5 FLASH_D2 FLASH_D3 FLASH_D0 FLASH_D1 56,57,62 56,57,62 53 53 56 53 59 59 59 59 59 59 59 59 59 59 59 59 59 59 FPGA - BANK 0, 1, 2, 3, 4 SCH P/N ART P/N FAB P/N Title: A Date: 8-1-2008_14:59 Sheet Size: B 5VLX330TFF1738 3 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM FPGA - BANK 0, 1, 2, 3, 4 - CONFIG, MISC, FLASH, CLOCKS, DVI Sheet 4 0381255 0532059 1280432 2 3 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 D D VCC2V5 VCC2V5 U37 U37 B25VCCO1_5 C22VCCO2_5 F23VCCO3_5 C B FF1738 BANK5 PM_IO_1_N IO_L0N_5M24 52 PM_IO_0_P IO_L0P_5L24 52 PM_IO_21_N IO_L10N_CC_5K19 52 PM_IO_20_P IO_L10P_CC_5K18 52 L26 PM_IO_23_N IO_L11N_CC_5 52 K27 PM_IO_22_P IO_L11P_CC_5 52 VRP_BANK5 IO_L12N_VRP_5P20 IO_L12P_VRN_5N20 VRN_BANK5 PM_IO_25_N IO_L13N_5F27 52 PM_IO_24_P IO_L13P_5G27 52 PM_IO_27_N N19 IO_L14N_VREF_5 52 M19 PM_IO_26_P IO_L14P_5 52 PM_IO_29_N IO_L15N_5H28 52 PM_IO_28_P IO_L15P_5G28 52 N18 PM_IO_31_N IO_L16N_5 52 PM_IO_30_P IO_L16P_5M18 52 PM_IO_33_N F29 IO_L17N_5 52 PM_IO_32_P IO_L17P_5G29 52 PM_IO_35_N IO_L18N_5L19 52 PM_IO_34_P IO_L18P_5L20 52 PM_IO_37_N_J IO_L19N_5H30 52 H29 PM_IO_36_P_J IO_L19P_5 52 PM_IO_3_N IO_L1N_5E17 52 PM_IO_2_P IO_L1P_5E18 52 PM_IO_5_N IO_L2N_5L25 52 PM_IO_4_P K24 IO_L2P_5 52 PM_IO_7_N F17 IO_L3N_5 52 PM_IO_6_P IO_L3P_5F16 52 PM_IO_9_N IO_L4N_VREF_5J25 52 PM_IO_8_P IO_L4P_5K25 52 PM_IO_11_N IO_L5N_5H16 52 G16 PM_IO_10_P IO_L5P_5 52 PM_IO_13_N IO_L6N_5J26 52 PM_IO_12_P IO_L6P_5H26 52 PM_IO_15_N G17 IO_L7N_5 52 PM_IO_14_P IO_L7P_5G18 52 PM_IO_17_N J27 IO_L8N_CC_5 52 PM_IO_16_P IO_L8P_CC_5J28 52 PM_IO_19_N IO_L9N_CC_5H18 52 PM_IO_18_P IO_L9P_CC_5J18 52 AT23VCCO1_6 AW24VCCO2_6 AY21VCCO3_6 VCC2V5 R188 R187 49.9 49.9 5VLX330TFF1738 FF1738 BANK6 IO_L0N_6AR28 IO_L0P_6AR29 IO_L10N_CC_6AM18 IO_L10P_CC_6AN18 IO_L11N_CC_6AP26 IO_L11P_CC_6AN26 IO_L12N_VRP_6AP18 IO_L12P_VRN_6AR18 IO_L13N_6AP25 IO_L13P_6AN25 IO_L14N_VREF_6AR19 IO_L14P_6AT19 IO_L15N_6AN24 IO_L15P_6AM24 IO_L16N_6AK19 IO_L16P_6AK18 IO_L17N_6AK25 IO_L17P_6AK24 IO_L18N_6AL19 IO_L18P_6AM19 IO_L19N_6AL24 IO_L19P_6AL25 IO_L1N_6AR14 IO_L1P_6AT14 IO_L2N_6AT30 IO_L2P_6AR30 IO_L3N_6AR15 IO_L3P_6AT15 IO_L4N_VREF_6AU29 IO_L4P_6AT29 IO_L5N_6AT16 IO_L5P_6AT17 IO_L6N_6AT27 IO_L6P_6AU28 IO_L7N_6AR17 IO_L7P_6AP17 IO_L8N_CC_6AR27 IO_L8P_CC_6AT26 IO_L9N_CC_6AN19 IO_L9P_CC_6AN20 CPU_TDO_TMP 58 CPU_HALT_B 58 TRC_BS1_BR1 58 TRC_BS2_BR2 58 ATD_0 58 TRC_BS0_BR0 58 VRP_BANK6 VRN_BANK6 ATD_2 58 ATD_1 58 SBR_IDE_RST_B 46 ATD_3 58 IIC_THERM_B 42,55 ATD_4 58 IIC_RESET_B 55 IIC_ALERT_B 42,55 IIC_IRQ_B 55 PLB_BUS_ERROR 61 OPB_BUS_ERROR 61 FPGA_LED_USER1 62 FPGA_LED_USER2 62 PHY1_RESET_SGMII 50 CPU_TMS 58 CPU_TCK 58 CPU_TRST_B 58 CPU_TDI 58 TRC_ES4 58 TRC_ES2 58 SBR_NMI_R TRC_TS0 58 TRC_TS2 58 TRC_TS1 58 TRC_TS4 58 TRC_TS3 58 TRC_TS6 58 TRC_TS5 58 TRC_CLK_R 39 TRC_ES3 58 TRC_ES0 58 TRC_ES1 58 VCC2V5 R147 R144 49.9 49.9 C Series resistor to protect FPGA clamp diode R619 SBR_NMI 40 100 B 5VLX330TFF1738 FPGA - BANK 5,6 SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A FPGA - BANK 5,6 - PM, DEBUG A Date: 8-1-2008_15:03 Sheet Size: B Sheet 4 3 2 4 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 D D 5 VCCO_12 U37 VCC1V8 AA8VCCO1_12 U10VCCO2_12 V7VCCO3_12 VREF_DDR2 FF1738 BANK12 6,7,8,9,25,27,28,30,69 U37 AA38VCCO1_11 V37VCCO2_11 Y41VCCO_11 P40 FF1738 IO_L15N_SM13N_11 IO_L15P_SM13P_11AA42 Y38 BANK11 IO_L10N_CC_SM15N_11 IO_L10P_CC_SM15P_11Y39 IO_L7N_11V41 IO_L7P_11V40 IO_L4P_11W41 IO_L3N_11Y42 IO_L19N_SM9N_11G41 IO_L3P_11F41 IO_L14N_VREF_11T41 IO_L2N_11W42 IO_L1P_11G42 IO_L1N_11F42 IO_L11N_CC_SM14N_11H41 IO_L2P_11J42 IO_L12N_VRP_11L42 IO_L11P_CC_SM14P_11M42 IO_L12P_VRN_11M41 IO_L14P_11K42 IO_L5N_11R40 IO_L0P_11J41 IO_L13N_11T42 IO_L13P_11U41 IO_L19P_SM9P_11T40 IO_L16N_SM12N_11U42 IO_L18P_SM10P_11R42 IO_L16P_SM12P_11P41 IO_L4N_VREF_11L41 IO_L5P_11P42 IO_L18N_SM10N_11AA41 IO_L17N_SM11N_11L40 IO_L6N_11N41 IO_L17P_SM11P_11N40 IO_L0N_11AA37 IO_L6P_11Y37 IO_L8N_CC_11Y40 IO_L8P_CC_11W40 IO_L9N_CC_11AA39 IO_L9P_CC_11AA40 C B DIMM0_DDR2_A1 DIMM0_DDR2_A0 DIMM1_DDR2_PLL_CLKIN_N DIMM1_DDR2_PLL_CLKIN_P DIMM1_DDR2_RAS_B DIMM1_DDR2_WE_B DIMM1_DDR2_A13 DIMM1_DDR2_CAS_B DIMM1_DDR2_A11 DIMM1_DDR2_A12 DIMM1_DDR2_A10 DIMM1_DDR2_A8 DIMM1_DDR2_A9 DIMM1_DDR2_A6 DIMM1_DDR2_A7 DIMM1_DDR2_A4 DIMM1_DDR2_A5 DIMM1_DDR2_A2 DIMM1_DDR2_A3 DIMM1_DDR2_A0 DIMM1_DDR2_A1 DIMM0_DDR2_A3 DIMM0_DDR2_A2 DIMM0_DDR2_A5 DIMM0_DDR2_A4 DIMM0_DDR2_A7 DIMM0_DDR2_A6 25,26 25,26 29 29 28,29 28,29 28,29 28,29 28,29 28,29 28,29 28,29 28,29 28,29 28,29 28,29 28,29 28,29 28,29 28,29 28,29 25,26 25,26 25,26 25,26 25,26 25,26 DIMM0_DDR2_A8 DIMM0_DDR2_A10 DIMM0_DDR2_A9 DIMM0_DDR2_A12 DIMM0_DDR2_A11 DIMM0_DDR2_CAS_B DIMM0_DDR2_A13 DIMM0_DDR2_WE_B DIMM0_DDR2_RAS_B DIMM0_DDR2_PLL_CLKIN_N DIMM0_DDR2_PLL_CLKIN_P 25,26 25,26 25,26 25,26 25,26 25,26 25,26 25,26 25,26 26 26 IO_L0N_12AA6 IO_L0P_12AA7 IO_L10N_CC_12N6 IO_L10P_CC_12N5 IO_L11N_CC_12U6 IO_L11P_CC_12U7 IO_L12N_VRP_12P6 IO_L12P_VRN_12P5 IO_L13N_12T6 IO_L13P_12T7 IO_L14N_VREF_12R5 IO_L14P_12R4 IO_L15N_12T4 IO_L15P_12T5 IO_L16N_12AA10 IO_L16P_12AA11 IO_L17N_12Y10 IO_L17P_12AA9 IO_L18N_12W10 IO_L18P_12W11 IO_L19N_12Y8 IO_L19P_12Y9 IO_L1N_12H5 IO_L1P_12G6 IO_L2N_12W6 IO_L2P_12W5 IO_L3N_12J5 IO_L3P_12H6 IO_L4N_VREF_12W7 IO_L4P_12Y7 IO_L5N_12K5 IO_L5P_12J6 IO_L6N_12V8 IO_L6P_12W8 IO_L7N_12L5 IO_L7P_12K4 IO_L8N_CC_12V6 IO_L8P_CC_12V5 IO_L9N_CC_12M6 IO_L9P_CC_12L6 PM_IO_3V_10_N PM_IO_3V_4_P PM_IO_3V_17_N PM_IO_3V_5_P PM_IO_3V_9_N PM_IO_3V_13_P VRP_BANK12 VRN_BANK12 PM_IO_3V_19_N PM_IO_3V_24_P FPGA_LCD_DB1 FPGA_LCD_DB0 FPGA_LCD_DB3 FPGA_LCD_DB2 FPGA_LCD_DB5 FPGA_LCD_DB4 FPGA_LCD_DB7 FPGA_LCD_DB6 FPGA_LCD_E FLASH_WAIT FPGA_LCD_RS FPGA_LCD_RW PM_IO_3V_21_N PM_IO_3V_20_P PM_IO_3V_15_N PM_IO_3V_0_P PM_IO_3V_8_N PM_IO_3V_6_P PM_IO_3V_23_N PM_IO_3V_11_P PM_IO_3V_2_N PM_IO_3V_14_P PM_IO_3V_16_N PM_IO_3V_12_P PM_IO_3V_1_N PM_IO_3V_3_P PM_IO_3V_25_N PM_IO_3V_18_P PM_IO_3V_7_N PM_IO_3V_22_P 52 52 52 52 52 52 R179 R166 52 52 49.9 62 62 62 62 62 62 62 62 61,62 59 61 61,62 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 VCCO_12 49.9 5 C 5VLX330TFF1738 B VCC3_PCI R486 5VLX330TFF1738 VCC3_PCI VCCO_12 5 0 R487 VCCO_12 5 0 VCC3_PCI R488 VCCO_12 5 0 VCC2V5 R491 VCC2V5 VCC2V5 A 0-DNP R490 FPGA - BANK 11,12 VCCO_12 VCCO_12 SCH P/N ART P/N FAB P/N 5 0381255 0532059 1280432 5 Title: 0-DNP SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM FPGA - BANK 11,12 DDR2, PM, LCD R489 VCCO_12 A 5 Date: 0-DNP 8-1-2008_15:03 Sheet Size: B Sheet 4 3 2 5 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 D D VREF_DDR2 VREF_DDR2 5,6,7,8,9,25,27,28,30,69 5,6,7,8,9,25,27,28,30,69 VCC1V8 VCC1V8 U37 AB35VCCO1_13 AD39VCCO2_13 AE36VCCO3_13 C B FF1738 BANK13 U37 IO_L2N_SM6N_13AB37 DIMM1_DDR2_DQ1 28 IO_L2P_SM6P_13AB38 DIMM1_DDR2_DQ0 28 AD40 DIMM1_DDR2_DQS1_N IO_L10N_CC_13 28 IO_L10P_CC_13AE40 DIMM1_DDR2_DQS1_P 28 IO_L11N_CC_13AC39 DIMM1_DDR2_DQS2_N 28 AC40 DIMM1_DDR2_DQS2_P IO_L11P_CC_13 28 IO_L12N_VRP_13AL40 VRP_BANK13 AK40 VRN_BANK13 IO_L12P_VRN_13 IO_L16P_13AH41 DIMM1_DDR2_DQM1 28 IO_L8P_CC_SM1P_13AC41 DIMM1_DDR2_DQM0 28 AM42 IO_L14N_VREF_13 AP41 DIMM1_DDR2_DQM2 IO_L16N_13 28 IO_L18P_13AU41 DIMM1_DDR2_CKE0 28,29 IO_L18N_13AV41 DIMM1_DDR2_ODT0 28,29 IO_L14P_13AL42 DIMM1_DDR2_DQ17 28 IO_L17P_13AK42 DIMM1_DDR2_DQ16 28 AR42 DIMM1_DDR2_DQ19 IO_L19P_13 28 AP42 DIMM1_DDR2_DQ18 IO_L17N_13 28 IO_L15N_13AM41 DIMM1_DDR2_DQ21 28 IO_L19N_13AN41 DIMM1_DDR2_DQ20 28 IO_L15P_13AT41 DIMM1_DDR2_DQ23 28 AT42 DIMM1_DDR2_DQ22 IO_L8N_CC_SM1N_13 28 AD41 DIMM1_DDR2_DQ3 IO_L1P_SM7P_13 28 IO_L13P_13AD42 DIMM1_DDR2_DQ2 28 IO_L1N_SM7N_13AB42 DIMM1_DDR2_DQ5 28 AB41 DIMM1_DDR2_DQ4 IO_L4P_13 28 IO_L5P_SM4P_13AF41 DIMM1_DDR2_DQ7 28 AF40 DIMM1_DDR2_DQ6 IO_L3N_SM5N_13 28 IO_L4N_VREF_13AG41 IO_L3P_SM5P_13AE42 DIMM1_DDR2_DQ8 28 IO_L13N_13AJ41 DIMM1_DDR2_DQ10 28 AF42 DIMM1_DDR2_DQ9 IO_L6N_SM3N_13 28 IO_L5N_SM4N_13AG42 DIMM1_DDR2_DQ12 28 IO_L7N_SM2N_13AJ40 DIMM1_DDR2_DQ11 28 IO_L6P_SM3P_13AJ42 DIMM1_DDR2_DQ14 28 AH40 DIMM1_DDR2_DQ13 IO_L7P_SM2P_13 28 DIMM1_DDR2_S0_B IO_L0P_SM8P_13AU42 28,29 AL41 DIMM1_DDR2_DQ15 IO_L0N_SM8N_13 28 IO_L9N_CC_SM0N_13AC38 DIMM1_DDR2_DQS0_N 28 IO_L9P_CC_SM0P_13AB39 DIMM1_DDR2_DQS0_P 28 P39VCCO1_15 R36VCCO2_15 U40VCCO3_15 FF1738 BANK15 VCC1V8 R156 R152 49.9 49.9 5VLX330TFF1738 IO_L19N_15P38 DIMM0_DDR2_DQ49 25 IO_L17N_15U38 DIMM0_DDR2_DQ48 25 IO_L10N_CC_15J40 DIMM0_DDR2_DQS8_N 25 IO_L10P_CC_15H40 DIMM0_DDR2_DQS8_P 25 IO_L15N_15W35 DIMM0_DDR2_DQ63 25 IO_L17P_15N39 DIMM0_DDR2_BA0 25,26 U37 VRP_BANK15 IO_L12N_VRP_15 IO_L12P_VRN_15V38 VRN_BANK15 IO_L0P_15W36 DIMM0_DDR2_DQM7 25 IO_L7P_15T39 DIMM0_DDR2_DQM6 25 U39 IO_L14N_VREF_15 G39 DIMM0_DDR2_DQM8 IO_L13P_15 25 IO_L1N_15K39 DIMM0_DDR2_BA2 25,26 IO_L3N_15M39 DIMM0_DDR2_BA1 25,26 IO_L5P_15F39 DIMM0_DDR2_CB1 25 IO_L4P_15F40 DIMM0_DDR2_CB0 25 H38 DIMM0_DDR2_CB3 IO_L6P_15 25 IO_L5N_15K40 DIMM0_DDR2_CB2 25 IO_L11N_CC_15E39 DIMM0_DDR2_CB5 25 IO_L1P_15E40 DIMM0_DDR2_CB4 25 H39 DIMM0_DDR2_CB7 IO_L7N_15 25 G38 DIMM0_DDR2_CB6 IO_L13N_15 25 IO_L14P_15W38 DIMM0_DDR2_DQ51 25 IO_L19P_15Y35 DIMM0_DDR2_DQ50 25 IO_L16P_15R39 DIMM0_DDR2_DQ53 25 IO_L16N_15N38 DIMM0_DDR2_DQ52 25 V39 DIMM0_DDR2_DQ55 IO_L18P_15 25 IO_L18N_15R37 DIMM0_DDR2_DQ54 25 IO_L4N_VREF_15R38 IO_L2N_15AA35 DIMM0_DDR2_DQ56 25 IO_L6N_15AA34 DIMM0_DDR2_DQ58 25 AA36 DIMM0_DDR2_DQ57 IO_L3P_15 25 IO_L2P_15P37 DIMM0_DDR2_DQ60 25 IO_L0N_15Y34 DIMM0_DDR2_DQ59 25 IO_L15P_15W37 DIMM0_DDR2_DQ62 25 T37 DIMM0_DDR2_DQ61 IO_L11P_CC_15 25 L39 DIMM0_DDR2_DQS6_N IO_L8N_CC_15 25 IO_L8P_CC_15M38 DIMM0_DDR2_DQS6_P 25 IO_L9N_CC_15J38 DIMM0_DDR2_DQS7_N 25 IO_L9P_CC_15K38 DIMM0_DDR2_DQS7_P 25 VCC1V8 R143 R41 C 49.9 49.9 B 5VLX330TFF1738 FPGA - BANK 13,15 SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A FPGA - BANK 13,15 - DDR2 A 8-1-2008_15:03 Date: Sheet Size: B Sheet 4 3 2 6 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 D D VCC2V5 VCC1V8 VREF_DDR2 5,6,8,9,25,27,28,30,69 U37 AG40VCCO1_17 AH37VCCO2_17 AK41VCCO3_17 C B FF1738 BANK17 IO_L0N_17AC34 IO_L2P_17AB36 IO_L10N_CC_17AU39 IO_L10P_CC_17AV40 IO_L11N_CC_17AR39 IO_L11P_CC_17AT39 IO_L12N_VRP_17AH39 IO_L12P_VRN_17AG39 IO_L7N_17AG37 IO_L4P_17AC36 IO_L14N_VREF_17AK37 IO_L18N_17AN40 IO_L5P_17AE39 IO_L8P_CC_17AF37 IO_L6P_17AP40 IO_L18P_17AM38 IO_L17N_17AP38 IO_L19N_17AM37 IO_L16P_17AK38 IO_L19P_17AL39 IO_L5N_17AN39 IO_L17P_17AN38 IO_L0P_17AE38 IO_L2N_17AD36 IO_L3P_17AC35 IO_L13P_17AB34 IO_L3N_17AD37 IO_L1P_17AD35 IO_L4N_VREF_17AD38 IO_L8N_CC_17AJ38 IO_L1N_17AL37 IO_L15N_17AH38 IO_L7P_17AF39 IO_L6N_17AM39 IO_L15P_17AK39 IO_L13N_17AG38 IO_L16N_17AE37 IO_L14P_17AJ37 IO_L9N_CC_17AT40 IO_L9P_CC_17AR40 U37 DIMM1_DDR2_DQ25 DIMM1_DDR2_DQ24 DIMM1_DDR2_DQS4_N DIMM1_DDR2_DQS4_P DIMM1_DDR2_DQS5_N DIMM1_DDR2_DQS5_P VRP_BANK17 VRN_BANK17 DIMM1_DDR2_DQM4 DIMM1_DDR2_DQM3 DIMM1_DDR2_DQM5 DIMM1_DDR2_CKE1 DIMM1_DDR2_ODT1 DIMM1_DDR2_DQ41 DIMM1_DDR2_DQ40 DIMM1_DDR2_DQ43 DIMM1_DDR2_DQ42 DIMM1_DDR2_DQ45 DIMM1_DDR2_DQ44 DIMM1_DDR2_DQ47 DIMM1_DDR2_DQ46 DIMM1_DDR2_DQ27 DIMM1_DDR2_DQ26 DIMM1_DDR2_DQ29 DIMM1_DDR2_DQ28 DIMM1_DDR2_DQ31 DIMM1_DDR2_DQ30 28 28 28 28 28 28 AD9VCCO1_18 AE6VCCO2_18 AG10VCCO3_18 FF1738 BANK18 VCC1V8 R244 R206 28 28 49.9 49.9 28 28,29 28,29 28 28 28 28 28 28 28 28 28 28 28 28 28 28 DIMM1_DDR2_DQ32 28 DIMM1_DDR2_DQ34 28 DIMM1_DDR2_DQ33 28 DIMM1_DDR2_DQ36 28 DIMM1_DDR2_DQ35 28 DIMM1_DDR2_DQ38 28 DIMM1_DDR2_DQ37 28 DIMM1_DDR2_S1_B 28,29 DIMM1_DDR2_DQ39 28 DIMM1_DDR2_DQS3_N 28 DIMM1_DDR2_DQS3_P 28 5VLX330TFF1738 IO_L0N_18AK7 IO_L0P_18AJ7 IO_L10N_CC_18AC6 IO_L10P_CC_18AC5 IO_L11N_CC_18AF6 IO_L11P_CC_18AF5 IO_L12N_VRP_18AD7 IO_L12P_VRN_18AD6 IO_L13N_18AG7 IO_L13P_18AG6 IO_L14N_VREF_18AD5 IO_L14P_18AE5 IO_L15N_18AE7 IO_L15P_18AF7 IO_L16N_18AE8 IO_L16P_18AD8 IO_L17N_18AF10 IO_L17P_18AF9 IO_L18N_18AE10 IO_L18P_18AE9 IO_L19N_18AF12 IO_L19P_18AF11 IO_L1N_18AC10 IO_L1P_18AB11 IO_L2N_18AK5 IO_L2P_18AL5 IO_L3N_18AB8 IO_L3P_18AB9 IO_L4N_VREF_18AJ5 IO_L4P_18AJ6 IO_L5N_18AC9 IO_L5P_18AC8 IO_L6N_18AH5 IO_L6P_18AH6 IO_L7N_18AD11 IO_L7P_18AD10 IO_L8N_CC_18AH4 IO_L8P_CC_18AG4 IO_L9N_CC_18AB6 IO_L9P_CC_18AB7 PM_IO_39_N 52 PM_IO_38_P 52 PM_IO_59_N 52 PM_IO_58_P 52 PM_IO_61_N 52 PM_IO_60_P 52 VRP_BANK18 VRN_BANK18 PM_IO_63_N 52 PM_IO_62_P 52 PM_IO_65_N 52 PM_IO_64_P 52 PM_IO_67_N 52 PM_IO_66_P 52 PM_IO_69_N 52 PM_IO_68_P 52 PM_IO_71_N 52 PM_IO_70_P 52 PM_IO_73_N 52 PM_IO_72_P 52 PM_IO_75_N 52 PM_IO_74_P 52 PM_IO_41_N 52 PM_IO_40_P 52 PM_IO_43_N 52 PM_IO_42_P 52 PM_IO_45_N 52 PM_IO_44_P 52 PM_IO_47_N_J 52 PM_IO_46_P_J 52 PM_IO_49_N 52 PM_IO_48_P 52 PM_IO_51_N 52 PM_IO_50_P 52 PM_IO_53_N 52 PM_IO_52_P 52 PM_IO_55_N 52 PM_IO_54_P 52 PM_IO_57_N 52 PM_IO_56_P 52 VCC2V5 R199 R198 49.9 49.9 C B 5VLX330TFF1738 FPGA - BANK 17,18 SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A FPGA - BANK 17,18 - DDR2, PM A Date: 8-1-2008_15:03 Sheet Size: B Sheet 4 3 2 7 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 IIC_SCL 27,30,39,42,52,55,62,70 R185 IIC_SCL_DVI 8,53,54 0-DNP D IIC_SDA 27,30,39,42,52,55,62,70 D R186 IIC_SDA_DVI 8,53,54 0-DNP VCC1V8 VCC3_PCI VREF_DDR2 5,6,7,9,25,27,28,30,69 U37 G40VCCO1_19 K41VCCO2_19 L38VCCO3_19 C B FF1738 BANK19 U37 IO_L8P_CC_19G36 DIMM0_DDR2_DQ25 25 IO_L18P_19F37 DIMM0_DDR2_DQ24 25 IO_L10N_CC_19T36 DIMM0_DDR2_DQS4_N 25 R35 DIMM0_DDR2_DQS4_P IO_L10P_CC_19 25 DIMM0_DDR2_DQS5_N V36 IO_L11N_CC_19 25 IO_L11P_CC_19U36 DIMM0_DDR2_DQS5_P 25 IO_L12N_VRP_19G37 VRP_BANK19 IO_L12P_VRN_19H36 VRN_BANK19 IO_L0N_19M36 DIMM0_DDR2_DQM4 25 IO_L13P_19F36 DIMM0_DDR2_DQM3 25 IO_L14N_VREF_19E37 IO_L0P_19V35 DIMM0_DDR2_DQM5 25 IO_L2P_19L37 DIMM0_DDR2_CKE1 25,26 K35 DIMM0_DDR2_ODT1 IO_L2N_19 25,26 IO_L5N_19W32 DIMM0_DDR2_DQ41 25 IO_L14P_19V33 DIMM0_DDR2_DQ40 25 IO_L19N_19AA32 DIMM0_DDR2_DQ43 25 IO_L16P_19Y32 DIMM0_DDR2_DQ42 25 T35 DIMM0_DDR2_DQ45 IO_L16N_19 25 R34 DIMM0_DDR2_DQ44 IO_L19P_19 25 IO_L17N_19W33 DIMM0_DDR2_DQ47 25 IO_L17P_19Y33 DIMM0_DDR2_DQ46 25 IO_L13N_19K37 DIMM0_DDR2_DQ27 25 J36 DIMM0_DDR2_DQ26 IO_L4P_19 25 E38 DIMM0_DDR2_DQ29 IO_L8N_CC_19 25 IO_L15N_19D37 DIMM0_DDR2_DQ28 25 IO_L5P_19J37 DIMM0_DDR2_DQ31 25 IO_L7N_19H35 DIMM0_DDR2_DQ30 25 L35 IO_L4N_VREF_19 N35 DIMM0_DDR2_DQ32 IO_L7P_19 25 IO_L6N_19V34 DIMM0_DDR2_DQ34 25 IO_L15P_19P36 DIMM0_DDR2_DQ33 25 IO_L1P_19J35 DIMM0_DDR2_DQ36 25 U34 DIMM0_DDR2_DQ35 IO_L3P_19 25 N36 DIMM0_DDR2_DQ38 IO_L3N_19 25 DIMM0_DDR2_DQ37 IO_L1N_19L36 DIMM0_DDR2_S1_B 25 IO_L18N_19M37 25,26 IO_L6P_19P35 DIMM0_DDR2_DQ39 25 IO_L9N_CC_19U33 DIMM0_DDR2_DQS3_N 25 T34 DIMM0_DDR2_DQS3_P IO_L9P_CC_19 25 L8VCCO1_20 P9VCCO2_20 R6VCCO3_20 VCC1V8 R277 R257 49.9 49.9 5VLX330TFF1738 FF1738 BANK20 IO_L0N_20N8 IO_L0P_20N9 IO_L10N_CC_20G8 IO_L10P_CC_20G7 IO_L11N_CC_20U9 IO_L11P_CC_20U8 IO_L12N_VRP_20H9 IO_L12P_VRN_20H8 IO_L13N_20T11 IO_L13P_20T10 IO_L14N_VREF_20J7 IO_L14P_20J8 IO_L15N_20V11 IO_L15P_20U11 IO_L16N_20K9 IO_L16P_20K8 IO_L17N_20L7 IO_L17P_20K7 IO_L18N_20M8 IO_L18P_20M7 IO_L19N_20L9 IO_L19P_20M9 IO_L1N_20E8 IO_L1P_20E9 IO_L2N_20P8 IO_L2P_20P7 IO_L3N_20E7 IO_L3P_20D7 IO_L4N_VREF_20R8 IO_L4P_20R7 IO_L5N_20F6 IO_L5P_20F7 IO_L6N_20T9 IO_L6P_20R9 IO_L7N_20F5 IO_L7P_20E5 IO_L8N_CC_20V10 IO_L8P_CC_20V9 IO_L9N_CC_20G9 IO_L9P_CC_20F9 PCI_P_CBE1_B 33,35,37,40 PCI_P_CBE2_B 33,35,37,40 PCI_P_SERR_B 33,35,37,38,40 PCI_P_PERR_B 33,35,37,38 PCI_P_CLK1_R 39 PCI_P_CLK0_R 39 UART0_TXD 44 UART0_CTS_B 44 UART0_RXD 44 UART1_TXD 44 UART0_RTS_B 44 UART1_CTS_B 44 UART1_RXD 44 PCI_P_CLK4_R 39 UART1_RTS_B 44 FPGA_SDA 39 FPGA_SCL 39 FLASH_RESET_B 59 DVI_DE 53 IIC_SDA_DVI 8,53,54 IIC_SCL_DVI 8,53,54 PCI_P_CLK3_R 39 PCI_P_PAR 33,35,37,40 PCI_P_CBE0_B 33,35,37,40 PCI_P_IRDY_B 33,35,37,38,40 PCI_P_FRAME_B 33,35,37,38,40 PCI_P_REQ0_B 35,38 PCI_P_REQ2_B 38 PCI_P_REQ1_B 37,38 PCI_P_REQ4_B 33,38 PCI_P_REQ3_B 38,40,43 PCI_P_GNT1_B 37,38 PCI_P_GNT0_B 35,38 PCI_P_GNT3_B 38,40 PCI_P_GNT2_B 38 PCI_P_GNT4_B 33,38 PCI_P_TRDY_B 33,35,37,38,40 PCI_P_CLK5_R 39 PCI_P_STOP_B 33,35,37,38,40 PCI_P_DEVSEL_B 33,35,37,38,40 C B 5VLX330TFF1738 FPGA - BANK 19,20 SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A FPGA - BANK 19,20 DDR2, PCI, IIC, UART A 8-1-2008_15:03 Date: Sheet Size: B Sheet 4 3 2 8 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 D D VCC1V8 VCC1V8 VREF_DDR2 5,6,7,8,9,25,27,28,30,69 VREF_DDR2 5,6,7,8,9,25,27,28,30,69 U37 Thick Trace AJ34VCCO1_21 AL38VCCO2_21 AM35VCCO3_21 C B U37 FF1738 BANK21 IO_L18P_21AM36 IO_L16P_21AL35 IO_L10N_CC_21AG34 IO_L10P_CC_21AH34 IO_L17P_21AN34 IO_L15N_21AJ35 IO_L12N_VRP_21AP36 IO_L12P_VRN_21AP37 IO_L6N_21AV39 IO_L4P_21AK35 IO_L14N_VREF_21AN35 IO_L0N_21AD33 IO_L1P_21AH35 IO_L11N_CC_21AJ36 IO_L15P_21AD32 IO_L17N_21AB33 IO_L13P_21AH36 IO_L11P_CC_21AG36 IO_L0P_21AC33 IO_L2N_21AB32 IO_L3N_21AE33 IO_L1N_21AE34 IO_L16N_21AL34 IO_L18N_21AM34 IO_L2P_21AL36 IO_L14P_21AE32 IO_L19P_21AK34 IO_L19N_21AR38 IO_L4N_VREF_21AV38 IO_L13N_21AP35 IO_L6P_21AT36 IO_L7N_21AT37 IO_L3P_21AN36 IO_L5P_21AU37 IO_L5N_21AU38 IO_L7P_21AR37 IO_L8N_CC_21AF34 IO_L8P_CC_21AE35 IO_L9N_CC_21AF36 IO_L9P_CC_21AF35 DIMM1_DDR2_DQ49 28 DIMM1_DDR2_DQ48 28 DIMM1_DDR2_DQS8_N 28 DIMM1_DDR2_DQS8_P 28 DIMM1_DDR2_DQ63 28 DIMM1_DDR2_BA0 28,29 VRP_BANK21 VRN_BANK21 DIMM1_DDR2_DQM7 28 DIMM1_DDR2_DQM6 28 DIMM1_DDR2_DQM8 DIMM1_DDR2_BA2 DIMM1_DDR2_BA1 DIMM1_DDR2_CB1 DIMM1_DDR2_CB0 DIMM1_DDR2_CB3 DIMM1_DDR2_CB2 DIMM1_DDR2_CB5 DIMM1_DDR2_CB4 DIMM1_DDR2_CB7 DIMM1_DDR2_CB6 DIMM1_DDR2_DQ51 DIMM1_DDR2_DQ50 DIMM1_DDR2_DQ53 DIMM1_DDR2_DQ52 DIMM1_DDR2_DQ55 DIMM1_DDR2_DQ54 DIMM1_DDR2_DQ56 DIMM1_DDR2_DQ58 DIMM1_DDR2_DQ57 DIMM1_DDR2_DQ60 DIMM1_DDR2_DQ59 DIMM1_DDR2_DQ62 DIMM1_DDR2_DQ61 DIMM1_DDR2_DQS6_N DIMM1_DDR2_DQS6_P DIMM1_DDR2_DQS7_N DIMM1_DDR2_DQS7_P VCC1V8 D39VCCO1_23 E36VCCO2_23 H37VCCO3_23 FF1738 BANK23 R165 R157 49.9 49.9 28 28,29 28,29 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 IO_L18P_23G31 DIMM0_DDR2_DQ1 25 IO_L16P_23E35 DIMM0_DDR2_DQ0 25 F32 DIMM0_DDR2_DQS1_N IO_L10N_CC_23 25 F31 DIMM0_DDR2_DQS1_P IO_L10P_CC_23 25 IO_L11N_CC_23E33 DIMM0_DDR2_DQS2_N 25 IO_L11P_CC_23E32 DIMM0_DDR2_DQS2_P 25 IO_L12N_VRP_23K34 VRP_BANK23 IO_L12P_VRN_23L34 VRN_BANK23 IO_L4P_23L32 DIMM0_DDR2_DQM1 25 IO_L7P_23F35 DIMM0_DDR2_DQM0 25 IO_L14N_VREF_23J32 IO_L6N_23P33 DIMM0_DDR2_DQM2 25 IO_L5P_23M31 DIMM0_DDR2_CKE0 25,26 U31 DIMM0_DDR2_ODT0 IO_L13N_23 25,26 IO_L16N_23P32 DIMM0_DDR2_DQ17 25 IO_L14P_23N33 DIMM0_DDR2_DQ16 25 IO_L19P_23T32 DIMM0_DDR2_DQ19 25 R33 DIMM0_DDR2_DQ18 IO_L17P_23 25 P31 DIMM0_DDR2_DQ21 IO_L8N_CC_23 25 IO_L17N_23N34 DIMM0_DDR2_DQ20 25 IO_L19N_23T31 DIMM0_DDR2_DQ23 25 IO_L15P_23R32 DIMM0_DDR2_DQ22 25 H33 DIMM0_DDR2_DQ3 IO_L5N_23 25 J31 DIMM0_DDR2_DQ2 IO_L6P_23 25 IO_L15N_23G33 DIMM0_DDR2_DQ5 25 IO_L7N_23G32 DIMM0_DDR2_DQ4 25 IO_L18N_23H34 DIMM0_DDR2_DQ7 25 IO_L8P_CC_23H31 DIMM0_DDR2_DQ6 25 G34 IO_L4N_VREF_23 IO_L3N_23J33 DIMM0_DDR2_DQ8 25 IO_L1N_23M33 DIMM0_DDR2_DQ10 25 IO_L2N_23L31 DIMM0_DDR2_DQ9 25 K32 DIMM0_DDR2_DQ12 IO_L0N_23 25 M34 DIMM0_DDR2_DQ11 IO_L2P_23 25 IO_L1P_23M32 DIMM0_DDR2_DQ14 25 DIMM0_DDR2_DQ13 IO_L3P_23K33 DIMM0_DDR2_S0_B 25 IO_L0P_23U32 25,26 IO_L13P_23N31 DIMM0_DDR2_DQ15 25 F34 DIMM0_DDR2_DQS0_N IO_L9N_CC_23 25 IO_L9P_CC_23E34 DIMM0_DDR2_DQS0_P 25 VCC1V8 R470 R469 49.9 C 49.9 B 5VLX330TFF1738 5VLX330TFF1738 FPGA - BANK 21,23 SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A FPGA - BANK 21,23 DDR2 A 8-1-2008_15:03 Date: Sheet Size: B Sheet 4 3 2 9 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 D D VCC3_PCI VCC2V5 U37 U37 E6VCCO1_24 G10VCCO2_24 H7VCCO3_24 C FF1738 BANK24 IO_L0N_24H11 IO_L0P_24J12 IO_L10N_CC_24L11 IO_L10P_CC_24L12 IO_L11N_CC_24G14 IO_L11P_CC_24G13 IO_L12N_VRP_24M12 IO_L12P_VRN_24M11 IO_L13N_24E13 IO_L13P_24F14 IO_L14N_VREF_24P12 IO_L14P_24N11 IO_L15N_24D12 IO_L15P_24E12 IO_L16N_24N10 IO_L16P_24P11 IO_L17N_24E14 IO_L17P_24D13 IO_L18N_24P10 IO_L18P_24R10 IO_L19N_24F15 IO_L19P_24E15 IO_L1N_24G11 IO_L1P_24G12 IO_L2N_24F11 IO_L2P_24F12 IO_L3N_24F10 IO_L3P_24E10 IO_L4N_VREF_24K13 IO_L4P_24K14 IO_L5N_24J11 IO_L5P_24K12 IO_L6N_24H13 IO_L6P_24J13 IO_L7N_24J10 IO_L7P_24H10 IO_L8N_CC_24H15 IO_L8P_CC_24H14 IO_L9N_CC_24L10 IO_L9P_CC_24K10 PCI_P_RST_B 33,35,37,38 PCI_P_LOCK_B 33,35,37,38 PCI_P_AD17 33,35,37,40 PCI_P_AD18 33,35,37,40 PCI_P_AD15 33,35,37,40 PCI_P_AD16 33,35,37,40 PCI_P_AD13 33,35,37,40 PCI_P_AD14 33,35,37,40 PCI_P_AD11 33,35,37,40 PCI_P_AD12 33,35,37,40 PCI_P_AD9 33,35,37,40 PCI_P_AD10 33,35,37,40 PCI_P_AD7 33,35,37,40 PCI_P_AD8 33,35,37,40 PCI_P_AD5 33,35,37,40 PCI_P_AD6 33,35,37,40 PCI_P_AD3 33,35,37,40 PCI_P_AD4 33,35,37,40 PCI_P_AD1 33,35,37,40 PCI_P_AD2 33,35,37,40 PCI_P_CBE3_B 33,35,37,40 PCI_P_AD0 33,35,37,40 PCI_P_INTB_B 34,35,36,37,38,40 PCI_P_INTA_B 34,35,36,37,38,40 PCI_P_INTD_B 34,35,36,37,38,40 PCI_P_INTC_B 34,35,36,37,38,40 PCI_P_AD31 33,35,37,40 PCI_FPGA_IDSEL 39 PCI_P_AD29 33,35,37,40 PCI_P_AD30 33,35,37,40 PCI_P_AD27 33,35,37,40 PCI_P_AD28 33,35,37,40 PCI_P_AD25 33,35,37,40 PCI_P_AD26 33,35,37,40 PCI_P_AD23 33,35,37,40 PCI_P_AD24 33,35,37,39,40 PCI_P_AD21 33,35,37,40 PCI_P_AD22 33,35,37,40 PCI_P_AD19 33,35,37,40 PCI_P_AD20 33,35,37,40 AP39VCCO1_25 AR36VCCO2_25 AU40VCCO3_25 FF1738 BANK25 B IO_L0N_25AF31 IO_L0P_25AG31 IO_L10N_CC_25AU31 IO_L10P_CC_25AV31 IO_L11N_CC_25AT31 IO_L11P_CC_25AT32 IO_L12N_VRP_25AN31 IO_L12P_VRN_25AP31 IO_L13N_25AP32 IO_L13P_25AR32 IO_L14N_VREF_25AP33 IO_L14P_25AR33 IO_L15N_25AM33 IO_L15P_25AN33 IO_L16N_25AJ33 IO_L16P_25AK33 IO_L17N_25AK32 IO_L17P_25AJ32 IO_L18N_25AM32 IO_L18P_25AL32 IO_L19N_25AM31 IO_L19P_25AL31 IO_L1N_25AG33 IO_L1P_25AF32 IO_L2N_25AG32 IO_L2P_25AH33 IO_L3N_25AJ31 IO_L3P_25AH31 IO_L4N_VREF_25AV36 IO_L4P_25AV35 IO_L5N_25AT35 IO_L5P_25AU36 IO_L6N_25AT34 IO_L6P_25AU34 IO_L7N_25AR34 IO_L7P_25AR35 IO_L8N_CC_25AU33 IO_L8P_CC_25AU32 IO_L9N_CC_25AV34 IO_L9P_CC_25AV33 PM_IO_77_N PM_IO_76_P PHY1_MDC PHY1_INT_SGMII PHY0_TXER PHY1_MDIO PHY0_TXD3 PHY0_TXCTL_TXEN PHY0_TXD1 PHY0_TXD2 PHY0_RXER PHY0_TXD0 PHY0_RXD3 PHY0_RXCTL_RXDV PHY0_RXD1 PHY0_RXD2 PHY0_RESET PHY0_RXD0 PHY0_MDC PHY0_INT PHY0_GTXCLK PHY0_MDIO PM_IO_79_N PM_IO_78_P PM_IO_81_N PM_IO_80_P PM_IO_83_N PM_IO_82_P PM_IO_85_N PM_IO_84_P PM_IO_87_N PM_IO_86_P PM_IO_89_N PM_IO_88_P PM_IO_91_N PM_IO_90_P PM_IO_93_N PM_IO_92_P PM_IO_95_N PM_IO_94_P 52 52 50 50 49 50 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 49 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 52 C B 5VLX330TFF1738 5VLX330TFF1738 FPGA - BANK 24,25 SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A FPGA - BANK 24,25 PCI, PERSONALITY MODULE, PHY A Date: 8-1-2008_15:03 Sheet Size: B Sheet 4 3 2 10 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 D D VCC3V3 U37 AH7VCCO1_26 AK11VCCO2_26 AL8VCCO3_26 C B FF1738 BANK26 IO_L0N_26AR7 IO_L0P_26AT7 IO_L10N_CC_26AJ8 IO_L10P_CC_26AK8 IO_L11N_CC_26AP8 IO_L11P_CC_26AN8 IO_L12N_VRP_26AK10 IO_L12P_VRN_26AK9 IO_L13N_26AR8 IO_L13P_26AP7 IO_L14N_VREF_26AL10 IO_L14P_26AL9 IO_L15N_26AP5 IO_L15P_26AP6 IO_L16N_26AL7 IO_L16P_26AL6 IO_L17N_26AN5 IO_L17P_26AN4 IO_L18N_26AM6 IO_L18P_26AN6 IO_L19N_26AM8 IO_L19P_26AM7 IO_L1N_26AG11 IO_L1P_26AG12 IO_L2N_26AR5 IO_L2P_26AT6 IO_L3N_26AH9 IO_L3P_26AG9 IO_L4N_VREF_26AU6 IO_L4P_26AT5 IO_L5N_26AH11 IO_L5P_26AH10 IO_L6N_26AV5 IO_L6P_26AV6 IO_L7N_26AJ10 IO_L7P_26AJ11 IO_L8N_CC_26AN9 IO_L8P_CC_26AM9 IO_L9N_CC_26AH8 IO_L9P_CC_26AG8 SYSACE_MPA0 SYSACE_MPD13 SYSACE_MPD12 SYSACE_MPD15 SYSACE_MPD14 SYSACE_MPCE SYSACE_MPOE SYSACE_MPIRQ SYSACE_MPWE SPI_DATA_OUT SPI_DATA_CS_B SPI_CLK SPI_DATA_IN DBG_LED_1 DBG_LED_0 DBG_LED_3 DBG_LED_2 SYSACE_MPBRDY SYSACE_MPA2 SYSACE_MPA1 SYSACE_MPA4 SYSACE_MPA3 SYSACE_MPA6 SYSACE_MPA5 SYSACE_MPD1 SYSACE_MPD0 SYSACE_MPD3 SYSACE_MPD2 SYSACE_MPD5 SYSACE_MPD4 SYSACE_MPD7 SYSACE_MPD6 SYSACE_MPD9 SYSACE_MPD8 SYSACE_MPD11 SYSACE_MPD10 DVI_GPIO1 DVI_RESET_B DVI_XCLK_N DVI_XCLK_P 57 57 57 57 57 57 57 57 57 55 55 55 55 61 61 61 61 57 57 57 57 57 57 57 57 57 57 57 57 57 57 57 57 57 57 57 53 53 53 53 C B 5VLX330TFF1738 FPGA - BANK 26 SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A FPGA - BANK 26 SYSTEM ACE, DVI, SPI, LEDS A 8-1-2008_15:03 Date: Sheet Size: B Sheet 4 3 2 11 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 0.01UF PM Clock LVDS_CLKEXT_N_C 1 LVDS_CLKEXT_N 2 52 C592 0.01UF D 1 LVDS_CLKEXT_P 2 52 D LVDS_CLKEXT_P_C U37 C593 52 52 52 52 52 52 52 52 GTP_112_RX0_N GTP_112_RX0_P GTP_112_RX1_N GTP_112_RX1_P GTP_112_TX0_N GTP_112_TX0_P GTP_112_TX1_N GTP_112_TX1_P V3REFCLKN_112 V4REFCLKP_112 V1RXN0_112 U1RXP0_112 W1RXN1_112 Y1RXP1_112 U2TXN0_112 T2TXP0_112 Y2TXN1_112 AA2TXP1_112 FF1738 BANK112 AVCCPLL_112Y3 AVTTRX_112U3 AVTTTX1_112AA3 AVTTTX2_112T3 MGTAVCC1_112W3 MGTAVCC2_112W4 RREF_112AB4 GTP_112_AVCC_PLL GTP_112_VTTRX GTP_112_VTTTX GTP_112_AVCC 21 21 12,21 GTP_112_VTTTX 12,21 PM 21 R471 GTP_112_RREF 59.0 5VLX330TFF1738 U37 C 22 22 52 52 52 52 52 52 52 52 GTP_114_GTPCLK_N GTP_114_GTPCLK_P GTP_114_RX0_N GTP_114_RX0_P GTP_114_RX1_N GTP_114_RX1_P GTP_114_TX0_N GTP_114_TX0_P GTP_114_TX1_N GTP_114_TX1_P AD3REFCLKN_114 AD4REFCLKP_114 AD1RXN0_114 AC1RXP0_114 AE1RXN1_114 AF1RXP1_114 AC2TXN0_114 AB2TXP0_114 AF2TXN1_114 AG2TXP1_114 FF1738 BANK114 AVCCPLL_114AF3 AVTTRX_114AC3 AVTTTX1_114AB3 AVTTTX2_114AG3 MGTAVCC1_114AE3 MGTAVCC2_114AE4 GTP_114_AVCC_PLL GTP_114_VTTRX GTP_114_VTTTX AVCCPLL_116P3 AVTTRX_116L3 AVTTTX1_116K3 AVTTTX2_116R3 MGTAVCC1_116N3 MGTAVCC2_116N4 GTP_116_AVCC_PLL GTP_116_VTTRX GTP_116_VTTTX GTP_114_AVCC C 21 21 21 21 PM 5VLX330TFF1738 U37 52 52 52 52 52 52 52 52 B NC NC GTP_116_RX0_N GTP_116_RX0_P GTP_116_RX1_N GTP_116_RX1_P GTP_116_TX0_N GTP_116_TX0_P GTP_116_TX1_N GTP_116_TX1_P M3REFCLKN_116 M4REFCLKP_116 M1RXN0_116 L1RXP0_116 N1RXN1_116 P1RXP1_116 L2TXN0_116 K2TXP0_116 P2TXN1_116 R2TXP1_116 FF1738 BANK116 GTP_116_AVCC 21 21 21 B 21 PM 5VLX330TFF1738 FPGA - BANK 112, 114, 116 SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A FPGA-BANK 112, 114, 116 PERSONALITY MODULES A Date: 8-1-2008_15:03 Sheet Size: B Sheet 4 3 2 12 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 D D U37 52 52 52 52 52 52 52 52 NC NC GTP_118_RX0_N GTP_118_RX0_P GTP_118_RX1_N GTP_118_RX1_P GTP_118_TX0_N GTP_118_TX0_P GTP_118_TX1_N GTP_118_TX1_P AK3REFCLKN_118 AK4REFCLKP_118 AK1RXN0_118 AJ1RXP0_118 AL1RXN1_118 AM1RXP1_118 AJ2TXN0_118 AH2TXP0_118 AM2TXN1_118 AN2TXP1_118 FF1738 BANK118 AVCCPLL_118AM3 AVTTRX_118AJ3 AVTTTX1_118AH3 AVTTTX2_118AN3 MGTAVCC1_118AL3 MGTAVCC2_118AL4 GTP_118_AVCC_PLL GTP_118_VTTRX GTP_118_VTTTX AVCCPLL_120H3 AVTTRX_120E3 AVTTTX1_120D3 AVTTTX2_120J3 MGTAVCC1_120G3 MGTAVCC2_120G4 GTP_120_AVCC_PLL GTP_120_VTTRX GTP_120_VTTTX AVCCPLL_122AV3 AVTTRX_122AR3 AVTTTX1_122AP3 AVTTTX2_122AW3 MGTAVCC1_122AU3 MGTAVCC2_122AU4 GTP_122_AVCC_PLL GTP_122_VTTRX GTP_122_VTTTX GTP_118_AVCC 21 21 21 PM 21 5VLX330TFF1738 U37 C 23 23 51 51 51 51 51 51 51 51 SATACLK_QO_N SATACLK_QO_P GTP_120_RX0_N GTP_120_RX0_P GTP_120_RX1_N GTP_120_RX1_P GTP_120_TX0_N GTP_120_TX0_P GTP_120_TX1_N GTP_120_TX1_P F3REFCLKN_120 F4REFCLKP_120 F1RXN0_120 E1RXP0_120 G1RXN1_120 H1RXP1_120 E2TXN0_120 D2TXP0_120 H2TXN1_120 J2TXP1_120 FF1738 BANK120 GTP_120_AVCC C 21 21 21 21 SATA SATA Clock 5VLX330TFF1738 U37 GTP122_PCIE_SLOTA_CLK_N_C AT3REFCLKN_122 13 GTP122_PCIE_SLOTA_CLK_P_C AT4REFCLKP_122 13 AT1RXN0_122 GTP_122_RX0_N 31 AR1RXP0_122 GTP_122_RX0_P 31 AU1RXN1_122 GTP_122_RX1_N 31 AV1RXP1_122 GTP_122_RX1_P 31 AR2TXN0_122 GTP_122_TX0_N_C 13 AP2TXP0_122 GTP_122_TX0_P_C 13 AV2TXN1_122 GTP_122_TX1_N_C 13 AW2TXP1_122 GTP_122_TX1_P_C 13 B FF1738 BANK122 GTP_122_AVCC 21 21 21 PCIe Slot A 21 B 13 13 A 13 C812 1 0.1UF 2 GTP122_PCIE_SLOTA_CLK_P 24 GTP122_PCIE_SLOTA_CLK_P_C GTP_122_TX0_N C813 1 0.1UF 2 13 GTP_122_TX0_P C814 1 0.1UF 2 GTP122_PCIE_SLOTA_CLK_N 24 GTP122_PCIE_SLOTA_CLK_N_C GTP_122_TX1_N C815 1 0.1UF 2 13 C998 1 0.1UF 2 13 C999 1 0.1UF 2 5VLX330TFF1738 GTP_122_TX1_P GTP_122_TX0_N_C GTP_122_TX0_P_C GTP_122_TX1_N_C GTP_122_TX1_P_C 31 FPGA - BANK 118,120,122 SCH P/N ART P/N FAB P/N 31 Title: 3 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM 31 FPGA - BANK 118,120,122 PM, SATA, PCI-E A 31 8-1-2008_15:03 Date: Sheet Size: B Sheet 4 0381255 0532059 1280432 2 13 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 U37 D SGMIICLK_QO_N SGMIICLK_QO_P GTP_124_RX0_N GTP_124_RX0_P GTP_124_RX1_N GTP_124_RX1_P GTP_124_TX0_N GTP_124_TX0_P GTP_124_TX1_N GTP_124_TX1_P 23 23 49 49 50 50 49 49 50 50 C3REFCLKN_124 C4REFCLKP_124 A4RXN0_124 A5RXP0_124 A3RXN1_124 A2RXP1_124 B5TXN0_124 B6TXP0_124 B2TXN1_124 B1TXP1_124 FF1738 BANK124 AVCCPLL_124C2 AVTTRX_124C5 AVTTTX1_124C1 AVTTTX2_124C6 MGTAVCC1_124D4 MGTAVCC2_124D5 NCY5 GTP_124_AVCC_PLL GTP_124_VTTRX GTP_124_VTTTX AVCCPLL_126AY5 AVTTRX_126AY2 AVTTTX1_126AY1 AVTTTX2_126AY6 MGTAVCC1_126AW5 MGTAVCC2_126AY3 GTP_126_AVCC_PLL GTP_126_VTTRX GTP_126_VTTTX AVCCPLL_128C8 AVTTRX_128C11 AVTTTX1_128C12 AVTTTX2_128C7 MGTAVCC1_128C9 MGTAVCC2_128D9 GTP_128_AVCC_PLL GTP_128_VTTRX GTP_128_VTTTX GTP_124_AVCC D 21 21 21 SGMII 21 5VLX330TFF1738 U37 14 14 31 31 31 31 14 14 14 14 C GTP126_PCIE_SLOTA_CLK_N_C AY4REFCLKN_126 GTP126_PCIE_SLOTA_CLK_P_C AW4REFCLKP_126 GTP_126_RX0_N BB3RXN0_126 GTP_126_RX0_P BB2RXP0_126 GTP_126_RX1_N BB4RXN1_126 GTP_126_RX1_P BB5RXP1_126 GTP_126_TX0_N_C BA2TXN0_126 GTP_126_TX0_P_C BA1TXP0_126 GTP_126_TX1_N_C BA5TXN1_126 GTP_126_TX1_P_C BA6TXP1_126 FF1738 BANK126 GTP_126_AVCC 21 21 21 PCIe Slot A 21 C 5VLX330TFF1738 U37 14 14 32 32 32 32 14 14 14 14 GTP128_PCIE_SLOTB_CLK_N_C C10REFCLKN_128 GTP128_PCIE_SLOTB_CLK_P_C D10REFCLKP_128 GTP_128_RX0_N A10RXN0_128 GTP_128_RX0_P A11RXP0_128 A9RXN1_128 GTP_128_RX1_N A8RXP1_128 GTP_128_RX1_P GTP_128_TX0_N_CB11TXN0_128 GTP_128_TX0_P_CB12TXP0_128 GTP_128_TX1_N_C B8TXN1_128 GTP_128_TX1_P_C B7TXP1_128 FF1738 BANK128 GTP_128_AVCC 21 21 21 21 PCIe Slot B (FX130T / FX200T / LX330T only) B B GTP128_PCIE_SLOTB_CLK_P A 14 GTP128_PCIE_SLOTB_CLK_P_C 14 24 14 24 14 GTP_126_TX0_P_C GTP_126_TX1_N_C GTP_126_TX1_P_C GTP_126_TX0_N 31 GTP_126_TX0_P 31 14 GTP_126_TX1_N 31 14 GTP_126_TX1_P 31 14 14 GTP_128_TX0_N_C C810 1 0.1UF 2 GTP128_PCIE_SLOTB_CLK_N 24 GTP_126_TX0_N_C GTP_128_TX0_N 32 GTP_128_TX0_P_C C824 1 C811 1 0.1UF 0.1UF 2 2 GTP128_PCIE_SLOTB_CLK_N_C 14 GTP_128_TX0_P 32 C825 1 0.1UF 2 GTP126_PCIE_SLOTA_CLK_P 24 C822 1 0.1UF 2 GTP126_PCIE_SLOTA_CLK_P_C GTP126_PCIE_SLOTA_CLK_N_C C111 1 C109 1 C823 1 0.1UF 0.1UF 0.1UF 2 2 2 14 C1000 1 0.1UF 2 14 GTP126_PCIE_SLOTA_CLK_N C1002 1 C1001 1 0.1UF 0.1UF 2 2 14 C1003 1 0.1UF 2 5VLX330TFF1738 GTP_128_TX1_P 32 GTP_128_TX1_N_C GTP_128_TX1_P_C FPGA - BANK 124,126,128 SCH P/N ART P/N FAB P/N GTP_128_TX1_N 32 Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM FPGA - BANK 124,126,128 SGMII, PCI-E A Date: 8-1-2008_15:03 Sheet Size: B Sheet 4 3 0381255 0532059 1280432 2 14 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 D D U37 31 31 31 31 15 15 15 15 NC AY9REFCLKN_130 NC AW9REFCLKP_130 BB9RXN0_130 GTP_130_RX0_N BB8RXP0_130 GTP_130_RX0_P GTP_130_RX1_N BB10RXN1_130 GTP_130_RX1_P BB11RXP1_130 GTP_130_TX0_N_C BA8TXN0_130 GTP_130_TX0_P_C BA7TXP0_130 GTP_130_TX1_N_CBA11TXN1_130 GTP_130_TX1_P_CBA12TXP1_130 FF1738 BANK130 AVCCPLL_130AY11 AVTTRX_130AY8 AVTTTX1_130AY12 AVTTTX2_130AY7 MGTAVCC1_130AW10 MGTAVCC2_130AY10 GTP_130_AVCC_PLL GTP_130_VTTRX GTP_130_VTTTX GTP_130_AVCC 21 21 21 21 PCIe Slot A (FX130T / FX200T / LX330T only) 5VLX330TFF1738 U37 C C GTP132_PCIE_SLOTA_CLK_N_CC16REFCLKN_132 15 GTP132_PCIE_SLOTA_CLK_P_CD16REFCLKP_132 15 A16RXN0_132 GTP_132_RX0_N 32 A17RXP0_132 GTP_132_RX0_P 32 A15RXN1_132 GTP_132_RX1_N 32 A14RXP1_132 GTP_132_RX1_P 32 GTP_132_TX0_N_C B17TXN0_132 15 GTP_132_TX0_P_C B18TXP0_132 15 GTP_132_TX1_N_C B14TXN1_132 15 GTP_132_TX1_P_C B13TXP1_132 15 FF1738 BANK132 AVCCPLL_132C14 AVTTRX_132C17 AVTTTX1_132C13 AVTTTX2_132C18 MGTAVCC1_132C15 MGTAVCC2_132D15 GTP_132_AVCC_PLL GTP_132_VTTRX GTP_132_VTTTX GTP_132_AVCC 21 21 21 21 PCIe Slot B (FX200T / LX330T only) 5VLX330TFF1738 U37 B 31 31 31 31 15 15 15 15 NC AY15REFCLKN_134 NC AW15REFCLKP_134 GTP_134_RX0_N BB15RXN0_134 GTP_134_RX0_P BB14RXP0_134 GTP_134_RX1_N BB16RXN1_134 GTP_134_RX1_P BB17RXP1_134 GTP_134_TX0_N_CBA14TXN0_134 GTP_134_TX0_P_CBA13TXP0_134 GTP_134_TX1_N_CBA17TXN1_134 GTP_134_TX1_P_CBA18TXP1_134 FF1738 BANK134 AVCCPLL_134AY17 AVTTRX_134AY14 AVTTTX1_134AY13 AVTTTX2_134AY18 MGTAVCC1_134AW16 MGTAVCC2_134AY16 AVTTRXCAA5 MGTVREFAA4 GTP_134_AVCC_PLL GTP_134_VTTRX GTP_134_VTTTX GTP_134_AVCC VTRXC GTP_VREF 21 21 21 21 21 21 B PCIe Slot A (FX200T / LX330T only) GTP_130_TX1_P 31 15 15 GTP_132_TX1_N_C GTP_132_TX1_P_C GTP_132_TX0_P GTP_132_TX1_P GTP_132_TX1_N 15 32 15 32 32 15 15 GTP_134_TX0_N_C GTP_134_TX0_P_C GTP_134_TX1_N_C GTP_134_TX1_P_C C278 1 0.1UF 2 GTP_130_TX1_P_C 31 GTP_132_TX0_P_C 32 GTP_134_TX0_N C281 1 C279 1 0.1UF 0.1UF 2 2 GTP_130_TX1_N 15 GTP_132_TX0_N GTP_134_TX0_P C280 1 0.1UF 2 GTP_130_TX1_N_C 31 GTP_132_TX0_N_C C197 1 0.1UF 2 GTP_130_TX0_P 15 C277 1 C274 1 0.1UF 0.1UF 2 2 15 GTP_130_TX0_P_C 31 C275 1 0.1UF 2 C1004 15 C116 C112 1 1 1 0.1UF 0.1UF 0.1UF 2 2 2 15 GTP_130_TX0_N C195 GTP132_PCIE_SLOTA_CLK_P 24 GTP132_PCIE_SLOTA_CLK_P_C GTP_130_TX0_N_C 1 0.1UF 2 15 C196 A 1 0.1UF 2 15 GTP132_PCIE_SLOTA_CLK_N 24 GTP132_PCIE_SLOTA_CLK_N_C C1005 15 1 0.1UF 2 5VLX330TFF1738 GTP_134_TX1_P FPGA - BANK 130,132,134 31 SCH P/N ART P/N FAB P/N 31 Title: GTP_134_TX1_N 3 2 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM FPGA - BANK 130,132,134 PCI-E 31 A 8-1-2008_15:03 Date: Ver: C Rev: 01 31 Sheet Size: B Sheet 4 0381255 0532059 1280432 15 of Drawn By 70 BF 1 4 3 2 1 VCC1V0 D VCC1V0 D U37 AA14VCCINT1 AA16VCCINT2 AA18VCCINT3 AA20VCCINT4 AA24VCCINT5 AA26VCCINT6 AA28VCCINT7 AB13VCCINT8 AB15VCCINT9 AB17VCCINT10 AB19VCCINT11 AB23VCCINT12 AB25VCCINT13 AB27VCCINT14 AB29VCCINT15 AC14VCCINT16 AC16VCCINT17 AC18VCCINT18 AC20VCCINT19 AC24VCCINT20 AC26VCCINT21 AC28VCCINT22 AD13VCCINT23 AD15VCCINT24 AD17VCCINT25 AD19VCCINT26 AD21VCCINT27 AD23VCCINT28 AD25VCCINT29 AD27VCCINT30 AD29VCCINT31 AE14VCCINT32 AE16VCCINT33 AE18VCCINT34 AE20VCCINT35 AE22VCCINT36 AE24VCCINT37 AE26VCCINT38 AE28VCCINT39 AF15VCCINT40 AF17VCCINT41 AF19VCCINT42 AF21VCCINT43 AF23VCCINT44 AF25VCCINT45 AF27VCCINT46 AG14VCCINT47 AG16VCCINT48 AG18VCCINT49 AG20VCCINT50 AG22VCCINT51 AG24VCCINT52 AG26VCCINT53 AG28VCCINT54 AH17VCCINT55 AH19VCCINT56 VCC2V5 U37 AA12VCCAUX1 AA30VCCAUX2 FF1738 AB31VCCAUX3 AC12VCCAUX4 VCCAUX AC30VCCAUX5 AD31VCCAUX6 AE12VCCAUX7 AE30VCCAUX8 AF13VCCAUX9 AF29VCCAUX10 AH13VCCAUX11 AJ12VCCAUX12 R12VCCAUX13 T13VCCAUX14 T29VCCAUX15 U12VCCAUX16 U30VCCAUX17 W12VCCAUX18 W30VCCAUX19 Y31VCCAUX20 C 5VLX330TFF1738 U37 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC A6NC2 A7NC3 A12NC4 A13NC5 A18NC6 D1NC8 J1NC9 K1NC10 R1NC11 T1NC12 AA1NC13 AB1NC14 AG1NC15 AH1NC16 AN1NC17 AP1NC18 AW1NC19 BB6NC21 BB7NC22 BB12NC23 BB13NC24 BB18NC25 NC FF1738 B FF1738 VCCINT VCCINT57AH21 VCCINT58AH23 VCCINT59AH25 VCCINT60AH27 VCCINT61AJ18 VCCINT62AJ20 VCCINT63AJ24 VCCINT64P21 VCCINT65P23 VCCINT66R16 VCCINT67R18 VCCINT68R20 VCCINT69R22 VCCINT70R24 VCCINT71R26 VCCINT72R28 VCCINT73T15 VCCINT74T17 VCCINT75T19 VCCINT76T21 VCCINT77T23 VCCINT78T25 VCCINT79T27 VCCINT80U14 VCCINT81U16 VCCINT82U18 VCCINT83U20 VCCINT84U22 VCCINT85U24 VCCINT86U26 VCCINT87U28 VCCINT88V13 VCCINT89V15 VCCINT90V17 VCCINT91V19 VCCINT92V21 VCCINT93V23 VCCINT94V25 VCCINT95V27 VCCINT96V29 VCCINT97W14 VCCINT98W16 VCCINT99W18 VCCINT100W20 VCCINT101W22 VCCINT102W24 VCCINT103W26 VCCINT104W28 VCCINT105Y13 VCCINT106Y15 VCCINT107Y17 VCCINT108Y19 VCCINT109Y23 VCCINT110Y25 VCCINT111Y27 VCCINT112Y29 C B 5VLX330TFF1738 FPGA - VCCAUX, VCCINT, NC SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A FPGA - VCCAUX, VCCINT, NC 5VLX330TFF1738 A Date: 8-1-2008_15:04 Sheet Size: B Sheet 4 3 2 16 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 U37 U37 A19GND1 A23GND2 A28GND3 A33GND4 A38GND5 AA13GND6 AA15GND7 AA17GND8 AA19GND9 AA23GND10 AA25GND11 AA27GND12 AA29GND13 AA31GND14 AA33GND15 AB10GND16 AB12GND17 AB14GND18 AB16GND19 AB18GND20 AB20GND21 AB24GND22 AB26GND23 AB28GND24 AB30GND25 AB40GND26 AB5GND27 AC11GND28 AC13GND29 AC15GND30 AC17GND31 AC19GND32 AC23GND33 AC25GND34 AC27GND35 AC29GND36 AC31GND37 AC32GND38 AC37GND39 AC4GND40 AC42GND41 AC7GND42 AD12GND43 AD14GND44 AD16GND45 AD18GND46 AD2GND47 AD20GND48 AD22GND49 AD24GND50 AD26GND51 AD28GND52 AD30GND53 AD34GND54 AE11GND55 AE13GND56 AE15GND57 AE17GND58 AE19GND59 AE2GND60 AE21GND61 AE23GND62 AE25GND63 AE27GND64 AE29GND65 AE31GND66 AE41GND67 AF14GND68 AF16GND69 AF18GND70 AF20GND71 AF22GND72 AF24GND73 AF26GND74 AF28GND75 AF33GND76 AF38GND77 AF4GND78 AF8GND79 AG13GND80 AG15GND81 AG17GND82 AG19GND83 AG21GND84 AG23GND85 AG25GND86 D C B AY36GND173 AY41GND174 B10GND175 B15GND176 B16GND177 B19GND178 B20GND179 B3GND180 B30GND181 B4GND182 B40GND183 B9GND184 BA10GND185 BA15GND186 BA16GND187 BA23GND188 BA3GND189 BA33GND190 BA38GND191 BA4GND192 BA9GND193 BB19GND194 BB25GND195 BB30GND196 BB35GND197 BB40GND198 C19GND199 C27GND200 C37GND201 C42GND202 D11GND203 D14GND204 D17GND205 D24GND206 D34GND207 D6GND208 D8GND209 E11GND210 E16GND211 E21GND212 E31GND213 E4GND214 E41GND215 F18GND216 F2GND217 F28GND218 F38GND219 F8GND220 G15GND221 G2GND222 G25GND223 G35GND224 G5GND225 H12GND226 H22GND227 H32GND228 H4GND229 H42GND230 J19GND231 J24GND232 J29GND233 J39GND234 J4GND235 J9GND236 K11GND237 K16GND238 K21GND239 K26GND240 K31GND241 K36GND242 K6GND243 L13GND244 L18GND245 L23GND246 L28GND247 L33GND248 L4GND249 M10GND250 M15GND251 M2GND252 M20GND253 M25GND254 M30GND255 M35GND256 M40GND257 M5GND258 N12GND259 AG27 FF1738GND87 GND88AG35 AG5 GND1 GND89 GND90AH12 GND91AH18 GND92AH20 GND93AH22 GND94AH24 GND95AH26 GND96AH28 GND97AH32 GND98AH42 GND99AJ13 GND100AJ14 GND101AJ17 GND102AJ19 GND103AJ23 GND104AJ25 GND105AJ27 GND106AJ29 GND107AJ39 GND108AJ4 GND109AJ9 GND110AK16 GND111AK2 GND112AK21 GND113AK26 GND114AK31 GND115AK36 GND116AK6 GND117AL13 GND118AL18 GND119AL2 GND120AL23 GND121AL33 GND122AM10 GND123AM15 GND124AM20 GND125AM25 GND126AM30 GND127AM4 GND128AM40 GND129AM5 GND130AN12 GND131AN17 GND132AN22 GND133AN27 GND134AN32 GND135AN37 GND136AN42 GND137AN7 GND138AP14 GND139AP24 GND140AP29 GND141AP34 GND142AP4 GND143AR11 GND144AR21 GND145AR31 GND146AR4 GND147AR41 GND148AR6 GND149AT18 GND150AT2 GND151AT28 GND152AT38 GND153AT8 GND154AU15 GND155AU2 GND156AU25 GND157AU35 GND158AU5 GND159AV12 GND160AV22 GND161AV32 GND162AV4 GND163AV42 GND164AW11 GND165AW14 GND166AW17 GND167AW19 GND168AW29 GND169AW39 GND170AW6 GND171AW8 GND172AY26 N17 FF1738GND260 GND261N2 N27 GND2 GND262 GND263N32 GND264N37 GND265N42 GND266N7 GND267P14 GND268P16 GND269P19 GND270P22 GND271P24 GND272P29 GND273P34 GND274P4 GND275R11 GND276R13 GND277R17 GND278R19 GND279R21 GND280R23 GND281R25 GND282R27 GND283R31 GND284R41 GND285T12 GND286T16 GND287T18 GND288T20 GND289T22 GND290T24 GND291T26 GND292T28 GND293T33 GND294T38 GND295T8 GND296U13 GND297U15 GND298U17 GND299U19 GND300U21 GND301U23 GND302U25 GND303U27 GND304U29 GND305U35 GND306U4 GND307U5 GND308V12 GND309V14 GND310V16 GND311V18 GND312V2 GND313V20 GND314V22 GND315V24 GND316V26 GND317V28 GND318V30 GND319V32 GND320V42 GND321W13 GND322W15 GND323W17 GND324W19 GND325W2 GND326W21 GND327W23 GND328W25 GND329W27 GND330W29 GND331W31 GND332W34 GND333W39 GND334W9 GND335Y11 GND336Y12 GND337Y14 GND338Y16 GND339Y18 GND340Y20 GND341Y24 GND342Y26 GND343Y28 GND344Y30 GND345Y36 GND346Y4 GND347Y6 D C B FPGA - GND SCH P/N ART P/N FAB P/N Title: A 5VLX330TFF1738 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM FPGA GROUND PINS 5VLX330TFF1738 A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 2 17 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCC2V5 VCC2V5 VCC2V5 VCC2V5 D19VCCO1_7 G20VCCO2_7 H17VCCO3_7 D FF1738 BANK7 C IO_L0N_7M22 IO_L0P_7M23 IO_L10N_CC_7E23 IO_L10P_CC_7E22 IO_L11N_CC_7G23 IO_L11P_CC_7F24 IO_L12N_VRP_7D18 IO_L12P_VRN_7E19 IO_L13N_7H23 IO_L13P_7J23 IO_L14N_VREF_7F20 IO_L14P_7E20 IO_L15N_7H24 IO_L15P_7G24 IO_L16N_7G19 IO_L16P_7F19 IO_L17N_7F25 IO_L17P_7F26 IO_L18N_7H20 IO_L18P_7H19 IO_L19N_7G26 IO_L19P_7H25 IO_L1N_7L21 IO_L1P_7M21 IO_L2N_7N23 IO_L2P_7N24 IO_L3N_7N21 IO_L3P_7N22 IO_L4N_VREF_7J21 IO_L4P_7H21 IO_L5N_7K20 IO_L5P_7J20 IO_L6N_7K23 IO_L6P_7L22 IO_L7N_7J22 IO_L7P_7K22 IO_L8N_CC_7G22 IO_L8P_CC_7F22 IO_L9N_CC_7F21 IO_L9P_CC_7G21 U37 U37 U37 U37 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC AP19VCCO1_8 AU20VCCO2_8 AV17VCCO3_8 FF1738 BANK8 IO_L0N_8AL22 IO_L0P_8AL21 IO_L10N_CC_8AV20 IO_L10P_CC_8AV21 IO_L11N_CC_8AV25 IO_L11P_CC_8AU24 IO_L12N_VRP_8AU22 IO_L12P_VRN_8AU23 IO_L13N_8AV24 IO_L13P_8AV23 IO_L14N_VREF_8AP22 IO_L14P_8AR23 IO_L15N_8AT22 IO_L15P_8AR22 IO_L16N_8AM23 IO_L16P_8AM22 IO_L17N_8AP23 IO_L17P_8AN23 IO_L18N_8AP21 IO_L18P_8AP20 IO_L19N_8AM21 IO_L19P_8AN21 IO_L1N_8AK22 IO_L1P_8AK23 IO_L2N_8AJ21 IO_L2P_8AJ22 IO_L3N_8AL20 IO_L3P_8AK20 IO_L4N_VREF_8AU27 IO_L4P_8AU26 IO_L5N_8AU18 IO_L5P_8AU19 IO_L6N_8AT25 IO_L6P_8AR25 IO_L7N_8AT20 IO_L7P_8AR20 IO_L8N_CC_8AR24 IO_L8P_CC_8AT24 IO_L9N_CC_8AT21 IO_L9P_CC_8AU21 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC B35VCCO1_27 F33VCCO2_27 J34VCCO3_27 IO_L0N_27C31 IO_L0P_27D31 IO_L10N_CC_27A36 IO_L10P_CC_27A37 IO_L11N_CC_27B36 IO_L11P_CC_27B37 IO_L12N_VRP_27D38 IO_L12P_VRN_27C38 IO_L13N_27C40 IO_L13P_27C39 IO_L14N_VREF_27B38 IO_L14P_27B39 IO_L15N_27A40 IO_L15P_27A39 IO_L16N_27B41 IO_L16P_27A41 IO_L17N_27C41 IO_L17P_27B42 IO_L18N_27D41 IO_L18P_27D40 IO_L19N_27D42 IO_L19P_27E42 IO_L1N_27B31 IO_L1P_27C30 IO_L2N_27A31 IO_L2P_27A30 IO_L3N_27B32 IO_L3P_27A32 IO_L4N_VREF_27C33 IO_L4P_27B33 IO_L5N_27D33 IO_L5P_27D32 IO_L6N_27B34 IO_L6P_27C34 IO_L7N_27A35 IO_L7P_27A34 IO_L8N_CC_27D36 IO_L8P_CC_27D35 IO_L9N_CC_27C35 IO_L9P_CC_27C36 FF1738 BANK27 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC AT33VCCO1_29 AV37VCCO2_29 AW34VCCO3_29 FF1738 BANK29 IO_L0N_29AW42 IO_L0P_29AY42 IO_L10N_CC_29BA36 IO_L10P_CC_29BB36 IO_L11N_CC_29AW35 IO_L11P_CC_29AY35 IO_L12N_VRP_29BA35 IO_L12P_VRN_29BB34 IO_L13N_29BA34 IO_L13P_29BB33 IO_L14N_VREF_29AY34 IO_L14P_29AY33 IO_L15N_29AW32 IO_L15P_29AW33 IO_L16N_29BA32 IO_L16P_29AY32 IO_L17N_29BB31 IO_L17P_29BB32 IO_L18N_29BA31 IO_L18P_29BA30 IO_L19N_29AW31 IO_L19P_29AY30 IO_L1N_29AW40 IO_L1P_29AW41 IO_L2N_29BA41 IO_L2P_29AY40 IO_L3N_29BB41 IO_L3P_29BA42 IO_L4N_VREF_29BB39 IO_L4P_29BA40 IO_L5N_29BA39 IO_L5P_29BB38 IO_L6N_29AW37 IO_L6P_29AY38 IO_L7N_29AY39 IO_L7P_29AW38 IO_L8N_CC_29BA37 IO_L8P_CC_29BB37 IO_L9N_CC_29AW36 IO_L9P_CC_29AY37 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC D C 5VLX330TFF1738 5VLX330TFF1738 5VLX330TFF1738 VCC2V5 5VLX330TFF1738 VCC2V5 VCC2V5 U37 C32VCCO1_31 D29VCCO2_31 G30VCCO3_31 FF1738 BANK31 B A IO_L0N_31D21 IO_L0P_31D20 IO_L10N_CC_31E27 IO_L10P_CC_31E28 IO_L11N_CC_31C26 IO_L11P_CC_31D27 IO_L12N_VRP_31B26 IO_L12P_VRN_31C25 IO_L13N_31A25 IO_L13P_31A26 IO_L14N_VREF_31B27 IO_L14P_31A27 IO_L15N_31A29 IO_L15P_31B28 IO_L16N_31E30 IO_L16P_31F30 IO_L17N_31D30 IO_L17P_31E29 IO_L18N_31B29 IO_L18P_31C29 IO_L19N_31D28 IO_L19P_31C28 IO_L1N_31C20 IO_L1P_31C21 IO_L2N_31A21 IO_L2P_31A20 IO_L3N_31B21 IO_L3P_31A22 IO_L4N_VREF_31D23 IO_L4P_31D22 IO_L5N_31B22 IO_L5P_31C23 IO_L6N_31A24 IO_L6P_31B23 IO_L7N_31C24 IO_L7P_31B24 IO_L8N_CC_31E25 IO_L8P_CC_31E24 IO_L9N_CC_31D26 IO_L9P_CC_31D25 U37 U37 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC AU30VCCO1_33 AY31VCCO2_33 BA28VCCO3_33 FF1738 BANK33 IO_L0N_33BB28 IO_L0P_33BB29 IO_L10N_CC_33AW27 IO_L10P_CC_33AV28 IO_L11N_CC_33AW26 IO_L11P_CC_33AV26 IO_L12N_VRP_33BB23 IO_L12P_VRN_33BB22 IO_L13N_33BA22 IO_L13P_33BB21 IO_L14N_VREF_33AY23 IO_L14P_33AY22 IO_L15N_33AW22 IO_L15P_33AW23 IO_L16N_33BA21 IO_L16P_33BB20 IO_L17N_33BA19 IO_L17P_33BA20 IO_L18N_33AY20 IO_L18P_33AY19 IO_L19N_33AW20 IO_L19P_33AW21 IO_L1N_33BA27 IO_L1P_33BB27 IO_L2N_33BA26 IO_L2P_33BB26 IO_L3N_33AY25 IO_L3P_33BA25 IO_L4N_VREF_33AV30 IO_L4P_33AW30 IO_L5N_33AW28 IO_L5P_33AV29 IO_L6N_33AY28 IO_L6P_33AY27 IO_L7N_33BA29 IO_L7P_33AY29 IO_L8N_CC_33BA24 IO_L8P_CC_33BB24 IO_L9N_CC_33AW25 IO_L9P_CC_33AY24 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC AP9VCCO1_34 AU10VCCO2_34 AV7VCCO3_34 IO_L0N_34AV19 IO_L0P_34AW18 IO_L10N_CC_34AT10 IO_L10P_CC_34AR10 IO_L11N_CC_34AV11 IO_L11P_CC_34AW12 IO_L12N_VRP_34AR12 IO_L12P_VRN_34AT11 IO_L13N_34AU12 IO_L13P_34AU11 IO_L14N_VREF_34AT12 IO_L14P_34AR13 IO_L15N_34AU13 IO_L15P_34AU14 IO_L16N_34AV8 IO_L16P_34AW7 IO_L17N_34AV9 IO_L17P_34AV10 IO_L18N_34AT9 IO_L18P_34AU9 IO_L19N_34AU7 IO_L19P_34AU8 IO_L1N_34AL12 IO_L1P_34AL11 IO_L2N_34AU17 IO_L2P_34AV18 IO_L3N_34AM12 IO_L3P_34AM11 IO_L4N_VREF_34AU16 IO_L4P_34AV16 IO_L5N_34AN10 IO_L5P_34AN11 IO_L6N_34AV14 IO_L6P_34AV15 IO_L7N_34AR9 IO_L7P_34AP10 IO_L8N_CC_34AV13 IO_L8P_CC_34AW13 IO_L9N_CC_34AP12 IO_L9P_CC_34AP11 FF1738 BANK34 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC B FPGA - BANK 7,8,27,29,31,33,34 SCH P/N ART P/N FAB P/N Title: 4 5VLX330TFF1738 3 5VLX330TFF1738 2 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM FPGA - BANK 7,8,27,29,31,33,34 UNUSED BANKS A Date: 7-10-2008_10:19 Sheet Size: B Sheet 5VLX330TFF1738 0381255 0532059 1280432 18 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCCAUX 2.5V VCC2V5 D 1 2 C790 33UF 6.3V TANT 1 2 C791 33UF 6.3V TANT 1 2 C82 33UF D 6.3V TANT VCCO 1.8V VCC1V8 1 2 VCC1V8 C191 47UF 6.3V TANT 1 2 C192 47UF 6.3V TANT 1 2 C193 47UF 6.3V TANT 1 2 C189 47UF 6.3V TANT 1 2 C188 47UF 6.3V TANT 1 C181 47UF 2 6.3V TANT 1 C198 47UF 2 C578 C209 C556 C232 C576 C574 C573 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 6.3V TANT C C VCCO 2.5V VCC2V5 1 2 VCC2V5 C848 47UF 6.3V TANT 1 2 C847 47UF 6.3V TANT 1 2 C846 47UF 6.3V TANT 1 2 C845 47UF 6.3V TANT 1 2 C231 C537 C230 C215 C569 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF C844 47UF 6.3V TANT Banks Used Capacitors Used VCCAUX 2.5V N/A 33uf: 3 VCCINT 1.0V Supply VCCO 3.3V B N/A 330uf: 7 / 0.22uf: 52 VCCO 3.3V 0,1,2,4,26 47uf: 5 / 0.22uf: 5 VCCO 2.5V 3,5,6,18,25 47uf: 5 / 0.22uf: 5 VCCO 1.8V 11,13,15,17,19,21,23 47uf: 7 / 0.22uf: 7 VCCO 3.0V PCI 12,20,24 47uf: 3 / 0.22uf: 3 B VCC3V3 VCC3V3 1 2 C793 47UF 6.3V TANT 1 2 C843 47UF 6.3V TANT 1 2 C842 47UF 6.3V TANT 1 2 C841 47UF 6.3V TANT 1 2 C795 47UF C498 C557 C570 C200 C558 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF Note: Bank 12 defaults to 3.0V_PCI 6.3V TANT FPGA DECOUPLING VCCO 3.0V PCI SCH P/N ART P/N FAB P/N VCC3_PCI VCC3_PCI Title: A 1 2 4.7UF C794 6.3V 1 2 4.7UF C854 6.3V 1 4.7UF 2 C853 6.3V C476 C475 C466 0.22UF 0.22UF 0.22UF SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM FPGA DECOUPLING A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 0381255 0532059 1280432 3 2 19 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCCINT 1.0V D D VCC1V0 1 1 1 1 1 1 1 C84 2 330UF 6.3V C797 2 330UF 6.3V C796 2 330UF 6.3V C799 2 330UF 6.3V C851 2 330UF 6.3V C850 2 330UF 6.3V C849 2 330UF 6.3V VCC1V0 C C202 C205 C206 C210 C211 C214 C216 C199 C203 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF C567 C229 C566 C512 C87 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF C88 0.22UF C89 0.22UF C VCC1V0 C103 C105 C107 C108 C516 C491 C520 C515 C503 C528 C575 C508 C521 C225 C572 C540 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF VCC1V0 B C463 C529 C571 C470 C465 C468 C473 C568 C460 C517 C201 C514 C464 C527 C469 C509 C233 C238 C341 C342 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF 0.22UF B FPGA DECOUPLING PAGE 2 SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A FPGA DECOUPLING PAGE 2 A 7-10-2008_10:19 Date: Sheet Size: B Sheet 4 3 2 20 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 FB16 12 12 12 12 GTP_112_AVCC_PLL GTP_112_VTTRX GTP_112_VTTTX GTP_112_AVCC 1 2 MPZXX FB12 1 2 MPZXX FB39 1 2 MPZXX C723 0.22UF FB38 1 2 GTP_AVCC_PLL GTP_AVTTRX GTP_AVTTTX GTP_AVCC MPZXX C722 0.22UF C721 0.22UF FB27 21,68 21,68 21,68 21,64,68 14 14 14 14 GTP_124_AVCC_PLL GTP_124_VTTRX GTP_124_VTTTX GTP_124_AVCC 1 FB21 2 MPZXX 1 MPZXX 1 2 C702 0.22UF C718 0.22UF 1 2 FB19 1 2 MPZXX FB18 1 2 GTP_AVCC_PLL GTP_AVTTRX GTP_AVTTTX GTP_AVCC MPZXX C717 0.22UF C688 0.22UF 14 14 14 14 21,68 21,68 21,68 21,64,68 GTP_126_AVCC_PLL GTP_126_VTTRX GTP_126_VTTTX GTP_126_AVCC 1 C703 0.22UF C GTP_116_AVCC_PLL GTP_116_VTTRX GTP_116_VTTTX GTP_116_AVCC 2 1 1 GTP_AVTTRX 21,68 2 MPZXX C348 0.22UF GTP_AVCC_PLL GTP_AVTTRX GTP_AVTTTX GTP_AVCC FB28 2 MPZXX 1 FB25 2 MPZXX 1 2 MPZXX C705 0.22UF C706 0.22UF C720 0.22UF FB90 1 2 MPZXX FB91 1 2 MPZXX FB95 1 2 MPZXX C724 0.22UF 15 D C707 0.22UF 21,68 21,68 21,68 21,64,68 C708 0.22UF FB36 1 MPZXX FB10 VTRXC C704 0.22UF FB24 2 MPZXX FB96 12 12 12 12 2 MPZXX C701 0.22UF FB20 MPZXX C719 0.22UF 1 21,68 21,68 21,68 21,64,68 FB23 1 MPZXX FB26 2 MPZXX FB29 GTP_114_AVCC_PLL GTP_114_VTTRX GTP_114_VTTTX GTP_114_AVCC GTP_AVCC_PLL GTP_AVTTRX GTP_AVTTTX GTP_AVCC FB22 2 D 12 12 12 12 1 C725 0.22UF GTP_AVCC_PLL GTP_AVTTRX GTP_AVTTTX GTP_AVCC 14 14 14 14 21,68 21,68 21,68 21,64,68 GTP_128_AVCC_PLL GTP_128_VTTRX GTP_128_VTTTX GTP_128_AVCC 1 1 GTP_AVCC_PLL 21,68 GTP_AVTTRX 21,68 GTP_AVTTTX 21,68 GTP_AVCC 21,64,68 FB3 2 MPZXX 1 FB35 2 MPZXX 1 2 MPZXX C709 0.22UF C726 0.22UF FB2 2 MPZXX C710 0.22UF C727 0.22UF VCC5V C 1K C711 0.22UF 1 C712 0.22UF 1IN 2 R400 15 GTP_VREF C207 0.22UF GND3 2OUT C323 0.1UF DEVICE=REF2912 U10 FB4 FB92 13 13 13 13 GTP_118_AVCC_PLL GTP_118_VTTRX GTP_118_VTTTX GTP_118_AVCC 1 2 MPZXX FB93 1 2 MPZXX FB97 1 2 MPZXX FB94 1 2 MPZXX C689 0.22UF C690 0.22UF GTP_AVCC_PLL 21,68 GTP_AVTTRX 21,68 GTP_AVTTTX 21,68 GTP_AVCC 21,64,68 15 15 15 15 GTP_130_AVCC_PLL GTP_130_VTTRX GTP_130_VTTTX GTP_130_AVCC 1 FB5 1 2 MPZXX GTP_AVCC_PLL 21,68 GTP_AVTTRX 21,68 GTP_AVTTTX 21,68 GTP_AVCC 21,64,68 FB37 1 2 MPZXX FB6 1 2 MPZXX C713 0.22UF C691 0.22UF 2 MPZXX C714 0.22UF C692 0.22UF C715 0.22UF C716 0.22UF B B FB64 FB15 13 13 13 13 GTP_120_AVCC_PLL GTP_120_VTTRX GTP_120_VTTTX GTP_120_AVCC 1 2 MPZXX FB7 1 2 MPZXX FB8 1 2 MPZXX FB14 1 2 MPZXX C693 0.22UF C694 0.22UF GTP_AVCC_PLL 21,68 GTP_AVTTRX 21,68 GTP_AVTTTX 21,68 GTP_AVCC 21,64,68 15 15 15 15 GTP_132_AVCC_PLL GTP_132_VTTRX GTP_132_VTTTX GTP_132_AVCC 1 FB58 1 2 MPZXX GTP_AVCC_PLL 21,68 GTP_AVTTRX 21,68 GTP_AVTTTX 21,68 GTP_AVCC 21,64,68 FB59 1 2 MPZXX FB63 1 2 MPZXX C740 0.22UF C695 0.22UF 2 MPZXX C741 0.22UF C696 0.22UF C742 0.22UF C743 0.22UF GTP POWER FILTER FB9 13 13 13 13 GTP_122_AVCC_PLL GTP_122_VTTRX GTP_122_VTTTX GTP_122_AVCC 1 2 MPZXX FB11 1 2 MPZXX FB17 1 2 MPZXX FB13 1 MPZXX C697 0.22UF A C698 0.22UF C699 0.22UF 2 FB60 GTP_AVCC_PLL 21,68 GTP_AVTTRX 21,68 GTP_AVTTTX 21,68 GTP_AVCC 21,64,68 15 15 15 15 GTP_134_AVCC_PLL GTP_134_VTTRX GTP_134_VTTTX GTP_134_AVCC 1 MPZXX FB61 1 2 MPZXX FB65 1 2 MPZXX FB62 1 C745 0.22UF SCH P/N ART P/N FAB P/N GTP_AVCC_PLL 21,68 GTP_AVTTRX 21,68 GTP_AVTTTX 21,68 GTP_AVCC 21,64,68 2 MPZXX C744 0.22UF C700 0.22UF 2 Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM GTP POWER FILTER C746 0.22UF C747 0.22UF A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 0381255 0532059 1280432 2 21 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCC2V5 VCC2V5 R267 R421 4.75K VCC3V3 R367 0 4 7 VCC2V5 1 X8 OE VCC 14 OE2 VCC2 GND OUT 11 D R366 USER_CLKSYS_R 8 4 OSC SYSACE_FPGA_CLK USER_CLKSYS 3 USER_CLK2 3 24.9 MB2100H 100MHZ R411 C542 0.1UF VCC1 OSC C446 0.1UF DNP VCC2V5 X6 OE1 4.75K R264 D 1 SOCKETED 14-PIN DIP ARIES p/n: 4236-118-14 3 34.0 2 GND OUT SG-636PDE 33.0000MHZ 3 SYSACE_CLK_R R412 SYSACE_CLK_OSC VCC2V5 18.2 R410 SYSACE_CLK 57 34.0 R466 R448 0 4.75K VCC3V3 OE1 VCC1 14 OSC C581 0.1UF R467 X10 1 4 OE2 VCC2 11 DNP GND OUT R447 USER_CLK2_R 8 C 24.9 SG-531PCW DNP SOCKETED 14-PIN DIP ARIES p/n: 4236-118-14 2 R28 VCC2V5 J17 80.6 7 C 3 1 USER_SMA_CLK_P 3 5 CON_SMA_ST 2 J20 130 R407 4 VCC2V5 3 1 2 100-DNP 2 J21 1 GTP_114_GTPCLK_N USER_SMA_CLK_N 3 4 12 R297 2 1 2 C591 C590 GTP_SMA_CLK_N0.01UF 0.01UF 1 GTP_SMA_CLK_P J36 3 R54 GTP_114_GTPCLK_P R375 5 CON_SMA_ST 80.6 B 4 5 12 CON_SMA_ST 130 B 3 1 4 CLOCKS: USER,MGT,SYSACE 5 CON_SMA_ST 0381255 0532059 1280432 SCH P/N ART P/N FAB P/N Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A CLKS: USR,MGT,SYSACE A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 2 22 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 D D SATACLK_QO-C_P Q_N6 SATACLK_QO-C_N SATACLK_XTAL_IN 4XTAL_IN 23 GND_SATACLK FREQ_SEL5 U42 1 0.1UF 10V 2 X5R Q_P7 3XTAL_OUT 1 J5 2 JMP Off = 75 MHz JMP On (Default) = 150 MHz SATACLK_QO_P C28 2GND X3 23 GND_SATACLK VDD_SATACLK 13 SATACLK_QO_N 13 1 0.1UF 10V 2 X5R R30 DNP 1% 2 VDD8 SATACLK_XTAL_OUT 25.000MHZ ABLS 1 ICS844071I 1VDDA C70 1 C351 NPO 2 50V 22PF VDDA_SATACLK 1 C352 NPO 2 50V 22PF 2 VDD_SATACLK VDDA_SATACLK C16 C75 C71 C175 1 1 1 1 0.1UF 0.01UF 0.01UF 10UF 2 10V 2 16V 2 16V 2 X5R X5R X7R X7R 10V GND_SATACLK 1 2 10 R69 5% 2 1 F19 1 F20 VCC3V3 FERRITE-220 FERRITE-220 Near Clock GND_SATACLK 23 SATA Clock - 75/150 MHz C GND_SGMIICLK SGMIICLK_XTAL_IN 4XTAL_IN NQ06 SGMIICLK_QO-C_N OE5 U6 X7 23 1 0.1UF 10V 2 X5R SGMIICLK_QO-C_P C23 3XTAL_OUT Q07 SGMIICLK_QO_P SGMIICLK_QO_N 14 14 B 1 0.1UF 10V 2 X5R R29 SGMIICLK_XTAL_OUT VDD_SGMIICLK C22 C354 1 33PF 2 50V NPO 23 2 VDD8 2GND 25.000MHZ ABLS 1 DNP 1 C74 0.01UF 2 16V X7R GND_SGMIICLK VDDA_SGMIICLK C979 C176 1 1 0.01UF 10UF 2 16V 2 X5R X7R 10V ICS844021I VDDA_SGMIICLK 1VDDA 1% 2 1 2 VDD_SGMIICLK C353 1 33PF 2 50V NPO 1 B 10 R70 5% 2 F13 1 F18 VCC3V3 FERRITE-220 FERRITE-220 C GND_SGMIICLK 125.00 MHz Clock Ethernet SGMII Clock - 125MHz SATA, SGMII CLOCKS SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A SATA, SGMII CLOCKS A 7-10-2008_10:19 Date: Sheet Size: B Sheet 4 3 2 23 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 ICS843011 1VDDA CLK100_QO_P 6CLK1 NC NC NC 82.5 9 10 1 Q215 NC 7NC1 NQ214 NC 8NC2 VDD313 NQ3 VDD1 1 U64 R697 1 4.7K 5% 1/16W2 0603 R696 1 4.7K 5% 1/16W2 0603 R699 4.7K 5% 1/16W 0603 10R ICS874001 1PLL_SEL NC620 NC 2NC1 VDDO19 GTP122_PCIE_SLOTA_CLK_P NQ015 GTP122_PCIE_SLOTA_CLK_N 3OE2 Q114 GTP126_PCIE_SLOTA_CLK_P 4VDD NQ113 GTP126_PCIE_SLOTA_CLK_N Place R713 near U65 5GND Q212 GTP128_PCIE_SLOTB_CLK_P NC 3NC2 Q18 NC 4NC3 NQ17 CLK250_PCIE_P 6CLK NQ211 GTP128_PCIE_SLOTB_CLK_N Q310 GTP132_PCIE_SLOTA_CLK_P 5MR NC516 NC 6BW_SEL NC415 NC 7F_SEL1 GND14 B 8VDDA 9 1 2 7NCLK R708 DNP 5% 1/16W 0603 1 R709 DNP 5% 21/16W 0603 10 VDD CLK 12 OE 11 1 2 CLK250_PCIE_N CLK100_PCIE_N NCLK13 F_SEL0 ICS854104 Q016 1 NC R701 4.7K 5% 1/16W 0603 1:4 Clock Buffer 2OE1 100R 2 Place resistors near U64 1OE0 R713 2 1 2 R702 4.7K 5% 1/16W 0603 R712 2 R711 4.7K 5% 1/16W 0603 R700 1 4.7K 5% 1/16W2 0603 100MHz to 250MHz Clock Gen 1 CLK100_PCIE_P 24 8OE3 1 2 R693 1 DNP 5% 1/16W2 0603 R698 1 DNP 5% 1/16W2 R695 1 DNP 5% 1/16W2 0603 R694 DNP 5% 1/16W 0603 1 R707 4.7K 5% 21/16W 0603 1 R705 4.7K 5% 21/16W 0603 1 R703 4.7K 5% 2 1/16W 0603 1 R582 DNP 5% 21/16W 0603 13 14 14 LVDS Ouptut Levels 14 14 15 B 15 U65 VCC3V3 VCC3V3 1 C869 1 X7R 2 2 16V 0.01UF 0603 24 Only populate these resistors when 874001 is removed C657 X7R 16V 0.01UF 0603 1 2 VCC3V3 PCIe CLOCKS SCH P/N ART P/N FAB P/N C653 1 C356 1 C997 1 X7R X5R X7R 10V 2 16V 2 16V 2 10UF 0.01UF 0.01UF 0603 0603 0805 A 13 GTP132_PCIE_SLOTA_CLK_N NQ39 Bypass resistors for 100MHz U66 R710 DNP 5% 1/16W 0603 1 2 VCC3V3 1 1 VCC3V3 1 R704 DNP 5% 21/16W 0603 C 1C664 1 1 R706 DNP 5% 21/16W 0603 1 VCC3V3 1 27PF C357 X7R 16V 0.01UF 0603 1 1C665 2 1 1 C584 1 X7R 2 16V 2 0.01UF 0603 R675 2 49.9R R673 2 49.9R R672 2 49.9R R671 2 VCC3V3 49.9R R32 VCC3V3 2 R492 33PF 32 CLK100_PCIE_N 24 2 R692 475R 1% 1/16W 0603 NC NC 2 32 0R DNP 1 D CLK100_PCIE_P 24 0R 25.000MHZ C PCIE_SLOTB_CLK_N R714 R715 49.9R R27 2 31 HCSL Ouptut Levels 49.9R R585 DNP 5% 1/16W 0603 31 33 12 11 PCIE_SLOTB_CLK_P 33 2 2 R588 1 4.7K 5% 1/16W2 0603 R680 NQ116 Q3 PCIE_SLOTA_CLK_N R681 Q117 IREF PCIE_SLOTA_CLK_P 33 33 VDD218 1 X5 XTAL_MA506 1 82.5 R108 2 TSSOP8 R477 2 NC5 U48 NC R679 NQ019 5NCLK0 LVPECL Ouptut Levels R678 Q020 4CLK0 CLK100_QO_N NQO6 4XTAL_IN 1GND 3CLK_SEL QO7 3XTAL_OUT ICS85104 2CLK_EN VDD8 2GND R581 4.7K 5% 1/16W 0603 1 1 100MHz Clock Gen 2 R591 1 DNP 5% 1/16W2 0603 133 133 R109 2 R102 2 10R 2 1 1C666 0.01UF C76 2 10UF 2 1:4 Clock Buffer 1 1C668 0.01UF R494 2 1 D 1 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM Title: PCIE CLOCKS A 7-10-2008_10:19 Date: Sheet Size: B Sheet 4 3 2 24 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCC1V8 DDR2_DIMM XYZ D 5,6,7,8,9,27,28,30,69 VREF_DDR2 9 9 9 9 9 9 9 9 9 9 27 9 9 C DDR2_DIMM XYZ 9 9 9 9 9 9 8 8 8 8 8 8 6 6 6 6 6 6 9,26 B 6,26 5,26 5,26 5,26 5,26 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 DIMM0_DDR2_DQ0 DIMM0_DDR2_DQ1 DIMM0_DDR2_DQS0_N DIMM0_DDR2_DQS0_P DIMM0_DDR2_DQ2 DIMM0_DDR2_DQ3 DIMM0_DDR2_DQ8 DIMM0_DDR2_DQ9 DIMM0_DDR2_DQS1_N DIMM0_DDR2_DQS1_P DIMM0_DDR2_RST_B NC DIMM0_DDR2_DQ10 DIMM0_DDR2_DQ11 DIMM0_DDR2_DQ16 DIMM0_DDR2_DQ17 DIMM0_DDR2_DQS2_N DIMM0_DDR2_DQS2_P DIMM0_DDR2_DQ18 DIMM0_DDR2_DQ19 DIMM0_DDR2_DQ24 DIMM0_DDR2_DQ25 DIMM0_DDR2_DQS3_N DIMM0_DDR2_DQS3_P DIMM0_DDR2_DQ26 DIMM0_DDR2_DQ27 DIMM0_DDR2_CB0 DIMM0_DDR2_CB1 DIMM0_DDR2_DQS8_N DIMM0_DDR2_DQS8_P DIMM0_DDR2_CB2 DIMM0_DDR2_CB3 DIMM0_DDR2_CKE0 DIMM0_DDR2_BA2 NC DIMM0_DDR2_A11 DIMM0_DDR2_A7 DIMM0_DDR2_A5 DIMM0_DDR2_A4 9 9 1_VREF 2_VSS 3_DQ0 4_DQ1 5_VSS 6_DQS0_N 7_DQS0 8_VSS 9_DQ2 10_DQ3 11_VSS 12_DQ8 13_DQ9 14_VSS 15_DQS1_N 16_DQS1 17_VSS 18_RESET_N 19_NC 20_VSS 21_DQ10 22_DQ11 23_VSS 24_DQ16 25_DQ17 26_VSS 27_DQS2_N 28_DQS2 29_VSS 30_DQ18 31_DQ19 32_VSS 33_DQ24 34_DQ25 35_VSS 36_DQS3_N 37_DQS3 38_VSS 39_DQ26 40_DQ27 41_VSS 42_CB0 43_CB1 44_VSS 45_DQS8_N 46_DQS8 47_VSS 48_CB2 49_CB3 50_VSS 51_VDDQ 52_CKE0 53_VDD 54_NC/BA2 55_NC 56_VDDQ 57_A11 58_A7 59_VDD 60_A5 61_A4 SCL_120 SDA_119 VSS_118 DQ59_117 DQ58_116 VSS_115 DQS7_114 DQS7_N_113 VSS_112 DQ57_111 DQ56_110 VSS_109 DQ51_108 DQ50_107 VSS_106 DQS6_105 DQS6_N_104 VSS_103 NC_102 SA2_101 VSS_100 DQ49_99 DQ48_98 VSS_97 DQ43_96 DQ42_95 VSS_94 DQS5_93 DQS5_N_92 VSS_91 DQ41_90 DQ40_89 VSS_88 DQ35_87 DQ34_86 VSS_85 DQS4_84 DQS4_N_83 VSS_82 DQ33_81 DQ32_80 VSS_79 VDDQ_78 S1_N_77 ODT1_76 VDDQ_75 CAS_N_74 WE_N_73 VDDQ_72 BA0_71 A10/AP_70 VDD_69 NC_68 VDD_67 VSS_66 VSS_65 VDD_64 A2_63 VDDQ_62 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 DIMM0_DDR2_SCL DIMM0_DDR2_SDA DIMM0_DDR2_DQ59 DIMM0_DDR2_DQ58 9 27 27 6 6 DIMM0_DDR2_DQS7_P 6 DIMM0_DDR2_DQS7_N 6 DIMM0_DDR2_DQ57 DIMM0_DDR2_DQ56 DIMM0_DDR2_DQ50 DIMM0_DDR2_DQ51 DIMM0_DDR2_DQ49 DIMM0_DDR2_DQ48 DIMM0_DDR2_DQ43 DIMM0_DDR2_DQ42 9 6 6 DIMM0_DDR2_DQ35 DIMM0_DDR2_DQ34 DIMM0_DDR2_ODT1 DIMM0_DDR2_S1_B 9 6 6 8 8 9 9 8 8 8 8 8 8 8 8 8 6 6 6 8 8 6 6 8,26 8,26 DIMM0_DDR2_CAS_B 5,26 DIMM0_DDR2_WE_B 5,26 DIMM0_DDR2_BA0 DIMM0_DDR2_A10 9 9 27 DIMM0_DDR2_DQS4_P 8 DIMM0_DDR2_DQS4_N 8 DIMM0_DDR2_DQ33 DIMM0_DDR2_DQ32 26 26 9 9 DIMM0_DDR2_DQS5_P 8 DIMM0_DDR2_DQS5_N 8 DIMM0_DDR2_DQ41 DIMM0_DDR2_DQ40 9 9 6 6 DIMM0_DDR2_DQS6_P 6 DIMM0_DDR2_DQS6_N 6 NC DIMM0_DDR2_SA2 9 9 6,26 5,26 NC 8,26 DIMM0_DDR2_DQM0 NC DIMM0_DDR2_DQ6 DIMM0_DDR2_DQ7 DIMM0_DDR2_DQ12 DIMM0_DDR2_DQ13 DIMM0_DDR2_DQM1 NC DIMM0_DDR2_CK2_N DIMM0_DDR2_CK2_P DIMM0_DDR2_DQ14 DIMM0_DDR2_DQ15 DIMM0_DDR2_DQ20 DIMM0_DDR2_DQ21 DIMM0_DDR2_DQM2 NC DIMM0_DDR2_DQ22 DIMM0_DDR2_DQ23 DIMM0_DDR2_DQ28 DIMM0_DDR2_DQ29 DIMM0_DDR2_DQM3 NC DIMM0_DDR2_DQ30 DIMM0_DDR2_DQ31 DIMM0_DDR2_CB4 DIMM0_DDR2_CB5 DIMM0_DDR2_DQM8 NC DIMM0_DDR2_CB6 DIMM0_DDR2_CB7 DIMM0_DDR2_CKE1 NC NC 5,26 5,26 5,26 5,26 DIMM0_DDR2_A2 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 DIMM0_DDR2_DQ4 DIMM0_DDR2_DQ5 DIMM0_DDR2_A12 DIMM0_DDR2_A9 DIMM0_DDR2_A8 DIMM0_DDR2_A6 121_VSS 122_DQ4 123_DQ5 124_VSS 125_DM0/DQS9 126_NC/DQS9_N 127_VSS 128_DQ6 129_DQ7 130_VSS 131_DQ12 132_DQ13 133_VSS 134_DM1/DQS1 135_NC/DQS10 136_VSS 137_RFU 138_RFU 139_VSS 140_DQ14 141_DQ15 142_VSS 143_DQ20 144_DQ21 145_VSS 146_DM2/DQS1 147_NC/DQS11 148_VSS 149_DQ22 150_DQ23 151_VSS 152_DQ28 153_DQ29 154_VSS 155_DM3/DQS1 156_NC/DQS12 157_VSS 158_DQ30 159_DQ31 160_VSS 161_CB4 162_CB5 163_VSS 164_DM8/DQS1 165_NC/DQS17 166_VSS 167_CB6 168_CB7 169_VSS 170_VDDQ 171_CKE1 172_VDD 173_NC 174_NC 175_VDDQ 176_A12 177_A9 178_VDD 179_A8 180_A6 181_VDDQ MH3 MH2 MH1 243 242 241 VCC3V3 NC NC NC C152 0.1UF SA1_240 SA0_239 VDDSPD_238 VSS_237 DQ63_236 DQ62_235 VSS_234 NC/DQS16_233 DM7/DQS1_232 VSS_231 DQ61_230 DQ60_229 VSS_228 DQ55_227 DQ54_226 VSS_225 NC/DQS15_224 DM6/DQS1_223 VSS_222 RFU_221 RFU_220 VSS_219 DQ53_218 DQ52_217 VSS_216 DQ47_215 DQ46_214 VSS_213 NC/DQS14_212 DM5/DQS1_211 VSS_210 DQ45_209 DQ44_208 VSS_207 DQ39_206 DQ38_205 VSS_204 NC/DQS13_203 DM4/DQS1_202 VSS_201 DQ37_200 DQ36_199 VSS_198 VDD_197 NC/A13_196 ODT0_195 VDDQ_194 S0_N_193 RAS_N_192 VDDQ_191 BA1_190 VDD_189 A0_188 VDD_187 CK0_N_186 CK0_185 VDD_184 A1_183 A3_182 240 239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220 219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 DIMM0_DDR2_SA1 DIMM0_DDR2_SA0 27 27 DIMM0_DDR2_DQ63 DIMM0_DDR2_DQ62 6 6 NC DIMM0_DDR2_DQM7 6 DIMM0_DDR2_DQ61 DIMM0_DDR2_DQ60 6 6 DIMM0_DDR2_DQ55 DIMM0_DDR2_DQ54 6 6 NC DIMM0_DDR2_DQM6 6 DIMM0_DDR2_CK1_N DIMM0_DDR2_CK1_P 26 26 DIMM0_DDR2_DQ53 DIMM0_DDR2_DQ52 NC DIMM0_DDR2_DQ47 DIMM0_DDR2_DQ46 6 6 8 8 NC DIMM0_DDR2_DQM5 8 8 DIMM0_DDR2_DQ39 DIMM0_DDR2_DQ38 8 8 NC DIMM0_DDR2_DQM4 8 DIMM0_DDR2_DQ37 DIMM0_DDR2_DQ36 DIMM0_DDR2_S0_B DIMM0_DDR2_RAS_B DIMM0_DDR2_BA1 DIMM0_DDR2_A0 C 8 DIMM0_DDR2_DQ45 DIMM0_DDR2_DQ44 DIMM0_DDR2_A13 DIMM0_DDR2_ODT0 D 8 8 5,26 9,26 9,26 5,26 6,26 5,26 B DIMM0_DDR2_CK0_N DIMM0_DDR2_CK0_P DIMM0_DDR2_A1 DIMM0_DDR2_A3 26 26 5,26 5,26 5,26 VCC1V8 VCC1V8 VCC1V8 DDR2 DIMM0 CONNECTOR SCH P/N ART P/N FAB P/N DEVICE=DDR2_DIMM PKG_TYPE=CON-240-DDRAM PARTS=1 LEVEL=STD P48 DEVICE=DDR2_DIMM PKG_TYPE=CON-240-DDRAM PARTS=1 LEVEL=STD A P48 Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM DDR2 DIMM0 CONNECTOR I2C ADDR = 0xA8 A Date: 8-1-2008_15:08 Sheet Size: B Sheet 4 3 2 25 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 Since this is a source-sink power supply, split of decoupling capacitors between VTT-GND and VTT-VCC1V8 VCC1V8 VTT_DDR2 VTT_DDR2 RP14 1 D FB1 1 2 R386 1 DIMM0_AVDD_PLL 26 2 MPZXX 1 C803 10UF 2 C804 1 0.1UF C608 1 2200PF 2 2 5,25 5,25 5,25 DIMM0_DDR2_A12 DIMM0_DDR2_A11 DIMM0_DDR2_A7 NC 1 2 3 4 8 7 6 5 D C85 0.1UF C115 0.1UF C99 0.1UF C124 0.1UF C626 0.1UF C113 0.1UF C114 0.1UF 47.5 RP23 9,25 5,25 6,25 5,25 DIMM0_DDR2_S0_B DIMM0_DDR2_CAS_B DIMM0_DDR2_BA2 DIMM0_DDR2_A13 1 2 3 4 8 7 6 5 VTT_DDR2 47.5 VCC1V8 RP16 5,25 5,25 5,25 5,25 DIMM0_DDR2_A4 DIMM0_DDR2_A3 DIMM0_DDR2_A1 DIMM0_DDR2_A2 1 2 3 4 8 7 6 5 C625 0.1UF C118 0.1UF C86 0.1UF C120 0.1UF C982 0.1UF C212 0.1UF C83 0.1UF 47.5 VCC1V8 VCC1V8 RP17 1VDDQ 2CLKC2 3CLKT2 DIMM0_DDR2_PLL_CLKIN_P 4CLK_INT 5CLK_INC DIMM0_DDR2_PLL_CLKIN_N 6VDDQ2 7AGND 100 DIMM0_AVDD_PLL 8AVDD 26 9VDDQ3 2 1 10GND R36 20VDDQ4 NC 19CLKT8 Place R36 near U57 NC 18CLKC8 NC 17CLKC9 NC 16CLKT9 15VDDQ5 DIMM0_DDR2_CK0_P 14CLKT4 25,26 DIMM0_DDR2_CK0_N 13CLKC4 25,26 NC 12CLKC3 NC 11CLKT3 C 5 5 41 THERMPAD NC NC CLKC140 CLKT139 CLKT038 CLKC037 VDDQ636 CLKC535 CLKT534 CLKT633 CLKC632 VDDQ731 CLKC730 CLKT729 VDDQ828 FB_INT27 FB_INC26 FB_OUTC25 FB_OUTT24 VDDQ923 OE22 OS21 5,25 5,25 5,25 5,25 NC NC DIMM0_DDR2_CK2_P DIMM0_DDR2_CK2_N DIMM0_DDR2_A9 DIMM0_DDR2_A5 DIMM0_DDR2_A8 DIMM0_DDR2_A6 1 2 3 4 8 7 6 5 C 25,26 25,26 47.5 RP20 NC NC DIMM0_DDR2_CK1_P DIMM0_DDR2_CK1_N VTT_DDR2 8,25 5,25 5,25 25,26 25,26 DIMM0_DDR2_S1_B DIMM0_DDR2_A0 DIMM0_DDR2_A10 NC 1 2 3 4 NC NC 8 7 6 5 C73 220UF 6.3V 1 C170 10UF 2 X5R 10V C72 220UF 6.3V 1 C171 10UF 2 X5R 10V 1 C172 10UF 2 X5R 10V 47.5 100 DIMM0_DDR2_PLL_FB_P DIMM0_DDR2_PLL_FB_N 2 R35 1 Place R35 near U57.27 and U57.26 RP21 6,25 6,25 5,25 5,25 DIMM0_DDR2_BA1 DIMM0_DDR2_BA0 DIMM0_DDR2_RAS_B DIMM0_DDR2_WE_B 8 7 6 5 1 2 3 4 25,26 47.5 25,26 DIMM0_DDR2_CK0_N 5PF C461 DIMM0_DDR2_CK0_P DEVICE=ICS97U877K U57 25,26 DIMM0_DDR2_CK1_N B B Place these 5pf caps near DDR2 DIMM0 DIMM0_DDR2_PLL_FB* to be length matched to DIMM0_DDR2_CLKIN_* 25,26 9,25 DIMM0_DDR2_CKE0 R139 25,26 5PF C459 DIMM0_DDR2_CK1_P DIMM0_DDR2_CK2_N 4.75K 8,25 DIMM0_DDR2_CKE1 R18 25,26 4.75K 9,25 DIMM0_DDR2_ODT0 8,25 DIMM0_DDR2_ODT1 5PF C458 DIMM0_DDR2_CK2_P R17 4.75K R119 DIMM0 DDR2 SSTL-2 TERMINATION SCH P/N ART P/N FAB P/N 4.75K Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A DIMM0 DDR2 SSTL-2 TERMINATION A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 2 26 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCC1V8 VCC3V3 D 25 4.75K DIMM0_DDR2_RST_B 25 R34 D R21 DIMM0_DDR2_SA2 4.75K 25 R20 DIMM0_DDR2_SA1 4.75K 25 R19 DIMM0_DDR2_SA0 4.75K I2C ADDR2 = 0xA8 8,30,39,42,52,55,62,70 R23 IIC_SCL DIMM0_DDR2_SCL 25 DIMM0_DDR2_SDA 25 0 5,6,7,8,9,25,27,28,30,69 C 5,6,7,8,9,25,27,28,30,69 VREF_DDR2 VREF_DDR2 C157 0.1UF C158 0.1UF 8,30,39,42,52,55,62,70 C156 0.01UF R22 IIC_SDA C 0 C159 0.01UF 5,6,7,8,9,25,27,28,30,69 VREF_DDR2 C138 0.1UF 5,6,7,8,9,25,27,28,30,69 C139 0.01UF VREF_DDR2 C179 0.1UF C190 0.01UF B B VCC1V8 C940 C393 C938 C937 C944 C943 C942 C941 C945 C946 C947 C948 0.22UF0.22UF0.22UF0.22UF0.22UF0.22UF0.22UF0.22UF0.22UF0.22UF0.22UF0.22UF VCC1V8 DIMM0 DDR2 DECOUPLING 1 C961 X5R 2 10V 10UF 0805 A SCH P/N ART P/N FAB P/N 1 C962 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF X5R 2 10V C970 C969 C968 C967 C965 C966 10UF 0805 Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM DIMM0 DDR2 DECOUPLING A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 2 27 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCC1V8 DDR2_DIMM XYZ D 5,6,7,8,9,25,27,30,69 VREF_DDR2 6 6 6 6 6 6 6 6 6 6 30 6 6 C 6 6 6 6 6 6 7 7 7 7 7 7 9 9 9 9 9 9 B DDR2_DIMM XYZ 6,29 9,29 5,29 5,29 5,29 5,29 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 DIMM1_DDR2_DQ0 DIMM1_DDR2_DQ1 DIMM1_DDR2_DQS0_N DIMM1_DDR2_DQS0_P DIMM1_DDR2_DQ2 DIMM1_DDR2_DQ3 DIMM1_DDR2_DQ8 DIMM1_DDR2_DQ9 DIMM1_DDR2_DQS1_N DIMM1_DDR2_DQS1_P DIMM1_DDR2_RST_B NC DIMM1_DDR2_DQ10 DIMM1_DDR2_DQ11 DIMM1_DDR2_DQ16 DIMM1_DDR2_DQ17 DIMM1_DDR2_DQS2_N DIMM1_DDR2_DQS2_P DIMM1_DDR2_DQ18 DIMM1_DDR2_DQ19 DIMM1_DDR2_DQ24 DIMM1_DDR2_DQ25 DIMM1_DDR2_DQS3_N DIMM1_DDR2_DQS3_P DIMM1_DDR2_DQ26 DIMM1_DDR2_DQ27 DIMM1_DDR2_CB0 DIMM1_DDR2_CB1 DIMM1_DDR2_DQS8_N DIMM1_DDR2_DQS8_P DIMM1_DDR2_CB2 DIMM1_DDR2_CB3 DIMM1_DDR2_CKE0 DIMM1_DDR2_BA2 NC DIMM1_DDR2_A11 DIMM1_DDR2_A7 DIMM1_DDR2_A5 DIMM1_DDR2_A4 1_VREF 2_VSS 3_DQ0 4_DQ1 5_VSS 6_DQS0_N 7_DQS0 8_VSS 9_DQ2 10_DQ3 11_VSS 12_DQ8 13_DQ9 14_VSS 15_DQS1_N 16_DQS1 17_VSS 18_RESET_N 19_NC 20_VSS 21_DQ10 22_DQ11 23_VSS 24_DQ16 25_DQ17 26_VSS 27_DQS2_N 28_DQS2 29_VSS 30_DQ18 31_DQ19 32_VSS 33_DQ24 34_DQ25 35_VSS 36_DQS3_N 37_DQS3 38_VSS 39_DQ26 40_DQ27 41_VSS 42_CB0 43_CB1 44_VSS 45_DQS8_N 46_DQS8 47_VSS 48_CB2 49_CB3 50_VSS 51_VDDQ 52_CKE0 53_VDD 54_NC/BA2 55_NC 56_VDDQ 57_A11 58_A7 59_VDD 60_A5 61_A4 SCL_120 SDA_119 VSS_118 DQ59_117 DQ58_116 VSS_115 DQS7_114 DQS7_N_113 VSS_112 DQ57_111 DQ56_110 VSS_109 DQ51_108 DQ50_107 VSS_106 DQS6_105 DQS6_N_104 VSS_103 NC_102 SA2_101 VSS_100 DQ49_99 DQ48_98 VSS_97 DQ43_96 DQ42_95 VSS_94 DQS5_93 DQS5_N_92 VSS_91 DQ41_90 DQ40_89 VSS_88 DQ35_87 DQ34_86 VSS_85 DQS4_84 DQS4_N_83 VSS_82 DQ33_81 DQ32_80 VSS_79 VDDQ_78 S1_N_77 ODT1_76 VDDQ_75 CAS_N_74 WE_N_73 VDDQ_72 BA0_71 A10/AP_70 VDD_69 NC_68 VDD_67 VSS_66 VSS_65 VDD_64 A2_63 VDDQ_62 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 DIMM1_DDR2_SCL DIMM1_DDR2_SDA DIMM1_DDR2_DQ59 DIMM1_DDR2_DQ58 30 30 DIMM1_DDR2_DQS7_P 9 DIMM1_DDR2_DQS7_N 9 DIMM1_DDR2_DQ57 DIMM1_DDR2_DQ56 DIMM1_DDR2_DQ50 DIMM1_DDR2_DQ51 DIMM1_DDR2_DQ49 DIMM1_DDR2_DQ48 DIMM1_DDR2_DQ43 DIMM1_DDR2_DQ42 DIMM1_DDR2_DQ35 DIMM1_DDR2_DQ34 9 9 DIMM1_DDR2_ODT1 DIMM1_DDR2_S1_B DIMM1_DDR2_CAS_B DIMM1_DDR2_WE_B DIMM1_DDR2_BA0 DIMM1_DDR2_A10 DIMM1_DDR2_DQM1 NC DIMM1_DDR2_CK2_N DIMM1_DDR2_CK2_P 29 29 DIMM1_DDR2_DQ14 DIMM1_DDR2_DQ15 6 6 DIMM1_DDR2_DQ20 DIMM1_DDR2_DQ21 6 6 30 DIMM1_DDR2_DQM2 NC 6 9 9 7 7 DIMM1_DDR2_DQ22 DIMM1_DDR2_DQ23 6 6 DIMM1_DDR2_DQ28 DIMM1_DDR2_DQ29 7 7 DIMM1_DDR2_DQM3 NC 7 7 7 7 7 DIMM1_DDR2_DQS4_P 7 DIMM1_DDR2_DQS4_N 7 DIMM1_DDR2_DQ33 DIMM1_DDR2_DQ32 DIMM1_DDR2_DQ12 DIMM1_DDR2_DQ13 6 6 6 DIMM1_DDR2_DQS5_P 7 DIMM1_DDR2_DQS5_N 7 DIMM1_DDR2_DQ41 DIMM1_DDR2_DQ40 DIMM1_DDR2_DQ6 DIMM1_DDR2_DQ7 6 6 9 9 DIMM1_DDR2_DQS6_P 9 DIMM1_DDR2_DQS6_N 9 NC DIMM1_DDR2_SA2 DIMM1_DDR2_DQM0 NC 6 9 9 DIMM1_DDR2_DQ30 DIMM1_DDR2_DQ31 7 7 DIMM1_DDR2_CB4 DIMM1_DDR2_CB5 9 9 DIMM1_DDR2_DQM8 NC 9 7 7 DIMM1_DDR2_CB6 DIMM1_DDR2_CB7 9 9 7,29 7,29 7,29 NC NC NC 5,29 5,29 5,29 5,29 DIMM1_DDR2_A2 DIMM1_DDR2_CKE1 5,29 5,29 9,29 5,29 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 DIMM1_DDR2_DQ4 DIMM1_DDR2_DQ5 6 6 DIMM1_DDR2_A12 DIMM1_DDR2_A9 DIMM1_DDR2_A8 DIMM1_DDR2_A6 121_VSS 122_DQ4 123_DQ5 124_VSS 125_DM0/DQS9 126_NC/DQS9_N 127_VSS 128_DQ6 129_DQ7 130_VSS 131_DQ12 132_DQ13 133_VSS 134_DM1/DQS1 135_NC/DQS10 136_VSS 137_RFU 138_RFU 139_VSS 140_DQ14 141_DQ15 142_VSS 143_DQ20 144_DQ21 145_VSS 146_DM2/DQS1 147_NC/DQS11 148_VSS 149_DQ22 150_DQ23 151_VSS 152_DQ28 153_DQ29 154_VSS 155_DM3/DQS1 156_NC/DQS12 157_VSS 158_DQ30 159_DQ31 160_VSS 161_CB4 162_CB5 163_VSS 164_DM8/DQS1 165_NC/DQS17 166_VSS 167_CB6 168_CB7 169_VSS 170_VDDQ 171_CKE1 172_VDD 173_NC 174_NC 175_VDDQ 176_A12 177_A9 178_VDD 179_A8 180_A6 181_VDDQ MH3 MH2 MH1 SA1_240 SA0_239 VDDSPD_238 VSS_237 DQ63_236 DQ62_235 VSS_234 NC/DQS16_233 DM7/DQS1_232 VSS_231 DQ61_230 DQ60_229 VSS_228 DQ55_227 DQ54_226 VSS_225 NC/DQS15_224 DM6/DQS1_223 VSS_222 RFU_221 RFU_220 VSS_219 DQ53_218 DQ52_217 VSS_216 DQ47_215 DQ46_214 VSS_213 NC/DQS14_212 DM5/DQS1_211 VSS_210 DQ45_209 DQ44_208 VSS_207 DQ39_206 DQ38_205 VSS_204 NC/DQS13_203 DM4/DQS1_202 VSS_201 DQ37_200 DQ36_199 VSS_198 VDD_197 NC/A13_196 ODT0_195 VDDQ_194 S0_N_193 RAS_N_192 VDDQ_191 BA1_190 VDD_189 A0_188 VDD_187 CK0_N_186 CK0_185 VDD_184 A1_183 A3_182 243 242 241 VCC3V3 NC NC NC 240 239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220 219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 C906 0.1UF DIMM1_DDR2_SA1 DIMM1_DDR2_SA0 D 30 30 DIMM1_DDR2_DQ63 DIMM1_DDR2_DQ62 9 9 NC DIMM1_DDR2_DQM7 9 DIMM1_DDR2_DQ61 DIMM1_DDR2_DQ60 9 9 DIMM1_DDR2_DQ55 DIMM1_DDR2_DQ54 9 9 NC DIMM1_DDR2_DQM6 9 DIMM1_DDR2_CK1_N 29 DIMM1_DDR2_CK1_P 29 DIMM1_DDR2_DQ53 DIMM1_DDR2_DQ52 NC DIMM1_DDR2_DQ47 DIMM1_DDR2_DQ46 9 9 NC DIMM1_DDR2_DQM5 7 DIMM1_DDR2_DQ45 DIMM1_DDR2_DQ44 7 7 DIMM1_DDR2_DQ39 DIMM1_DDR2_DQ38 7 7 NC DIMM1_DDR2_DQM4 7 DIMM1_DDR2_DQ37 DIMM1_DDR2_DQ36 DIMM1_DDR2_A13 DIMM1_DDR2_ODT0 DIMM1_DDR2_S0_B DIMM1_DDR2_RAS_B C 7 7 7 7 5,29 6,29 6,29 5,29 DIMM1_DDR2_BA1 9,29 DIMM1_DDR2_A0 5,29 B DIMM1_DDR2_CK0_N 29 DIMM1_DDR2_CK0_P 29 DIMM1_DDR2_A1 DIMM1_DDR2_A3 5,29 5,29 5,29 VCC1V8 VCC1V8 VCC1V8 DDR2 DIMM1 CONNECTOR SCH P/N ART P/N FAB P/N DEVICE=DDR2_DIMM PKG_TYPE=CON-240-DDRAM PARTS=1 LEVEL=STD P9 DEVICE=DDR2_DIMM PKG_TYPE=CON-240-DDRAM PARTS=1 LEVEL=STD A P9 Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM DDR2 DIMM2 CONNECTOR I2C ADDR = 0xA6 A Date: 8-1-2008_15:08 Sheet Size: B Sheet 4 3 2 28 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 Since this is a source-sink power supply, split of decoupling capacitors between VTT-GND and VTT-VCC1V8 VCC1V8 VTT_DDR2 D D 1 FB50 1 2 R499 1 VTT_DDR2 AVDD_PLL_DIMM1 29 2 MPZXX C457 1 10UF 2 C474 1 0.1UF C472 1 2200PF 2 2 C898 0.1UF C891 0.1UF C892 0.1UF C893 0.1UF C894 0.1UF C895 0.1UF C896 0.1UF RP63 5,28 5,28 5,28 DIMM1_DDR2_A12 DIMM1_DDR2_A11 DIMM1_DDR2_A7 NC 1 2 3 4 8 7 6 5 47.5 VCC1V8 VTT_DDR2 RP72 5,28 5,28 5,28 5,28 DIMM1_DDR2_A4 DIMM1_DDR2_A3 DIMM1_DDR2_A1 DIMM1_DDR2_A2 1 2 3 4 8 7 6 5 C890 0.1UF C883 0.1UF C884 0.1UF C885 0.1UF C886 0.1UF C887 0.1UF C897 0.1UF 47.5 RP61 5,28 5,28 5,28 5,28 1 2 3 4 DIMM1_DDR2_A9 DIMM1_DDR2_A5 DIMM1_DDR2_A8 DIMM1_DDR2_A6 C 8 7 6 5 VTT_DDR2 47.5 C RP58 9,28 5,28 5,28 DIMM1_DDR2_BA2 DIMM1_DDR2_A0 DIMM1_DDR2_A10 NC 1 2 3 4 8 7 6 5 47.5 C183 220UF 6.3V 1 C180 10UF 2 X5R 10V C182 220UF 6.3V 1 C178 10UF 2 X5R 10V 1 C177 10UF 2 X5R 10V RP57 VCC1V8 9,28 9,28 5,28 5,28 VCC1V8 DIMM1_DDR2_BA1 DIMM1_DDR2_BA0 DIMM1_DDR2_RAS_B DIMM1_DDR2_WE_B 8 7 6 5 1 2 3 4 47.5 1VDDQ 2CLKC2 3CLKT2 4CLK_INT DIMM1_DDR2_PLL_CLKIN_P 5 5CLK_INC 6VDDQ2 DIMM1_DDR2_PLL_CLKIN_N 5 7AGND 100 AVDD_PLL_DIMM1 8AVDD 29 9VDDQ3 2 1 10GND R480 20VDDQ4 NC Place R480 near U26 19CLKT8 NC 18CLKC8 NC 17CLKC9 NC 16CLKT9 15VDDQ5 14CLKT4 DIMM1_DDR2_CK0_P 28,29 13CLKC4 DIMM1_DDR2_CK0_N 28,29 NC 12CLKC3 NC 11CLKT3 B 41 THERMPAD NC NC CLKC140 CLKT139 CLKT038 CLKC037 VDDQ636 CLKC535 CLKT534 CLKT633 CLKC632 VDDQ731 CLKC730 CLKT729 VDDQ828 FB_INT27 FB_INC26 FB_OUTC25 FB_OUTT24 VDDQ923 OE22 OS21 NC NC RP55 DIMM1_DDR2_CK2_P DIMM1_DDR2_CK2_N 6,28 5,28 7,28 5,28 28,29 28,29 NC NC DIMM1_DDR2_CK1_P DIMM1_DDR2_CK1_N DIMM1_DDR2_S0_B DIMM1_DDR2_CAS_B DIMM1_DDR2_S1_B DIMM1_DDR2_A13 28,29 8 7 6 5 1 2 3 4 28,29 DIMM1_DDR2_CK0_N 5PF C462 DIMM1_DDR2_CK0_P 47.5 28,29 28,29 NC NC 28,29 DIMM1_DDR2_CK1_N B 100 DIMM1_DDR2_PLL_FB_P DIMM1_DDR2_PLL_FB_N Place these 5pf caps near DDR2 DIMM1 2 R481 1 28,29 5PF C467 DIMM1_DDR2_CK1_P Place R480 near U26.27 and U26.26 28,29 6,28 4.75K DEVICE=ICS97U877K U26 7,28 DIMM1_DDR2_CK2_N R461 DIMM1_DDR2_CKE0 28,29 R568 DIMM1_DDR2_CKE1 5PF C471 DIMM1_DDR2_CK2_P 4.75K 6,28 R478 DIMM1_DDR2_ODT0 DIMM1_DDR2_PLL_FB* to be length matched to DIMM0_DDR2_CLKIN_* DIMM1 DDR2 SSTL-2 TERMINATION SCH P/N ART P/N FAB P/N 4.75K 7,28 R462 DIMM1_DDR2_ODT1 4.75K Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A DIMM1 DDR2 SSTL-2 TERMINATION A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 2 29 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCC1V8 D D 28 4.75K DIMM1_DDR2_RST_B 28 R605 R603 DIMM1_DDR2_SA2 4.75K 28 R601 DIMM1_DDR2_SA1 4.75K 28 R600 DIMM1_DDR2_SA0 VCC3V3 4.75K I2C ADDR2 = 0xA4 8,27,39,42,52,55,62,70 R604 IIC_SCL DIMM1_DDR2_SCL 28 DIMM1_DDR2_SDA 28 0 5,6,7,8,9,25,27,28,30,69 C 5,6,7,8,9,25,27,28,30,69 VREF_DDR2 VREF_DDR2 C902 0.1UF C922 0.1UF 8,27,39,42,52,55,62,70 C903 0.01UF R602 IIC_SDA C 0 C921 0.01UF 5,6,7,8,9,25,27,28,30,69 VREF_DDR2 C920 0.01UF C907 0.1UF 5,6,7,8,9,25,27,28,30,69 VREF_DDR2 C904 0.1UF C905 0.01UF B B VCC1V8 C952 C951 C950 C949 C956 C955 C954 C953 C957 C958 C959 C960 0.22UF0.22UF0.22UF0.22UF0.22UF0.22UF0.22UF0.22UF0.22UF0.22UF0.22UF0.22UF VCC1V8 DIMM1 DDR2 DECOUPLING SCH P/N ART P/N FAB P/N 1 C963 X5R 2 10V 10UF 0805 A 1 C964 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF X5R 2 10V C976 C975 C974 C973 C971 C972 10UF 0805 Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM DIMM1 DDR2 DECOUPLING A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 2 30 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 D D 31 31 PCIE_SLOTA_12V PCIE_SLOTA_3V3 31 31 PCIE_SLOTA_12V PCIE_SLOTA_3V3 33V_STDBY NC PCIE_SLOTA_3V3AUX PCIE_SLOTA_WAKE_B NC 31,70 3 13 13 13 13 14 14 14 14 GTP_122_TX0_P GTP_122_TX0_N GTP_122_TX1_P GTP_122_TX1_N GTP_126_TX0_P GTP_126_TX0_N GTP_126_TX1_P GTP_126_TX1_N NC 3 PCIE_SLOTA_PRSNT2_B 15 15 1 10K 15 15 GTP_130_TX1_P GTP_130_TX1_N GTP_134_TX0_P GTP_134_TX0_N R415 2 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 1 10K R408 2 R414 2 1 10K NC NC 1 10K 2 NC R26 B82 B81 B80 B79 B78 B77 B76 B75 B74 B73 B72 B71 B70 B69 B68 B67 B66 B65 B64 B63 B62 B61 B60 B59 B58 B57 B56 B55 B54 B53 B52 B51 B50 B49 B48 B47 B46 B45 B44 B43 1 10K RSVD2_N_82B PRSNT2_N_81B GND_80B HSOn15_79B HSOp15_78B GND_77B GND_76B HSOn14_75B HSOp14_74B GND_73B GND_72B HSOn13_71B HSOp13_70B GND_69B GND_68B HSOn12_67B HSOp12_66B GND_65B GND_64B HSOn11_63B HSOp11_62B GND_61B GND_60B HSOn10_59B HSOp10_58B GND_57B GND_56B HSOn9_55B HSOp9_54B GND_53B GND_52B HSOn8_51B HSOp8_50B GND_49B PRSNT2_N_48B GND_47B HSOn7_46B HSOp7_45B GND_44B GND_43B R562 2 NC NC 1 DNP 166 165 NC NC 3 NC NC PCIE_SLOTA_PERST_B 24 24 13 13 NC NC PCIE_SLOTA_CLK_P PCIE_SLOTA_CLK_N GTP_122_RX0_P GTP_122_RX0_N NC NC NC 13 13 NC NC 14 14 NC NC 14 14 GTP_122_RX1_P GTP_122_RX1_N GTP_126_RX0_P GTP_126_RX0_N GTP_126_RX1_P GTP_126_RX1_N NC NC NC NC 15 15 GTP_134_TX1_N 15 GTP_134_TX1_P 15 15 15 GTP_130_RX0_P GTP_130_RX0_N GTP_130_RX1_P GTP_130_RX1_N R559 2 B 15 15 GTP_130_TX0_P GTP_130_TX0_N 1B_12v 2B_12v 3B_12V 4B_GND 5B_SMCLK 6B_SMDAT 7B_GND 8B_3v3 9B_TRST_N 10B_3v3aux 11B_WAKE_N 12B_RSVD 13B_GND 14B_HSOp0 15B_HSOn0 16B_GND 17B_PRSNT2_N 18B_GND 19B_HSOp1 20B_HSOn1 21B_GND 22B_GND 23B_HSOp2 24B_HSOn2 25B_GND 26B_GND 27B_HSOp3 28B_HSOn3 29B_GND 30B_RSVD 31B_PRSNT2_N 32B_GND 33B_HSOp4 34B_HSOn4 35B_GND 36B_GND 37B_HSOp5 38B_HSOn5 39B_GND 40B_GND 41B_HSOp6 42B_HSOn6 MH2 MH1 PCI_E XYZ 1 10K 2 R39 1 10K B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 NC NC C VCC3V3 PCI_E XYZ R688 2 32,63,70 1A_PRSNT1_N 2A_12v 3A_12v 4A_GND 5A_TCK 6A_TDI 7A_TDO 8A_TMS 9A_3v3 10A_3v3 11A_PERST_N 12A_GND 13A_REFCLKP 14A_REFCLKN 15A_GND 16A_HSIp0 17A_HSIn0 18A_GND 19A_RSVD 20A_GND 21A_HSIp1 22A_HSIn1 23A_GND 24A_GND 25A_HSIp2 26A_HSIn2 27A_GND 28A_GND 29A_HSIp3 30A_HSIn3 31A_GND 32A_RSVD 33A_RSVD 34A_GND 35A_HSIp4 36A_HSIn4 37A_GND 38A_GND 39A_HSIp5 40A_HSIn5 41A_GND 42A_GND GND_82A HSIn15_81A HSIp15_80A GND_79A GND_78A HSIn14_77A HSIp14_76A GND_75A GND_74A HSIn13_73A HSIp13_72A GND_71A GND_70A HSIn12_69A HSIp12_68A GND_67A GND_66A HSIn11_65A HSIp11_64A GND_63A GND_62A HSIn10_61A HSIp10_60A GND_59A GND_58A HSIn9_57A HSIp9_56A GND_55A GND_54A HSIn8_53A HSIp8_52A GND_51A RSVD_50A GND_49A HSIn7_48A HSIp7_47A GND_46A GND_45 HSIn6_44A HSIp6_43A A82 A81 A80 A79 A78 A77 A76 A75 A74 A73 A72 A71 A70 A69 A68 A67 A66 A65 A64 A63 A62 A61 A60 A59 A58 A57 A56 A55 A54 A53 A52 A51 A50 A49 A48 A47 A46 A45 A44 A43 NC NC NC NC NC NC C NC NC NC NC NC NC NC NC NC NC NC GTP_134_RX1_N 15 GTP_134_RX1_P 15 GTP_134_RX0_N 15 GTP_134_RX0_P 15 B VCC3V3 P53 P53 DEVICE=PCI_E PKG_TYPE=CON_PCI-E_164 PARTS=1 LEVEL=STD 31 A PCIE_SLOTA_12V C298 22UF 25V DEVICE=PCI_E PKG_TYPE=CON_PCI-E_164 PARTS=1 LEVEL=STD 31 C658 0.1UF C329 0.1UF C384 0.1UF C661 0.1UF C659 0.1UF 31,70 PCIE_SLOTA_3V3 C305 220UF 6.3V C377 0.1UF C328 0.1UF PCI-E SLOT A SCH P/N ART P/N FAB P/N PCIE_SLOTA_3V3AUX 0381255 0532059 1280432 C780 0.1UF C325 0.1UF Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM PCI-E SLOT A A Date: 8-1-2008_15:08 Sheet Size: B Sheet 4 3 2 31 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 D 32 32 PCI_E XYZ 32,70 3 NC PCIE_SLOTB_3V3AUX PCIE_SLOTB_WAKE_B NC GTP_128_TX0_P 14 GTP_128_TX0_N 14 C GTP_128_TX1_P 14 GTP_128_TX1_N 14 GTP_132_TX0_P 15 GTP_132_TX0_N 15 GTP_132_TX1_P 15 GTP_132_TX1_N 15 NC NC NC NC NC PCIE_SLOTB_PRSNT2_B R419 2 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 1 10K NC NC R417 2 NC 1 10K B82 B81 B80 B79 B78 B77 B76 B75 B74 B73 B72 B71 B70 B69 B68 B67 B66 B65 B64 B63 B62 B61 B60 B59 B58 B57 B56 B55 B54 B53 B52 B51 B50 B49 B48 B47 B46 B45 B44 B43 R416 2 RSVD2_N_82B PRSNT2_N_81B GND_80B HSOn15_79B HSOp15_78B GND_77B GND_76B HSOn14_75B HSOp14_74B GND_73B GND_72B HSOn13_71B HSOp13_70B GND_69B GND_68B HSOn12_67B HSOp12_66B GND_65B GND_64B HSOn11_63B HSOp11_62B GND_61B GND_60B HSOn10_59B HSOp10_58B GND_57B GND_56B HSOn9_55B HSOp9_54B GND_53B GND_52B HSOn8_51B HSOp8_50B GND_49B PRSNT2_N_48B GND_47B HSOn7_46B HSOp7_45B GND_44B GND_43B 1 10K NC NC NC NC 3 PCIE_SLOTB_PERST_B NC NC NC NC 24 24 14 14 PCIE_SLOTB_CLK_P PCIE_SLOTB_CLK_N GTP_128_RX0_P GTP_128_RX0_N NC NC NC 14 14 NC NC 15 15 NC NC 15 15 GTP_128_RX1_P GTP_128_RX1_N GTP_132_RX0_P GTP_132_RX0_N GTP_132_RX1_P GTP_132_RX1_N NC NC NC NC NC NC NC NC NC NC 1 10K NC NC 166 165 1 DNP NC NC 1B_12v 2B_12v 3B_12V 4B_GND 5B_SMCLK 6B_SMDAT 7B_GND 8B_3v3 9B_TRST_N 10B_3v3aux 11B_WAKE_N 12B_RSVD 13B_GND 14B_HSOp0 15B_HSOn0 16B_GND 17B_PRSNT2_N 18B_GND 19B_HSOp1 20B_HSOn1 21B_GND 22B_GND 23B_HSOp2 24B_HSOn2 25B_GND 26B_GND 27B_HSOp3 28B_HSOn3 29B_GND 30B_RSVD 31B_PRSNT2_N 32B_GND 33B_HSOp4 34B_HSOn4 35B_GND 36B_GND 37B_HSOp5 38B_HSOn5 39B_GND 40B_GND 41B_HSOp6 42B_HSOn6 MH2 MH1 PCI_E XYZ R689 2 R40 1 10K B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 R563 2 VCC3V3 2 31,63,70 PCIE_SLOTB_12V PCIE_SLOTB_3V3 1 10K 33V_STDBY 3 1 PCIE_SLOTB_12V PCIE_SLOTB_3V3 R418 2 32 32 1 10K D 2 GND_82A HSIn15_81A HSIp15_80A GND_79A GND_78A HSIn14_77A HSIp14_76A GND_75A GND_74A HSIn13_73A HSIp13_72A GND_71A GND_70A HSIn12_69A HSIp12_68A GND_67A GND_66A HSIn11_65A HSIp11_64A GND_63A GND_62A HSIn10_61A HSIp10_60A GND_59A GND_58A HSIn9_57A HSIp9_56A GND_55A GND_54A HSIn8_53A HSIp8_52A GND_51A RSVD_50A GND_49A HSIn7_48A HSIp7_47A GND_46A GND_45 HSIn6_44A HSIp6_43A A82 A81 A80 A79 A78 A77 A76 A75 A74 A73 A72 A71 A70 A69 A68 A67 A66 A65 A64 A63 A62 A61 A60 A59 A58 A57 A56 A55 A54 A53 A52 A51 A50 A49 A48 A47 A46 A45 A44 A43 NC NC NC NC NC NC NC NC C NC NC NC NC NC NC NC NC NC NC NC NC NC B R560 2 B 1A_PRSNT1_N 2A_12v 3A_12v 4A_GND 5A_TCK 6A_TDI 7A_TDO 8A_TMS 9A_3v3 10A_3v3 11A_PERST_N 12A_GND 13A_REFCLKP 14A_REFCLKN 15A_GND 16A_HSIp0 17A_HSIn0 18A_GND 19A_RSVD 20A_GND 21A_HSIp1 22A_HSIn1 23A_GND 24A_GND 25A_HSIp2 26A_HSIn2 27A_GND 28A_GND 29A_HSIp3 30A_HSIn3 31A_GND 32A_RSVD 33A_RSVD 34A_GND 35A_HSIp4 36A_HSIn4 37A_GND 38A_GND 39A_HSIp5 40A_HSIn5 41A_GND 42A_GND P54 VCC3V3 P54 DEVICE=PCI_E PKG_TYPE=CON_PCI-E_164 PARTS=1 LEVEL=STD DEVICE=PCI_E PKG_TYPE=CON_PCI-E_164 PARTS=1 LEVEL=STD PCI-E SLOT B SCH P/N ART P/N FAB P/N 32 PCIE_SLOTB_12V A C310 22UF 25V 32 C788 0.1UF C789 0.1UF C787 0.1UF C783 0.1UF C782 0.1UF 32,70 PCIE_SLOTB_3V3 C786 0.1UF C311 220UF 6.3V C785 0.1UF PCIE_SLOTB_3V3AUX C781 0.1UF C784 0.1UF Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM PCI-E SLOT B A Date: 8-1-2008_15:08 Sheet Size: B Sheet 4 0381255 0532059 1280432 3 2 32 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 PCI-PCI BRIDGE 1 VCC3V3 PCI2250_PGF D 8,35,37,40 8,35,37,40 8,35,37,40 10,35,37,40 74P_GNT_N PCI_P_REQ4_B 8,38 VCC3V3 135P_C/BE0_N 117P_C/BE1_N 105P_C/BE2_N 91P_C/BE3_N PCI_P_GNT4_B 8,38 B PCI_P_CBE0_B PCI_P_CBE1_B PCI_P_CBE2_B PCI_P_CBE3_B 39 8,35,37,38,40 8,35,37,38,40 8,35,37,38,40 10,35,37,38 8,35,37,40 8,35,37,38 10,35,37,38 8,35,37,38,40 8,35,37,38,40 8,35,37,38,40 33 4.75K 75P_REQ_N PCI_P_CLK4 PCI_P_DEVSEL_B PCI_P_FRAME_B PCI_P_IRDY_B PCI_P_LOCK_B PCI_P_PAR PCI_P_PERR_B PCI_P_RST_B PCI_P_SERR_B PCI_P_STOP_B PCI_P_TRDY_B PCI_P_IDSEL 72P_CLK 110P_DEVSEL_N 106P_FRAME_N 107P_IRDY_N 112P_MFUNC 116P_PAR 114P_PERR_N 70P_RST_N 115P_SERR_N 111P_STOP_N 109P_TRDY_N 93P_IDSEL PCIBR_GOZ_B R25 PCIBR_MS0 PCIBR_MS1 33 33 NC 69GOZ_N 68NO/HSLED 132MS0 174MS1/BPCC SECONDARY C U32 147P_AD0 146P_AD1 144P_AD2 143P_AD3 141P_AD4 140P_AD5 138P_AD6 137P_AD7 128P_AD8 127P_AD9 125P_AD10 124P_AD11 123P_AD12 121P_AD13 120P_AD14 119P_AD15 103P_AD16 102P_AD17 101P_AD18 99P_AD19 98P_AD20 97P_AD21 95P_AD22 94P_AD23 86P_AD24 84P_AD25 83P_AD26 82P_AD27 80P_AD28 79P_AD29 78P_AD30 76P_AD31 PCI_P_AD0 PCI_P_AD1 PCI_P_AD2 PCI_P_AD3 PCI_P_AD4 PCI_P_AD5 PCI_P_AD6 PCI_P_AD7 PCI_P_AD8 PCI_P_AD9 PCI_P_AD10 PCI_P_AD11 PCI_P_AD12 PCI_P_AD13 PCI_P_AD14 PCI_P_AD15 PCI_P_AD16 PCI_P_AD17 PCI_P_AD18 PCI_P_AD19 PCI_P_AD20 PCI_P_AD21 PCI_P_AD22 PCI_P_AD23 PCI_P_AD24 PCI_P_AD25 PCI_P_AD26 PCI_P_AD27 PCI_P_AD28 PCI_P_AD29 PCI_P_AD30 PCI_P_AD31 PRIMARY 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,39,40 10,33,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 10,35,37,40 PCI_S_AD0 PCI_S_AD1 PCI_S_AD2 PCI_S_AD3 PCI_S_AD4 PCI_S_AD5 PCI_S_AD6 PCI_S_AD7 PCI_S_AD8 PCI_S_AD9 PCI_S_AD10 PCI_S_AD11 PCI_S_AD12 PCI_S_AD13 PCI_S_AD14 PCI_S_AD15 PCI_S_AD16 PCI_S_AD17 PCI_S_AD18 PCI_S_AD19 PCI_S_AD20 PCI_S_AD21 PCI_S_AD22 PCI_S_AD23 PCI_S_AD24 PCI_S_AD25 PCI_S_AD26 PCI_S_AD27 PCI_S_AD28 PCI_S_AD29 PCI_S_AD30 PCI_S_AD31 S_AD0 S_AD1 S_AD2 S_AD3 S_AD4 S_AD5 S_AD6 S_AD7 S_AD8 S_AD9 S_AD10 S_AD11 S_AD12 S_AD13 S_AD14 S_AD15 S_AD16 S_AD17 S_AD18 S_AD19 S_AD20 S_AD21 S_AD22 S_AD23 S_AD24 S_AD25 S_AD26 S_AD27 S_AD28 S_AD29 S_AD30 S_AD31 148 150 151 152 154 155 156 158 160 162 163 164 166 167 169 170 16 18 19 20 22 23 24 26 28 30 31 33 34 35 37 38 S_C/BE0_N S_C/BE1_N S_C/BE2_N S_C/BE3_N 159 172 15 27 PCI_S_CBE0_B PCI_S_CBE1_B PCI_S_CBE2_B PCI_S_CBE3_B S_GNT0_N S_GNT1_N S_GNT2_N S_GNT3_N 49 50 51 53 PCI_S_GNT0_B PCI_S_GNT1_B PCI_S_GNT2_B PCI_S_GNT3_B S_REQO_N S_REQ1_N S_REQ2_N S_REQ3_N 39 40 42 47 PCI_S_REQ0_B PCI_S_REQ1_B PCI_S_REQ2_B PCI_S_REQ3_B 34,38 36,38 38 38 S_CLKOUT0 S_CLKOUT1 S_CLKOUT2 S_CLKOUT3 S_CLKOUT4 59 61 63 65 67 PCI_S_CLK0_R PCI_S_CLK1_R PCI_S_CLK2_R PCI_S_CLK3_R PCI_S_CLK4_R 33 33 33 33 33 S_CLK S_DEVSEL_N S_FRAME_N S_IRDY_N S_MFUNC S_PAR S_PERR_N S_RST_N S_SERR_N S_STOP_N S_TRDY_N 57 9 13 12 7 3 6 54 5 8 11 PCI_S_CLK4 PCI_S_DEVSEL_B PCI_S_FRAME_B PCI_S_IRDY_B PCI_S_LOCK_B PCI_S_PAR PCI_S_PERR_B PCI_S_RST_B PCI_S_SERR_B PCI_S_STOP_B PCI_S_TRDY_B S_VCCP 58 C437 0.1UF 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 34,36 C439 0.1UF S_C/CFN_N C445 0.1UF C453 0.1UF C432 0.1UF C452 0.1UF C450 0.1UF C451 0.1UF VCC3V3 C449 0.1UF C448 0.1UF C444 0.1UF C441 0.1UF C438 0.1UF C436 0.1UF C427 0.1UF C428 0.1UF C430 0.1UF C429 0.1UF VCC3V3 33 R335 PCIBR_MS0 4.75K 33 R365 PCIBR_MS1 4.75K C 33 34,36 34,36 34,36 34,36 R377 PCIBR_CFN_B 0 34,38 36,38 38 38 10,33,35,37,40 R383 PCI_P_AD25 0 33 PCI_P_IDSEL 24.9 33 PCI_S_CLK0_R PCI_S_CLK0 34 PCI_S_CLK1 36 PCI_S_CLK4 33 R378 33 34,36,38 34,36,38 34,36,38 34,36,38 34,36 34,36,38 34,36,38 34,36,38 34,36,38 34,36,38 24.9 33 PCI_S_CLK1_R B R379 24.9 33 PCI_S_CLK2_R NC R380 VCC5V PCIBR_CFN_B C431 0.1UF D 24.9 33 55 C442 0.1UF PCI_S_CLK3_R NC R381 33 73P_VCCP 24.9 33 PCI2250 PCI_S_CLK4_R R363 VCC3V3;10,17,25,32,44,52,62,66,81,88,100 VCC3V3;108,118,126,139,145,153,161,168,176 GND;1,14,21,29,36,45,56,60,64,71,77,89 GND;96,104,113,122,130,133,142,149,157,165,171 PCI-PCI BRIDGE VCC5V SCH P/N ART P/N FAB P/N NC=2,4,41,43,46,48,85,87,90,92,129,131,134,136,173,175 0381255 0532059 1280432 C434 0.1UF Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A PCI-PCI BRIDGE A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 2 33 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 P6 PB02 SLOT6_TCK 34 NC 10,35,36,37,38,40 10,35,36,37,38,40 34 PCI_P_INTA_B PCI_P_INTC_B SLOT6_PRS1_B 34 SLOT6_PRS2_B NC NC PCI_S_REQ0_B 33,38 INTB_N INTD_N PRS1_N RES1 PRS2_N PB14 RES3 PB18 PB20 PB21 CLK REQ_N AD31 AD29 PCI_S_AD31 PCI_S_AD29 33,36 33,36 PCI_S_AD27 PCI_S_AD25 PB23 PB24 AD27 AD25 33,36 33,36 PCI_S_CBE3_B PCI_S_AD23 PB26 PB27 CBE3_N AD23 33,36 33,36 33,36,38 PCI_S_AD21 PCI_S_AD19 PB29 PB30 AD21 AD19 PCI_S_AD17 PCI_S_CBE2_B PB32 PB33 AD17 CBE2_N PCI_S_IRDY_B PB35 IRDY_N PB37 DVSL_N PCI_S_DEVSEL_B 33,36,38 33,36,38 33,36,38 33,36,38 PCI_S_LOCK_B PCI_S_PERR_B PB39 PB40 LOCK_N PERR_N PCI_S_SERR_B PB42 SERR_N 33,36 33,36 PCI_S_CBE1_B PCI_S_AD14 PB44 PB45 CBE1_N AD14 33,36 33,36 PCI_S_AD12 PCI_S_AD10 PB47 PB48 AD12 AD10 33,36 33,36 PCI_S_AD8 PCI_S_AD7 33,36 33,36 PCI_S_AD5 PCI_S_AD3 PB55 PB56 AD05 AD03 33,36 PCI_S_AD1 PB58 AD01 PB52 PB53 SLOT6_ACK64_B PB60 PA01 SLOT6_TRST_B 34 TMS TDI PA03 PA04 SLOT6_TMS SLOT6_TDI 34 34 INTA_N INTC_N PA06 PA07 PCI_P_INTD_B PCI_P_INTB_B 10,35,36,37,38,40 10,35,36,37,38,40 RES0 PA09 NC RES2 PA11 NC 3.3VAUX RST_N PA14 PA15 NC AD08 AD07 ACK64_N VCC3V3 RP4 1 2 3 4 SLOT6_TMS SLOT6_TDI SLOT6_TCK SLOT6_TRST_B 34 34 34 34 8 7 6 5 D 4.75K GNT_N PA17 PME_N AD30 PA19 PA20 AD28 AD26 PCI_S_RST_B 33,36,38 PCI_S_GNT0_B NC 33,38 PCI_S_AD30 33,36 PA22 PA23 PCI_S_AD28 PCI_S_AD26 33,36 33,36 AD24 IDSEL PA25 PA26 PCI_S_AD24 SLOT6_IDSEL 33,36 34 AD22 AD20 PA28 PA29 PCI_S_AD22 PCI_S_AD20 33,36 33,36 AD18 AD16 PA31 PA32 PCI_S_AD18 PCI_S_AD16 33,34,36 33,36 FRAM_N PA34 PCI_S_FRAME_B 33,36,38 TRDY_N PA36 PCI_S_TRDY_B 33,36,38 STOP_N PA38 PCI_S_STOP_B RES4 RES5 PA40 PA41 PAR AD15 PA43 PA44 PCI_S_PAR PCI_S_AD15 33,36 33,36 AD13 AD11 PA46 PA47 PCI_S_AD13 PCI_S_AD11 33,36 33,36 AD09 PA49 PCI_S_AD9 33,36 CBE0_N PA52 PCI_S_CBE0_B 33,36 AD06 AD04 PA54 PA55 PCI_S_AD6 PCI_S_AD4 33,36 33,36 AD02 AD00 PA57 PA58 PCI_S_AD2 PCI_S_AD0 33,36 33,36 REQ64_N VCC3V3 4.75K R14 SLOT6_ACK64_B 34 4.75K C 34 SLOT6_PRS2_B 34 SLOT6_PRS1_B 33,36,38 NC NC PA60 R10 SLOT6_REQ64_B 34 C21 0.1UF 33,34,36 R6 PCI_S_AD18 0 SLOT6_IDSEL 34 SLOT6_REQ64_B C27 0.1UF 34 125 MH1 126 MH2 34 SLOT 33,36 33,36 33,36 33,36 C PB07 PB08 PB09 PB10 PB11 PB16 PCI_S_CLK0 33 TDO PCI 32 - 5.0V D PB04 TRST_N TCK B B NC NC VCC12V_P;PA02 VCC12V_N;PB01 VCC5V;PA05,PB05,PB06,PA08,PA61,PA62,PB61,PB62 VCC3V3;PA21,PB25,PA27,PB31,PA33,PB36 VCC3V3;PA39,PB41,PB43,PA45,PA53,PB54 VCCIO VCC5V;PA10,PA16,PB19,PB59,PA59 GND;PB03,PB15,PB17,PA18,PB22,PA24 GND;PB28,PA30,PB34,PA35,PA37,PB38 GND;PA42,PB46,PA48,PB49,PA56,PB57 GND;PB12,PA12,PB13,PA13 VCC12V_P VCC12V_N VCC5V PCI SLOT 6, 5.0V, SECONDARY BUS VCC3V3 SCH P/N ART P/N FAB P/N C32 22UF 25V A C14 0.1UF C10 0.1UF C80 100UF 10V C134 0.1UF C40 0.1UF C63 220UF 6.3V C68 0.1UF C56 0.1UF C50 0.1UF 0381255 0532059 1280432 C44 0.1UF Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM PCI SLOT 6, 5.0V, SECONDARY BUS A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 2 34 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 P5 PB02 SLOT5_TCK 35 PB04 NC D 10,34,36,37,38,40 10,34,36,37,38,40 35 PCI_P_INTC_B PCI_P_INTA_B SLOT5_PRS1_B 35 SLOT5_PRS2_B NC TRST_N PA01 SLOT5_TRST_B 35 TMS TDI PA03 PA04 SLOT5_TMS SLOT5_TDI 35 35 INTA_N INTC_N PA06 PA07 PCI_P_INTB_B PCI_P_INTD_B 10,34,36,37,38,40 10,34,36,37,38,40 RES0 PA09 NC RES2 PA11 NC 3.3VAUX RST_N PA14 PA15 NC TCK TDO PB07 PB08 PB09 PB10 PB11 INTB_N INTD_N PRS1_N RES1 PRS2_N PB14 RES3 VCC3V3 RP3 SLOT5_TMS SLOT5_TDI SLOT5_TCK SLOT5_TRST_B 35 35 35 35 1 2 3 4 8 7 6 5 D 4.75K NC PB18 PB20 PB21 CLK REQ_N AD31 AD29 10,33,37,40 10,33,37,40 PCI_P_AD31 PCI_P_AD29 10,33,37,40 10,33,37,40 PCI_P_AD27 PCI_P_AD25 PB23 PB24 AD27 AD25 10,33,37,40 10,33,37,40 PCI_P_CBE3_B PCI_P_AD23 PB26 PB27 CBE3_N AD23 PCI_P_AD21 PCI_P_AD19 PB29 PB30 AD21 AD19 10,33,37,40 8,33,37,40 PCI_P_AD17 PCI_P_CBE2_B PB32 PB33 AD17 CBE2_N PCI_P_IRDY_B PB35 IRDY_N PB37 DVSL_N 8,33,37,38,40 PCI_P_DEVSEL_B 8,33,37,38,40 10,33,37,38 8,33,37,38 8,33,37,38,40 8,33,37,40 10,33,37,40 10,33,37,40 10,33,37,40 PCI_P_LOCK_B PCI_P_PERR_B PB39 PB40 LOCK_N PERR_N PCI_P_SERR_B PB42 SERR_N PCI_P_CBE1_B PCI_P_AD14 PB44 PB45 CBE1_N AD14 PCI_P_AD12 PCI_P_AD10 PB47 PB48 AD12 AD10 PB52 PB53 AD08 AD07 10,33,37,40 10,33,37,40 PCI_P_AD8 PCI_P_AD7 10,33,37,40 10,33,37,40 PCI_P_AD5 PCI_P_AD3 PB55 PB56 AD05 AD03 10,33,37,40 PCI_P_AD1 PB58 AD01 SLOT5_ACK64_B PB60 ACK64_N GNT_N PA17 PME_N AD30 PA19 PA20 AD28 AD26 PCI_P_RST_B 10,33,37,38 PCI_P_GNT0_B NC 8,38 PCI_P_AD30 10,33,37,40 PA22 PA23 PCI_P_AD28 PCI_P_AD26 10,33,37,40 10,33,37,40 AD24 IDSEL PA25 PA26 PCI_P_AD24 SLOT5_IDSEL 10,33,37,39,40 35 AD22 AD20 PA28 PA29 PCI_P_AD22 PCI_P_AD20 10,33,37,40 10,33,37,40 AD18 AD16 PA31 PA32 PCI_P_AD18 PCI_P_AD16 10,33,37,40 10,33,37,40 FRAM_N PA34 PCI_P_FRAME_B 8,33,37,38,40 TRDY_N PA36 PCI_P_TRDY_B 8,33,37,38,40 STOP_N PA38 PCI_P_STOP_B RES4 RES5 PA40 PA41 PAR AD15 PA43 PA44 PCI_P_PAR PCI_P_AD15 8,33,37,40 10,33,37,40 AD13 AD11 PA46 PA47 PCI_P_AD13 PCI_P_AD11 10,33,37,40 10,33,37,40 AD09 PA49 PCI_P_AD9 10,33,37,40 CBE0_N PA52 PCI_P_CBE0_B AD06 AD04 PA54 PA55 PCI_P_AD6 PCI_P_AD4 10,33,37,40 10,33,37,40 AD02 AD00 PA57 PA58 PCI_P_AD2 PCI_P_AD0 10,33,37,40 10,33,37,40 REQ64_N VCC3V3 4.75K R13 SLOT5_ACK64_B 35 4.75K C 35 SLOT5_PRS2_B 35 SLOT5_PRS1_B 8,33,37,38,40 NC NC PA60 R9 SLOT5_REQ64_B 35 C20 0.1UF C26 0.1UF 8,33,37,40 10,33,35,37,40 0 SLOT5_IDSEL 35 SLOT5_REQ64_B R5 PCI_P_AD21 35 125 MH1 126 MH2 35 SLOT 10,33,35,37,40 10,33,37,40 PCI 32 - 3.3V PCI_P_REQ0_B 8,38 C PB16 PCI_P_CLK0 39 B B SIGNAL=GND; PA50, PA51, PB50, PB51 NC NC VCC12V_P;PA02 VCC12V_N;PB01 VCC5V;PA05,PB05,PB06,PA08 VCC5V;PA61,PB61,PA62,PB62 VCC3V3;PA21,PB25,PA27,PB31,PA33,PB36 VCC3V3;PA39,PB41,PB43,PA45,PA53,PB54 VCCIO VCC3V3;PA10,PA16,PB19,PB59,PA59 GND;PB03,PB15,PB17,PA18,PB22,PA24 GND;PB28,PA30,PB34,PA35,PA37,PB38 GND;PA42,PB46,PA48,PB49,PA56,PB57 VCC12V_P VCC12V_N VCC5V PCI SLOT 5, 3.3V, PRIMARY BUS VCC3V3 SCH P/N ART P/N FAB P/N C31 22UF 25V A C13 0.1UF C9 0.1UF C79 100UF 10V C133 0.1UF C39 0.1UF C62 220UF 6.3V C55 0.1UF C67 0.1UF C43 0.1UF 0381255 0532059 1280432 C49 0.1UF Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM PCI SLOT 5, 3.3V, PRIMARY BUS A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 2 35 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 P4 PB02 SLOT4_TCK 36 NC 10,34,35,37,38,40 10,34,35,37,38,40 36 PCI_P_INTB_B PCI_P_INTD_B SLOT4_PRS1_B 36 SLOT4_PRS2_B NC NC PCI_S_CLK1 33 PB07 PB08 PB09 PB10 PB11 INTB_N INTD_N PRS1_N RES1 PRS2_N PB14 RES3 PB18 CLK PB20 PB21 REQ_N PCI_S_AD31 PCI_S_AD29 33,34 33,34 PCI_S_AD27 PCI_S_AD25 PB23 PB24 AD27 AD25 33,34 33,34 PCI_S_CBE3_B PCI_S_AD23 PB26 PB27 CBE3_N AD23 33,34 33,34 33,34,38 33,34,38 33,34,38 33,34,38 AD31 AD29 PCI_S_AD21 PCI_S_AD19 PB29 PB30 AD21 AD19 PCI_S_AD17 PCI_S_CBE2_B PB32 PB33 AD17 CBE2_N PCI_S_IRDY_B PB35 IRDY_N PB37 DVSL_N PCI_S_DEVSEL_B 33,34,38 PCI_S_LOCK_B PCI_S_PERR_B PB39 PB40 LOCK_N PERR_N PCI_S_SERR_B PB42 SERR_N 33,34 33,34 PCI_S_CBE1_B PCI_S_AD14 PB44 PB45 CBE1_N AD14 33,34 33,34 PCI_S_AD12 PCI_S_AD10 PB47 PB48 AD12 AD10 33,34 33,34 PCI_S_AD8 PCI_S_AD7 33,34 33,34 PCI_S_AD5 PCI_S_AD3 PB55 PB56 AD05 AD03 33,34 PCI_S_AD1 PB58 AD01 PB52 PB53 SLOT4_ACK64_B SLOT4_TRST_B 36 PA03 PA04 SLOT4_TMS SLOT4_TDI 36 36 INTA_N INTC_N PA06 PA07 PCI_P_INTA_B PCI_P_INTC_B 10,34,35,37,38,40 10,34,35,37,38,40 RES0 PA09 NC RES2 PA11 NC 3.3VAUX RST_N PA14 PA15 NC AD08 AD07 PB60 VCC3V3 RP2 SLOT4_TMS SLOT4_TDI SLOT4_TCK SLOT4_TRST_B 36 36 36 36 1 2 3 4 8 7 6 5 D GNT_N PA17 PME_N AD30 PA19 PA20 AD28 AD26 33,34,38 NC 33,38 PCI_S_AD30 33,34 PA22 PA23 PCI_S_AD28 PCI_S_AD26 33,34 33,34 AD24 IDSEL PA25 PA26 PCI_S_AD24 SLOT4_IDSEL 33,34 36 AD22 AD20 PA28 PA29 PCI_S_AD22 PCI_S_AD20 33,34 33,34 AD18 AD16 PA31 PA32 PCI_S_AD18 PCI_S_AD16 33,34 33,34 FRAM_N PA34 PCI_S_FRAME_B 33,34,38 TRDY_N PA36 PCI_S_TRDY_B 33,34,38 STOP_N PA38 PCI_S_STOP_B RES4 RES5 PA40 PA41 PAR AD15 PA43 PA44 PCI_S_PAR PCI_S_AD15 33,34 33,34 AD13 AD11 PA46 PA47 PCI_S_AD13 PCI_S_AD11 33,34 33,34 AD09 PA49 PCI_S_AD9 33,34 CBE0_N PA52 PCI_S_CBE0_B 33,34 AD06 AD04 PA54 PA55 PCI_S_AD6 PCI_S_AD4 33,34 33,34 AD02 AD00 PA57 PA58 PCI_S_AD2 PCI_S_AD0 33,34 33,34 VCC3V3 R8 SLOT4_REQ64_B 36 4.75K R12 SLOT4_ACK64_B 36 4.75K C 36 SLOT4_PRS2_B 36 SLOT4_PRS1_B 33,34,38 NC NC PA60 REQ64_N ACK64_N PCI_S_RST_B PCI_S_GNT1_B C19 0.1UF 33,34,36 R4 PCI_S_AD19 0 36 SLOT4_REQ64_B C25 0.1UF SLOT4_IDSEL 36 125 MH1 126 MH2 36 PA01 TMS TDI 4.75K SLOT 33,34 33,34 33,34 33,34,36 C TDO PB16 PCI_S_REQ1_B 33,38 PB04 PCI 32 - 5.0V D TRST_N TCK B B NC NC VCC12V_P;PA02 VCC12V_N;PB01 VCC5V;PA05,PB05,PB06,PA08,PA61,PA62,PB61,PB62 VCC3V3;PA21,PB25,PA27,PB31,PA33,PB36 VCC3V3;PA39,PB41,PB43,PA45,PA53,PB54 VCCIO VCC5V;PA10,PA16,PB19,PB59,PA59 GND;PB03,PB15,PB17,PA18,PB22,PA24 GND;PB28,PA30,PB34,PA35,PA37,PB38 GND;PA42,PB46,PA48,PB49,PA56,PB57 GND;PB12,PA12,PB13,PA13 VCC12V_P VCC12V_N VCC5V PCI SLOT 4, 5.0V, SECONDARY BUS VCC3V3 SCH P/N ART P/N FAB P/N C30 22UF 25V A C12 0.1UF C8 0.1UF C78 100UF 10V C38 0.1UF C132 0.1UF C61 220UF 6.3V C54 0.1UF C66 0.1UF C48 0.1UF 0381255 0532059 1280432 C42 0.1UF Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM PCI SLOT 4, 5.0V, SECONDARY BUS A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 2 36 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 P3 SLOT3_TCK 37 PB02 PB04 NC D 10,34,35,36,38,40 10,34,35,36,38,40 37 PCI_P_INTD_B PCI_P_INTB_B SLOT3_PRS1_B 37 SLOT3_PRS2_B NC TRST_N PA01 SLOT3_TRST_B 37 TMS TDI PA03 PA04 SLOT3_TMS SLOT3_TDI 37 37 INTA_N INTC_N PA06 PA07 PCI_P_INTC_B PCI_P_INTA_B 10,34,35,36,38,40 10,34,35,36,38,40 RES0 PA09 NC RES2 PA11 NC 3.3VAUX RST_N PA14 PA15 NC TCK TDO PB07 PB08 PB09 PB10 PB11 INTB_N INTD_N PRS1_N RES1 PRS2_N PB14 RES3 VCC3V3 RP1 SLOT3_TMS SLOT3_TDI SLOT3_TCK SLOT3_TRST_B 37 37 37 37 1 2 3 4 8 7 6 5 D 4.75K NC PCI_P_REQ1_B 8,38 PB18 PB20 PB21 CLK REQ_N AD31 AD29 10,33,35,40 10,33,35,40 PCI_P_AD31 PCI_P_AD29 10,33,35,40 10,33,35,40 PCI_P_AD27 PCI_P_AD25 PB23 PB24 AD27 AD25 10,33,35,40 10,33,35,40 PCI_P_CBE3_B PCI_P_AD23 PB26 PB27 CBE3_N AD23 10,33,35,40 10,33,35,40 PCI_P_AD21 PCI_P_AD19 PB29 PB30 AD21 AD19 10,33,35,40 8,33,35,40 PCI_P_AD17 PCI_P_CBE2_B PB32 PB33 AD17 CBE2_N PCI_P_IRDY_B PB35 IRDY_N PB37 DVSL_N 8,33,35,38,40 PCI_P_DEVSEL_B 8,33,35,38,40 10,33,35,38 8,33,35,38 8,33,35,38,40 8,33,35,40 10,33,35,40 10,33,35,40 10,33,35,40 PCI_P_LOCK_B PCI_P_PERR_B PB39 PB40 LOCK_N PERR_N PCI_P_SERR_B PB42 SERR_N PCI_P_CBE1_B PCI_P_AD14 PB44 PB45 CBE1_N AD14 PCI_P_AD12 PCI_P_AD10 PB47 PB48 AD12 AD10 PB52 PB53 PCI_P_AD8 PCI_P_AD7 10,33,35,40 10,33,35,40 AD08 AD07 10,33,35,40 10,33,35,40 PCI_P_AD5 PCI_P_AD3 PB55 PB56 AD05 AD03 10,33,35,40 PCI_P_AD1 PB58 AD01 SLOT3_ACK64_B PB60 ACK64_N GNT_N PA17 PME_N AD30 PA19 PA20 AD28 AD26 PCI_P_RST_B 10,33,35,38 PCI_P_GNT1_B NC 8,38 PCI_P_AD30 10,33,35,40 PA22 PA23 PCI_P_AD28 PCI_P_AD26 10,33,35,40 10,33,35,40 AD24 IDSEL PA25 PA26 PCI_P_AD24 SLOT3_IDSEL 10,33,35,39,40 37 AD22 AD20 PA28 PA29 PCI_P_AD22 PCI_P_AD20 10,33,35,37,40 10,33,35,40 AD18 AD16 PA31 PA32 PCI_P_AD18 PCI_P_AD16 10,33,35,40 10,33,35,40 FRAM_N PA34 PCI_P_FRAME_B 8,33,35,38,40 TRDY_N PA36 PCI_P_TRDY_B 8,33,35,38,40 STOP_N PA38 PCI_P_STOP_B RES4 RES5 PA40 PA41 PAR AD15 PA43 PA44 PCI_P_PAR PCI_P_AD15 8,33,35,40 10,33,35,40 AD13 AD11 PA46 PA47 PCI_P_AD13 PCI_P_AD11 10,33,35,40 10,33,35,40 AD09 PA49 PCI_P_AD9 10,33,35,40 CBE0_N PA52 PCI_P_CBE0_B AD06 AD04 PA54 PA55 PCI_P_AD6 PCI_P_AD4 10,33,35,40 10,33,35,40 AD02 AD00 PA57 PA58 PCI_P_AD2 PCI_P_AD0 10,33,35,40 10,33,35,40 REQ64_N VCC3V3 4.75K R11 SLOT3_ACK64_B 37 4.75K C 37 SLOT3_PRS2_B 37 SLOT3_PRS1_B 8,33,35,38,40 NC NC PA60 R7 SLOT3_REQ64_B 37 C18 0.1UF C24 0.1UF 8,33,35,40 10,33,35,37,40 0 37 SLOT3_REQ64_B R3 PCI_P_AD22 SLOT3_IDSEL 37 125 MH1 126 MH2 37 SLOT C PB16 PCI 32 - 3.3V PCI_P_CLK1 39 B B SIGNAL=GND; PA50, PA51, PB50, PB51 NC NC VCC12V_P;PA02 VCC12V_N;PB01 VCC5V;PA05,PB05,PB06,PA08 VCC5V;PA61,PB61,PA62,PB62 VCC3V3;PA21,PB25,PA27,PB31,PA33,PB36 VCC3V3;PA39,PB41,PB43,PA45,PA53,PB54 VCCIO VCC3V3;PA10,PA16,PB19,PB59,PA59 GND;PB03,PB15,PB17,PA18,PB22,PA24 GND;PB28,PA30,PB34,PA35,PA37,PB38 GND;PA42,PB46,PA48,PB49,PA56,PB57 VCC12V_P VCC12V_N VCC5V PCI SLOT 3, 3.3V, PRIMARY BUS VCC3V3 SCH P/N ART P/N FAB P/N C29 22UF 25V A C11 0.1UF C7 0.1UF C77 100UF 10V C37 0.1UF C131 0.1UF C60 220UF 6.3V C53 0.1UF C65 0.1UF C41 0.1UF 0381255 0532059 1280432 C47 0.1UF Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM PCI SLOT 3, 3.3V, PRIMARY BUS A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 2 37 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 VCC3V3 1 VCC3V3 10,33,35,37 8,33,35,37,40 PCI_P_FRAME_B R177 33,34,36 PCI_S_FRAME_B 4.75K R133 PCI_P_RST_B 1.00K R178 4.75K VCC3V3 D 8,33,35,37,40 8,33,35,37,40 8,33,35,37,40 PCI_P_IRDY_B PCI_P_TRDY_B PCI_P_STOP_B R183 33,34,36 PCI_S_IRDY_B R184 D 4.75K 4.75K R192 R193 33,34,36 PCI_S_TRDY_B 4.75K 4.75K R210 R211 33,34,36 PCI_S_STOP_B 4.75K 33,34,36 R134 PCI_S_RST_B 4.75K VCC3V3 10,34,35,36,37,40 4.75K R131 PCI_P_INTA_B 4.75K 8,33,35,37,40 PCI_P_DEVSEL_B R204 33,34,36 PCI_S_DEVSEL_B R205 10,34,35,36,37,40 4.75K 4.75K R42 PCI_P_INTB_B 4.75K 8,33,35,37 PCI_P_PERR_B R234 33,34,36 PCI_S_PERR_B 4.75K R235 10,34,35,36,37,40 4.75K R43 PCI_P_INTC_B 4.75K 8,33,35,37,40 PCI_P_SERR_B R238 33,34,36 PCI_S_SERR_B 4.75K R239 10,34,35,36,37,40 4.75K R44 PCI_P_INTD_B C C 4.75K 10,33,35,37 PCI_P_LOCK_B R219 33,34,36 PCI_S_LOCK_B 4.75K R220 4.75K VCC3V3 8,35 PCI_P_GNT0_B VCC3V3 R321 33,34 PCI_S_GNT0_B 4.75K 8,37 PCI_P_GNT1_B 4.75K R323 33,36 PCI_S_GNT1_B 4.75K 8 PCI_P_GNT2_B 8,40 PCI_P_GNT3_B R317 33 PCI_S_GNT2_B PCI_P_GNT4_B R334 4.75K R319 33 PCI_S_GNT3_B 4.75K 8,33 R341 4.75K 4.75K B R346 R369 B 4.75K R391 4.75K VCC3V3 8,35 PCI_P_REQ0_B VCC3V3 R316 33,34 PCI_S_REQ0_B 4.75K 8,37 PCI_P_REQ1_B 4.75K R318 33,36 PCI_S_REQ1_B 4.75K 8 PCI_P_REQ2_B 8,40,43 PCI_P_REQ3_B R357 PCI BUS PULLUPS 4.75K R322 33 PCI_S_REQ2_B 4.75K A R359 SCH P/N ART P/N FAB P/N R354 0381255 0532059 1280432 4.75K R233 33 4.75K PCI_S_REQ3_B Title: R351 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM PCI BUS PULLUPS 4.75K A 8,33 PCI_P_REQ4_B Date: R370 7-10-2008_10:19 Sheet Size: B Ver: C Rev: 01 4.75K Sheet 4 3 2 38 of Drawn By 70 BF 1 4 3 2 1 NOTE: TRC_CLK RESISTOR ALLOWS CLOCK TERMINATION TO BE ADJUSTED INDEPENDENTLY OF OTHER I/O. D 35,39 8,27,30,42,52,55,62,70 R426 IIC_SCL FPGA_SCL 8 58 TRC_CLK R31 0 8,27,30,42,52,55,62,70 D 4.75K TRC_CLK_R 4 24.9 R427 IIC_SDA R2 PCI_P_CLK0 37,39 R1 PCI_P_CLK1 4.75K FPGA_SDA 8 58 0 ATCB_CLK R545 ATCB_CLK_R 24.9 3 VCC3V3 39,40 3,57,61 R164 PCI_P_CLK3 4.75K R440 FPGA_INIT 4.75K 33,39 R382 PCI_P_CLK4 4.75K 3,39 R439 PCI_P_CLK5 4.75K C C NOTE: THE PCI SPEC RECOMMENDS THAT CLOCKS BE PULLED LOW WHEN THE VCC5V BUS IS NOT ACTIVELY CLOCKED. VCC3_PCI U41 NC SHDN ADJ 4 BYP GND3 3 1 GND6 6 GND7 7 38.3 2 1206 5 22UF C236 10V OUT 1 IN R455 8 2 NOTE: PCI_CLK RESISTORS ALLOW CLOCK TERMINATION C237 3.3UF 6.3V TO BE ADJUSTED INDEPENDENTLY OF OTHER I/O. LT1763CS8 8 R50 PCI_P_CLK0_R PCI_P_CLK0 35,39 PCI_P_CLK1 37,39 26.1 1206 R454 24.9 8 R49 PCI_P_CLK1_R 24.9 B B NOTE: THE COMPONENT VALUES FOR THIS REGULATOR ARE TAKEN 8 FROM XAPP653. THIS DESIGN IS INTENDED TO SINK CURRENT R434 PCI_P_CLK3_R THROUGH THE 1206 RESISTORS WHEN THE CLAMP DIODES ON THE FPGA ARE CONDUCTING DURING OVERSHOOT. PCI_P_CLK3 39,40 PCI_P_CLK4 33,39 PCI_P_CLK5 3,39 24.9 8 THIS IS WHY R438 PCI_P_CLK4_R 24.9 THE VALUES ARE UNUSUAL RELATIVE TO THE LT1763 DATASHEET. 8 R437 PCI_P_CLK5_R 24.9 PCI SUPPLY AND TERMINATION SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A PCI SUPPLY AND TERMINATION A 7-10-2008_10:19 Date: 10,33,35,37,40 PCI_P_AD24 Sheet Size: B R435 PCI_FPGA_IDSEL 10 0 4 3 2 Sheet 39 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 40 M1535D+ UNUSED_PU33V_1 PCI_P_CLK3 NC NC 8,33,35,37,38 8,33,35,37,38 8,33,35,37,38 8,33,35,37,38 8,33,35,37,38 8,33,35,37,38 8,33,35,37 8,38 8,38,43 B 10,34,35,36,37,38 10,34,35,36,37,38 10,34,35,36,37,38 10,34,35,36,37,38 43 43 PCI_P_FRAME_B PCI_P_TRDY_B PCI_P_IRDY_B PCI_P_STOP_B PCI_P_DEVSEL_B PCI_P_SERR_B PCI_P_PAR B11 E8 PCI_REQJ PCICLK B10 C5 PCI_STPJ PCIRSTJ A3 C4 D4 A4 B4 D5 B5 PCI_P_GNT3_B PCI_P_REQ3_B A10 C11 PCI_P_INTA_B PCI_P_INTB_B PCI_P_INTC_B PCI_P_INTD_B UNUSED_INTEJ UNUSED_INTFJ F4 F5 G3 G4 G5 H4 F6 F7 F14 P6 VCC3V3 X4 PWG_RSM_RSTJ 42 OSC14M D10 OSC14_CLK CLK32KO V13 CLK32KO 43 USBCLK H5 USB_CLK 40 INIT CPURST IGNNEJ INTR NMI A20MJ C14 B13 C13 B12 C12 A14 SBR_INTR SBR_NMI 3,40 4,40 FERRJ A12 UNUSED_PU33V_4 43 NC NC NC R47 U10 40 40 10.0M PWG 3 1 NC NC 2 MC-156 32.768KHZ OSC32K_I C339 12PF C340 12PF R48 40 40 D 10.0M CBEJ0_N CBEJ1_N CBEJ2_N CBEJ3_N OSC32K_I OSC32K_II NC VCC3V3 4 X2 OE VCC 1 R106 4.75K 1 C336 0.1UF OSC PCI INTERFACE B7 A5 B3 D2 SOUTH BRIDGE 1/5 43 39 PCI_P_CBE0_B PCI_P_CBE1_B PCI_P_CBE2_B PCI_P_CBE3_B W6 Y6 OSC32KI OSC32KII U15 8,33,35,37 8,33,35,37 8,33,35,37 10,33,35,37 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 OSC32K_II 4 M1535DPLUS C A9 B9 C9 A8 B8 C8 D8 A7 C7 D7 E7 A6 B6 C6 D6 E6 C3 A2 B2 C2 A1 B1 C1 D3 D1 E3 E2 E1 F3 F2 F1 G2 BGA352-50M D 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37,39 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 10,33,35,37 PCI_P_AD0 PCI_P_AD1 PCI_P_AD2 PCI_P_AD3 PCI_P_AD4 PCI_P_AD5 PCI_P_AD6 PCI_P_AD7 PCI_P_AD8 PCI_P_AD9 PCI_P_AD10 PCI_P_AD11 PCI_P_AD12 PCI_P_AD13 PCI_P_AD14 PCI_P_AD15 PCI_P_AD16 PCI_P_AD17 PCI_P_AD18 PCI_P_AD19 PCI_P_AD20 PCI_P_AD21 PCI_P_AD22 PCI_P_AD23 PCI_P_AD24 PCI_P_AD25 PCI_P_AD26 PCI_P_AD27 PCI_P_AD28 PCI_P_AD29 PCI_P_AD30 PCI_P_AD31 1 40 USB_CLK R104 USB_CLK_R 3 OUT 24.9 GND 2 2 SG-636PCW 48.0000MHZ C VCC3V3 4 X12 1 OE VCC R107 4.75K FRAMEJ TRDYJ IRDYJ STOPJ DEVSELJ SERRJ PAR PDMA_REQJ PDMA_GNTJ PHLDAJ PHOLDJ INTAJ_MI INTBJ_S0 INTCJ_S1 INTDJ_S2 INTEJ INTFJ VCC_3C_1 VCC_3C_2 VCC_3C_3 VCC_3C_4 UNUSED_PU5V_1 UNUSED_PU5V_2 E4 E5 VCC_5A_1 VCC_5A_2 VCC_5A_3 VCC_5A_4 VCC_5A_5 E10 G6 N6 N15 R15 VCCR_5D_1 VCCR_5D_2 R7 R13 VCC_3B P15 VCCR_3E_1 VCCR_3E_2 VCCR_3E_3 R6 R8 R14 UPSPWR T10 VCC_G F15 1 C337 0.1UF OSC 43 43 40 OSC14_CLK R105 OSC14_CLK_R 3 OUT 24.9 GND 2 2 SG-636PCE 14.3181MHZ VCC5V VCC3V3 B R209 SBR_INTR 3,40 VCC3V3 4.75K R218 SBR_NMI 4,40 4.75K VCC5V VCC3V3 C371 0.1UF C381 0.1UF C368 0.1UF C389 0.1UF C369 0.1UF C385 0.1UF C394 C380 0.1UF 0.1UF C396 0.1UF PCI SOUTH BRIDGE, PART 1 SCH P/N ART P/N FAB P/N VCC3V3 Title: C372 A 0.1UF C395 0.1UF C378 0.1UF C390 0.1UF C391 0.1UF C383 0.1UF C382 0.1UF C379 0.1UF C980 0.1UF 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM C370 0.1UF PCI SOUTH BRIDGE, PART 1 A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 2 40 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 M1535D+ T6 T5 V9 U5 U6 USBP0+ USBP0- USB PORTS NC NC NC NC MOUSE KEYBRD USB1_OVCR_B USB0_OVCR_B USB_POWEN_B 45 45 45 W8 V8 USB0_D_P_R USB0_D_N_R 45 45 USBP1+ USBP1- U9 Y7 USB1_D_P_R USB1_D_N_R 45 45 USBP2+ USBP2- W7 V7 NC UNUSED_PD_1 43 USBP3+ USBP3- U8 T8 NC UNUSED_PD_2 43 IRRXH IRRX IRTX L4 L3 M1 UNUSED_PD_3 UNUSED_PD_4 43 43 KBCLK KBDATA U11 U12 KBCLK_R KBDATA_R 45 45 KBINH V12 KBINH 41,62 MSCLK MSDATA T11 T12 MSCLK_R MSDATA_R 45 45 NC NC GROUP F VCC=3.3V IrDA B NC NC NC NC IDE INTERFACE OVCRJ1 OVCRJ0 USB_PWENJ GPIO22 GPIO23 U15 K4 K2 K3 L2 K1 K5 J1 L1 SERIAL PORT2 SIN2 SOUT2 RTS2J DTR2J CTS2J DSR2J DCD2J RI2J PIDED0 PIDED1 PIDED2 PIDED3 PIDED4 PIDED5 PIDED6 PIDED7 PIDED8 PIDED9 PIDED10 PIDED11 PIDED12 PIDED13 PIDED14 PIDED15 G17 F20 F18 F16 E19 D20 D18 B20 C20 D19 E18 E20 F17 F19 G16 G18 PIDE_D0_R PIDE_D1_R PIDE_D2_R PIDE_D3_R PIDE_D4_R PIDE_D5_R PIDE_D6_R PIDE_D7_R PIDE_D8_R PIDE_D9_R PIDE_D10_R PIDE_D11_R PIDE_D12_R PIDE_D13_R PIDE_D14_R PIDE_D15_R 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 PIDEA0 PIDEA1 PIDEA2 H20 H19 J16 PIDE_A0_R PIDE_A1_R PIDE_A2_R 46 46 46 SIRQI PIDEDRQ PIDEDAKJ PIDERDY PIDEIORJ PIDEIOWJ PIDECS1J PIDECS3J CBLID_P N16 G19 H18 H17 H16 G20 J17 J18 D11 PIDE_INTRQ_R PIDE_DMARQ_R PIDE_DMACK_B_R PIDE_IORDY_R PIDE_DIOR_B_R PIDE_DIOW_B_R PIDE_CS1_B_R PIDE_CS3_B_R PIDE_PDIAG_B_R 46 46 46 46 46 46 46 46 46 SIDED0 SIDED1 SIDED2 SIDED3 SIDED4 SIDED5 SIDED6 SIDED7 SIDED8 SIDED9 SIDED10 SIDED11 SIDED12 SIDED13 SIDED14 SIDED15 A17 D16 B16 E15 C15 A15 D14 E13 D13 E14 B15 D15 A16 C16 E16 B17 SIDE_D0_R SIDE_D1_R SIDE_D2_R SIDE_D3_R SIDE_D4_R SIDE_D5_R SIDE_D6_R SIDE_D7_R SIDE_D8_R SIDE_D9_R SIDE_D10_R SIDE_D11_R SIDE_D12_R SIDE_D13_R SIDE_D14_R SIDE_D15_R 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 SIDEA0 SIDEA1 SIDEA2 A19 C18 B19 SIDE_A0_R SIDE_A1_R SIDE_A2_R 46 46 46 SIRQII SIDEDRQ SIDEDAKJ SIDERDY SIDEIORJ SIDEIOWJ SIDECS1J SIDECS3J CBLID_S P16 C17 B18 A18 E17 D17 C19 A20 E11 SIDE_INTRQ_R SIDE_DMARQ_R SIDE_DMACK_B_R SIDE_IORDY_R SIDE_DIOR_B_R SIDE_DIOW_B_R SIDE_CS1_B_R SIDE_CS3_B_R SIDE_PDIAG_B_R 46 46 46 46 46 46 46 46 46 VCC_F1 VCC_F2 G15 K16 NC SOUTH BRIDGE 3/5 PORT1 H2 J5 H1 J3 J4 H3 G1 J2 SERIAL SIN1 SOUT1 RTS1J DTR1J CTS1J DSR1J DCD1J RI1J M1535D+ NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC M1535DPLUS PARALLEL PORT SOUTH BRIDGE 2/5 C P1 R1 P2 T1 P3 R2 N1 R3 N2 N3 N4 N5 M2 M3 M4 M5 L5 BGA352-50M U15 M1535DPLUS BGA352-50M D STROBJ AUTOFDJ PD0 ERRORJ PD1 PRINITJ PD2 SLCTINJ PD3 PD4 PD5 PD6 PD7 PRNACKJ BUSY PE SLCT 1 D VCC5V R202 KBINH 41,62 4.75K C B VCC3V3 PCI SOUTH BRIDGE, PART 2-3 SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A PCI SOUTH BRIDGE, PART 2-3 A 7-10-2008_10:19 Date: Sheet Size: B Sheet 4 3 2 41 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 M1535D+ OFF_PWR0 OFF_PWR1 OFF_PWR2 V14 W14 Y14 SPLED Y13 SPLED RSM_ENT0 RSM_ENT1 RSM_ENT8 W11 Y11 Y10 RSM_ENT0 UNUSED_PU5V_3 UNUSED_PD_5 PMEJ RI W12 V11 UNUSED_PU33V_7 UNUSED_PD_6 IRQ8J Y12 UNUSED_PU5V_4 RSM_ENT3 T9 UNUSED_PD_7 SMIJ STPCLKJ SLEEPJ ZZ NUINP1 CPU_STPJ A13 B14 D12 E12 A11 C10 THRMJ T18 IIC_THERM_B 4,55 SQWO V6 SQWO 43 SMBCLK SMBDATA SMBALERTJ T7 U7 T2 SMB_SCL SMB_SDA IIC_ALERT_B 42 42 4,55 GPO_34 GPO_35 43 43 43 43 NC NC NC NC NC NC UNUSED_PU5V_5 UNUSED_PD_8 43 43 43 43 43 43 43 43 43 43 NC SOUND CNTRL Y9 W9 Y8 U1 P4 P5 R4 T4 ACGAME0 ACGAME1 ACGAME2 ACGAME3 ACGAME4 ACGAME5 ACGAME6 ACGAME7 V1 V2 V3 W1 W2 W3 Y1 Y2 ACGP_UPJ ACGP_MUTEJ ACGP_DOWNJ U3 U2 R5 FANOUT1 FANOUT2 FANIN2 W5 V5 Y5 NC NC SPDIF_OUT SPDIF_IN D9 U4 NC NC AC_RESET_B AC_SDATA_IN0 UNUSED_PD_9 AC_SDATA_OUT AC_SYNC AC_BIT_CLK 47 47 43 47 47 47 UNUSED_PD_10 43 NC NC NC NC NC NC NC NC UNUSED_PU5V_7 UNUSED_PU5V_8 UNUSED_PU5V_9 MISCELLANEOUS LOGIC AC97 INTERFACE ACRESETJ ACSDATA_IN0 ACSDATA_IN1 ACSDATA_OUT ACSYNC ACBIT_CLK ACMIDI_TXD ACMIDI_RXD FLOPPY DISK NC XD(ISA) BUS E9 P18 P19 UNUSED_PU33V_5 UNUSED_PU33V_6 U15 Y15 V10 NC SOUTH BRIDGE 5/5 POWER MANAGEMENT UNIT2 PWRBTNJ SLPBTNJ 40,42 M1535DPLUS POWER MANAGEMENT UNIT1 SOUTH BRIDGE 4/5 W10 W13 GPI25 GPO34 GPO35 B 1 M1535D+ PWG_RSM_RSTJ RSM_RSTJ SUSPENDJ BGA352-50M U15 M1535DPLUS C BGA352-50M D 2 43 43 43 XD0 XD1 XD2 XD3 XD4 XD5 XD6 XD7 U20 U19 U18 Y20 W20 V20 Y19 W19 NC NC NC NC NC NC NC NC SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 V19 Y18 W18 V18 Y17 W17 V17 U17 T17 R17 Y16 W16 V16 U16 T16 W15 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC BIOSA16 BIOSA17 BIOSA18 V15 U15 T15 NC NC NC MEMRJ MEMWJ IORJ IOWJ T14 U14 T13 U13 RDATAJ WGATEJ WDATAJ HDSELJ FD_DIRJ STEPJ DSKCHGJ DRV0J DRV1J MOT0J MOT1J WPROTJ TRK0J INDEXJ DENSEL M18 L19 L18 M19 L16 L17 M20 K19 K20 K17 K18 M16 L20 J20 J19 SPKR RTCAS RTCRW RTCDS ROMKBCSJ IRQSER T19 R20 R19 R18 T20 N19 GPI24 GPO29 GPO30 M17 N17 N18 PCSOJ PCS1J P20 R16 UNUSED_PU5V_6 43 RUN_ENT0 RUN_ENT1 RUN_ENT2 RUN_ENT3 UNUSED_PU5V_10 43 GPO10 LFRAMEJ LDRQJ D R181 4.75K 3 R175 SBR_PWG_RSM_RSTJ PWG_RSM_RSTJ 40,42 0 UNUSED_PU5V_19 UNUSED_PU5V_20 43 43 NC NC C UNUSED_PU5V_11 NC NC NC NC NC NC NC NC NC 43 R146 IIC_SCL UNUSED_PU5V_12 43 UNUSED_PU5V_13 UNUSED_PU5V_14 UNUSED_PU5V_15 43 43 43 SPKR 47,62 ROMKBCSJ UNUSED_PU5V_16 43 SMB_SCL 42 SMB_SDA 42 0 8,27,30,39,52,55,62,70 R150 IIC_SDA 8,27,30,39,52,55,62,70 0 NC NC NC NC 43 B NC Y3 V4 W4 Y4 NC NC NC NC T3 NC N20 P17 VCC3V3 GPO_29 GPO_30 43 43 PCS0J PCS1J 43 43 UNUSED_PU5V_17 UNUSED_PU5V_18 43 43 PCI SOUTH BRIDGE, PART 4-5 SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A PCI SOUTH BRIDGE, PART 4-5 A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 2 42 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 VCC5V 40 40 UNUSED_PU33V_1 10.0K D 40 1 VCC3V3 R130 UNUSED_PU5V_1 2 R169 10.0K R155 UNUSED_PU5V_2 D VCC5V 10.0K 42 R201 UNUSED_PU5V_3 40 UNUSED_PU33V_4 10.0K 42 42 UNUSED_PU33V_5 10.0K 42 R217 CLK32KO PULLED DOWN FOR NORMAL OPERATION GPO_34 42 42 UNUSED_PU33V_6 10.0K R51 RESERVED/PULLED HIGH FOR NORMAL OPERATION 1.00K 4.75K R236 10.0K R182 UNUSED_PU5V_5 40 10.0K R216 UNUSED_PU5V_4 R203 VCC3V3 R180 10.0K 42 R52 FLASH ROM FUNCTION MODE SELECT 1.00K POWER CONTROL ACTIVE LEVEL SELECT R190 RSM_ENT0 GPO_35 42 DISABLED ACTIVE HIGH 4.75K 42 R149 UNUSED_PU5V_6 42 UNUSED_PU33V_7 10.0K 10.0K 42 R126 UNUSED_PU5V_7 40 UNUSED_INTEJ 42 R125 UNUSED_PU5V_8 VCC5V VCC5V R55 10.0K 40 GPO_29 42 10.0K C R231 UNUSED_INTFJ R56 42 R132 RESERVED/PULLED HIGH FOR NORMAL OPERATION C R250 ROMKBCSJ 4.75K FLASH ROM FUNCTION MODE SELECT 4.75K DISABLED 10.0K GPO_30 42 R200 10.0K 4.75K 42 VCC3V3 R127 UNUSED_PU5V_9 10.0K 41 UNUSED_PD_1 R153 1.00K 42 UNUSED_PU5V_10 10.0K PCI_P_REQ3_B 8,38,40 R145 PHOLDJ 41 UNUSED_PD_2 R191 RESERVED/PULLED HIGH FOR NORMAL OPERATION 4.75K R167 1.00K 42 R266 UNUSED_PU5V_11 10.0K 41 UNUSED_PD_3 R129 42 PCS0J ENABLED 4.75K 1.00K 42 4MBIT FLASH ROM LINEAR MODE R253 R255 UNUSED_PU5V_12 10.0K 41 UNUSED_PD_4 R128 1.00K B 42 R268 UNUSED_PU5V_13 10.0K B 42 UNUSED_PD_5 VCC5V R189 SWITCH GPI24/IOCHRDY AND GPO30/AEN FUNCTIONS 1.00K 42 R256 UNUSED_PU5V_14 10.0K 42 42 UNUSED_PD_6 PCS1J R207 R251 GPI24 AND GPO30 ENABLED 4.75K 1.00K 42 R269 UNUSED_PU5V_15 10.0K 42 UNUSED_PD_7 R174 VCC5V 1.00K 42 CPU SUPPORT SELECT R265 UNUSED_PU5V_16 10.0K 42 UNUSED_PD_8 R176 42 SQWO R154 PENTIUM-II MODE 4.75K PCI SOUTH BRIDGE, CONFIG and UNUSED 1.00K 42 R254 UNUSED_PU5V_17 10.0K 42 UNUSED_PD_9 VCC5V R162 1.00K 42 R262 UNUSED_PU5V_18 10.0K A 42 42 R252 UNUSED_PU5V_19 UNUSED_PU5V_20 42 42 UNUSED_PD_10 R142 SPLED R208 1.00K SCH P/N ART P/N FAB P/N AT/ATX MODE SELECT Title: AT MODE 10.0K NOTE: AT MODE IS USED HERE TO DISABLE THE SOFT-POWER Date: R263 FUNCTIONALITY OF THE SOUTH BRIDGE 2 A 7-10-2008_10:19 Sheet Size: B Sheet 3 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM PCI SOUTH BRIDGE, UNUSED PIN RESISTORS 1.00K 10.0K 4 0381255 0532059 1280432 43 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 D D P2 U7 8 8,44 8 8 11DIN1 10DIN2 12ROUT1 9ROUT2 UART0_TXD UART0_RTS_B UART0_RXD UART0_CTS_B DOUT114 DOUT27 RIN113 RIN28 COM0_TXD_B COM0_RTS COM0_RXD_B COM0_CTS NC 9B NC 4B GND RI DTR 8B 3B VCC3V3 CTS TXD 7B 1C1+ VCC16 C330 0.1UF 3C1- V+2 4C2+ C327 0.1UF 5C2- NC 6B NC 1B RXD DSR DCD Silkscreen: "COM 1" VCC3V3 V-6 C331 0.1UF C 2B C326 0.1UF RTS Serial Port B 5B C C313 0.1UF GND15 MAX3232 P2 U46 8 8,44 8 8 UART1_TXD UART1_RTS_B UART1_RXD UART1_CTS_B 11DIN1 10DIN2 12ROUT1 9ROUT2 DOUT114 DOUT27 RIN113 RIN28 COM1_TXD_B COM1_RTS COM1_RXD_B COM1_CTS NC 9A NC 4A GND RI DTR 8A 3A VCC3V3 CTS TXD 7A VCC16 1C1+ C615 0.1UF B 2A C614 0.1UF 3C1- V+2 4C2+ C617 0.1UF 5C2- RXD NC 6A NC 1A DCD G1 G2 GND1 GND2 DSR Silkscreen: "COM 2" B VCC3V3 V-6 C616 0.1UF RTS Serial Port A 5A C613 0.1UF GND15 MAX3232 RS232 SERIAL PORT INTERFACE VCC5V UART0_RTS_B 8,44 DSR R141 4.75K VCC5V A UART1_RTS_B 8,44 CD 2 RX 3 TX SCH P/N ART P/N FAB P/N 6 RTS 7 CTS 8 RI 1 4 DTR 5 GND 9 R140 0381255 0532059 1280432 RS232 DTE PINOUT Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM CONNECTS TO PC WITH RS232 SERIAL PORT INTERFACE F/F NULL MODEM CABLE. A Date: 4.75K Sheet Size: B LOOKING INTO DB9 PLUG Sheet 4 3 7-10-2008_10:19 2 44 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCC5V F1 L9 KBVCC 0805 C303 0.1UF VCC5V D C17 100UF 10V D NC 8 7 6 5 NC A1 A3 A6 KDAT KGND KCLK B1 B3 B6 MDAT MGND MCLK 1 2 3 4 RP39 KNC6 KVCC KNC2 KBD A8 A5 A2 PS2_DUAL NC MNC6 MVCC MNC2 MOUSE 2.21K NC B8 B5 B2 L13 41 KBDATA_R 1 2 KBDATA KBCLK 0805 L12 41 KBCLK_R 1 MSDATA 2 MSCLK P1 0805 C300 180PF L15 41 MSDATA_R 1 C302 180PF C299 180PF 2 C301 180PF 0805 L14 C 41 MSCLK_R 1 C 2 0805 4.75K L18 VCC5V 0805 OUTA8 IN7 GND6 OUTB5 USB0_VCCSW USB1_VCCSW L17 USB1_VCC MIC2076-2 USB0_D_P_R B 0805 C338 0.1UF R137 C34 100UF 10V C33 100UF 10V USB0_D_P 22.1 41 USB0_D_N_R R138 C332 180PF USB0_D_N A4 GND A3 D+ A2 D- A1 VBUS C333 180PF J3 41 4.75K R120 B A U9 1ENA 2FLGA 3FLGB 4ENB USB_POWEN_B USB0_OVCR_B USB1_OVCR_B USB0_VCC USB R114 R151 41 41 41 4.75K VCC5V 22.1 R135 KBD/MOUSE AND USB INTERFACES USB1_D_P 22.1 USB1_D_N_R USB1_D_N 15.0K R99 15.0K R103 15.0K R124 R148 A 15.0K 22.1 C334 180PF C335 180PF GND B3 D+ B2 D- B1 VBUS SCH P/N ART P/N FAB P/N J3 41 R136 B4 B USB1_D_P_R USB 41 Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM KBD/MOUSE AND USB INTERFACES A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 0381255 0532059 1280432 2 45 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 Pin 20 must be removed. 46 46 46 46 47.5 RP50 1 2 3 4 PIDE_D5 PIDE_D10 PIDE_D4 PIDE_D11 46 46 46 46 47.5 RP49 41 41 41 41 8 7 6 5 PIDE_D3_R PIDE_D12_R PIDE_D2_R PIDE_D13_R 1 2 3 4 PIDE_D3 PIDE_D12 PIDE_D2 PIDE_D13 46 46 46 46 47.5 RP48 41 41 41 41 8 7 6 5 PIDE_D1_R PIDE_D14_R PIDE_D0_R PIDE_D15_R 1 2 3 4 PIDE_D1 PIDE_D14 PIDE_D0 PIDE_D15 46 46 46 46 47.5 C 41 1 R303 PIDE_DMARQ_R 2 PIDE_DMARQ 8 7 6 5 1 2 3 4 PIDE_DIOW_B PIDE_DIOR_B PIDE_IORDY PIDE_DMACK_B 46 PIDE_DMARQ 46 PIDE_DIOW_B 46 PIDE_DIOR_B 46 46 46 PIDE_IORDY PIDE_CSEL PIDE_DMACK_B 46 PIDE_INTRQ 46 46 46 46 46 46 46,62 RP47 PIDE_DIOW_B_R PIDE_DIOR_B_R PIDE_IORDY_R PIDE_DMACK_B_R PIDE_D7 PIDE_D8 PIDE_D6 PIDE_D9 PIDE_D5 PIDE_D10 PIDE_D4 PIDE_D11 PIDE_D3 PIDE_D12 PIDE_D2 PIDE_D13 PIDE_D1 PIDE_D14 PIDE_D0 PIDE_D15 46 82.0 41 41 41 41 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 PIDE_A1 PIDE_PDIAG_B PIDE_A0 PIDE_A2 PIDE_CS1_B PIDE_CS3_B PIDE_DASP_B 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 NC 33.2 41 1 R301 PIDE_INTRQ_R SIDE_D7_R SIDE_D8_R SIDE_D6_R SIDE_D9_R 8 7 6 5 PIDE_INTRQ SIDE_D5_R SIDE_D10_R SIDE_D4_R SIDE_D11_R 8 7 6 5 SIDE_D3_R SIDE_D12_R SIDE_D2_R SIDE_D13_R 8 7 6 5 46 46 46 46 41 41 41 41 41 8 7 6 5 1 R291 SIDE_DMARQ_R 41 41 41 41 46 41 41 41 41 SIDE_DIOW_B_R SIDE_DIOR_B_R SIDE_IORDY_R SIDE_DMACK_B_R 8 7 6 5 1 R289 SIDE_INTRQ_R SIDE_A1_R SIDE_A0_R SIDE_A2_R SIDE_CS1_B_R 8 7 6 5 41 R292 SIDE_CS3_B_R R290 SIDE_PDIAG_B_R 46 Silkscreen: "IDE P LED" 1 2 3 4 SIDE_A1 SIDE_A0 SIDE_A2 SIDE_CS1_B 46 46 46 46 46 46 46 SIDE_IORDY SIDE_CSEL SIDE_DMACK_B 46 SIDE_INTRQ 46 46 46 46 46 46 46,62 NC SIDE_A1 SIDE_PDIAG_B SIDE_A0 SIDE_A2 SIDE_CS1_B SIDE_CS3_B SIDE_DASP_B C CON_IDE40 VCC3V3 SIDE_CS3_B 46 SIDE_PDIAG_B 46 B SIDE_DASP_B R312 SIDE_IORDY Silkscreen: "IDE S LED" 10.0K R305 SIDE_INTRQ 4.75K 46 R307 SIDE_D7 10.0K R309 46 R310 SIDE_DMARQ 5.62K R299 46 R287 SIDE_CSEL IDE INTERFACES SCH P/N ART P/N FAB P/N 475 475 R314 46 R308 SIDE_PDIAG_B 100K 100K Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM C424 C425 A 46 SIDE_DIOR_B 46,62 R313 PIDE_PDIAG_B SIDE_INTRQ PIDE_DASP_B 5.62K 46 2 46 46 46 46 46 D VCC3V3 46 PIDE_CSEL SIDE_DIOW_B SIDE_DIOR_B SIDE_IORDY SIDE_DMACK_B SIDE_DIOW_B 0 10.0K 46 1 2 3 4 46 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 DS21 41 R306 PIDE_DMARQ 46 SIDE_DMARQ GREEN 46 4.75K 46 SIDE_DMARQ 46 33.2 DS22 PIDE_PDIAG_B 10.0K PIDE_D7 2 SIDE_D7 SIDE_D8 SIDE_D6 SIDE_D9 SIDE_D5 SIDE_D10 SIDE_D4 SIDE_D11 SIDE_D3 SIDE_D12 SIDE_D2 SIDE_D13 SIDE_D1 SIDE_D14 SIDE_D0 SIDE_D15 33.2 46,62 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 33.2 R311 PIDE_INTRQ SIDE_D1 SIDE_D14 SIDE_D0 SIDE_D15 RP43 VCC3V3 46 1 2 3 4 82.0 182 PIDE_CS3_B B 46 46 46 46 46 47.5 VCC3V3 0 PIDE_IORDY SIDE_D3 SIDE_D12 SIDE_D2 SIDE_D13 SIDE_RESET_B RP45 PIDE_A1 PIDE_A0 PIDE_A2 PIDE_CS1_B GREEN R304 PIDE_PDIAG_B_R 1 2 3 4 RP44 SIDE_D1_R SIDE_D14_R SIDE_D0_R SIDE_D15_R 33.2 41 46 46 46 46 47.5 41 R390 PIDE_CS3_B_R SIDE_D5 SIDE_D10 SIDE_D4 SIDE_D11 RP42 41 41 41 41 46 33.2 41 1 2 3 4 46 82.0 1 2 3 4 R302 46 46 46 46 47.5 RP46 8 7 6 5 PIDE_A1_R PIDE_A0_R PIDE_A2_R PIDE_CS1_B_R SIDE_D7 SIDE_D8 SIDE_D6 SIDE_D9 RP41 41 41 41 41 82.0 41 41 41 41 1 2 3 4 47.5 CON_IDE40 2 J15 RP40 41 41 41 41 182 8 7 6 5 PIDE_D5_R PIDE_D10_R PIDE_D4_R PIDE_D11_R PIDE_RESET_B R387 41 41 41 41 46 IDE SECONDARY CONN PIDE_D7 PIDE_D8 PIDE_D6 PIDE_D9 IDE PRIMARY CONN D 1 2 3 4 Mark Pin 1 Pin20=Key Silkscreen: "IDE SECONDARY" J16 RP51 8 7 6 5 PIDE_D7_R PIDE_D8_R PIDE_D6_R PIDE_D9_R Pin 20 must be removed. Mark Pin 1 Pin20=Key Silkscreen: "IDE PRIMARY" 41 41 41 41 1 IDE INTERFACES 0.047UF 4,46 R288 SBR_IDE_RST_B 0.047UF SIDE_RESET_B 0 4,46 R300 SBR_IDE_RST_B Sheet Size: B PIDE_RESET_B Sheet 46 0 4 3 A 7-10-2008_10:19 Date: 46 2 46 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 VCC12V_P C267 0.01UF VCC3V3 U3 5 4 C3 22UF 25V OSC 2 GND OUT 3 R57 AC97_CLK_R AC97_CLK GND3 3 SHDN GND6 6 ADJ GND7 7 BYP 24.9 SG-636PCE 24.5760MHZ AC_AGND AC_AGND L6 1 AC_BIT_CLK AC_BIT_CLK_R VOUT = 1.21*(1+R2/R1) VOUT = 1.21*(1+3.09K/1.00K) VOUT = 4.949V 47 AC_AGND 49.9 AC_AGND 47.5K SPKR VCC3V3 AC_PC_BEEP 4.75K U1 47 1 9 DVDD1 DVDD2 47 47 47 47 47 47 47 48 48 48 48 47 48 48 42 42 42 42 47 B 47 47 47 AC_PC_BEEP AC_NC1 AC_NC2 AC_NC3 AC_NC4 AC_NC5 AC_CD_INL AC_CD_GNDREF AC_CD_INR AC_MIC_IN AC_NC6 AC_LINE_INL AC_LINE_INR XTL_IN XTL_OUT C314 0.1UF AC_NC1 PC_BEEP PHONE_IN AUXIN_L AUXIN_R VIDEO_L VIDEO_R CD_L CD_GND_REF CD_R MICIN_1 MICIN_2 LINE_IN_L LINE_IN_R AC_3DP AC_CS0 AC_CS1 AC_MODE C243 0.022UF 48 48 NC 39 40 41 AC_HEAD_OUTL AC_HEAD_OUTC AC_HEAD_OUTR 48 48 48 EAPD 47 AC_EAPD 48 34 33 AC_3DP AC_3DN 47 47 AC_3DN 28 27 AC_VREFOUT AC_VREF 48 47 29 30 31 32 NC_AFILT1 NC_AFILT2 NC_FILT_R NC_FILT_L RESET SDATA_OUT SDATA_IN SYNC BIT_CLK 45 46 48 C246 DNP AC_AGND 3DP 3DN VREFOUT VREF_FLTR 11 5 8 10 6 AC_RESET_B AC_SDATA_OUT AC_SDATA_IN0 AC_SYNC AC_BIT_CLK_R AC_LINE_OUTL AC_LINE_OUTR HP_OUT_L HP_OUT_C HP_OUT_R NC_AFILT1 NC_AFLIT2 NC_FILT_R NC_FILT_L CS0 CS1 CIN_MODE NC43 NC44 DVSS2 DVSS1 NC_AVSS2 AVSS1 43 44 C262 270PF C253 1UF NC NC AC_AVDD 47,48 AC_VREF 47 C260 270PF C252 1UF B C268 0.1UF C2 10UF 6.3V 42 26 AC_AGND 47 AC_NC3 AC_NC4 47 AC_CS0 AC_NC6 AC97 CODEC 47 VCC3V3 DNP 47 47,48 47 R61 AC_CS1 47 C250 0.1UF DNP AC_NC5 AC_AGND AC_AGND R58 C316 0.1UF C 47,48 LM4550 TQFP48-500MM AC_NC2 C318 0.1UF C315 0.1UF C317 0.1UF LINE_OUT_L LINE_OUT_R MONO_OUT 35 36 37 AC_AVDD 47 12 13 14 15 16 17 18 19 20 21 22 23 24 7 4 C319 0.1UF 25 38 47 2 3 AC97_CLK NC A AVDD1 NC_AVDD2 2 R83 C 10.0K C257 1UF R79 42,62 R1 1 R86 42 2 0805 R64 D 100UF C4 10V R2 LT1763CS8 47 R92 C249 0.1UF 2 AC_AVDD 3.09K VCC 4.75K OUT 1 IN 1.00K X1 1 OE R60 R91 8 D 1 C258 0.1UF SCH P/N ART P/N FAB P/N AC_AVDD C251 0.1UF C259 0.1UF Title: 47 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM AC97 CODEC R63 47 AC_MODE A 47 Date: 4.75K AC_AGND 3 2 8-1-2008_15:08 Sheet Size: B Sheet AC_AGND 4 0381255 0532059 1280432 47 of Ver: C Rev: 01 Drawn By 70 BF 1 L10 1 Silkscreen "Line In" R85 2 4.75K 0805 2 AC_LINE_INR 47 1 C265 1UF 3 C272 1UF 4 AC_LINE_OUTR 47 L8 1 Silkscreen "Line Out" 2 1 D L16 2 3 4 0805 C266 180PF 100K R100 AC_LINE_OUTL 47 1 R82 J2 R89 C273 180PF R84 C309 180PF 4 1 2 47 4.75K 4.75K 0805 0805 AC_LINE_INL 100K 3 4.75K D R90 2 C320 1UF 1 C308 1UF L11 2 C321 180PF J31 AC_AGND L3 1 J1 R62 2 AC_VREFOUT C1 470UF 6.3V AC_AGND 47 2.21K 0805 AC_AMP_OUTR 48 L4 C AC_MIC_IN R59 C245 180PF L5 1 AC_AMP_OUTL 48 AC_AGND NC NC LIME TOP C CON_JACK2 C247 0.1UF CON_JACK2 2 0805 R67 C248 180PF 47.5K 0805 G11 G22 G33 G44 G55 J1 21 22 23 24 47 C256 180PF 47.5K 2 R78 1 2 0805 47.5K L2 C5 470UF 6.3V NC C244 1UF 1 BLUE BOT C261 180PF AC_AGND R98 C263 0.1UF A2 B A3 A4 AC_AGND 47 AC_HEAD_OUTL 5SHUTDOWN 20.0K R87 20.0K 48 AC_AMP_OUTL 48 VDD8 2INA OUTA1 6INB OUTB7 3BYPASS C264 1UF AC_AMP_OUTR R97 C254 1UF C306 1UF 47 AC_HEAD_OUTR U2 R94 4.75K AC_AGND R65 R96 4.75K R93 4.75K R81 0805 4.75K C269 1UF J6 2 A1 0 AC_CD_INR 47 AC_CD_GNDREF 47 B AC_CD_INL 47 4.75K 1 R95 AC_AVDD 4.75K 47 C270 1UF L7 2 4.75K 1 R80 AC_EAPD CD-ROM AUDIO 47 C271 1UF AC_AGND GND4 LM4880 AC_AGND AC_AGND AC_HEAD_OUTC AC97 CONNECTORS AC_AGND SCH P/N ART P/N FAB P/N C255 5PF 47 C242 1UF R66 A Title: 27.4K A Date: 7-10-2008_10:19 Sheet Size: B R88 Sheet 27.4K 4 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM AC97 CONNECTORS C307 5PF AC_AGND 0381255 0532059 1280432 3 2 48 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 NOTE: BOTTOM SGMII PHY0_AVDD0 SGMII: GTP 124_0 NOTE: PHY ADDR = ‘00111’ D VCC2V5 NC NC 67TDI 69TMS 68TRST_B 72TDO 70TCK NC 50NC_50 NC NC R371 2 4.7K B 71VDDOX_71 34VDDOX_34 94VSS_94 93VSS_93 84VSS_84 83VSS_83 66VSS_66 65VSS_65 63VSS_63 60VSS_60 58VSS_58 55VSS_55 51VSS_51 48VSS_48 45VSS_45 43VSS_43 40VSS_40 38VSS_38 22VSS_22 21VSS_21 15VSS_15 9VSS_9 1VSS_1 A SOUT_P107 SOUT_N105 SEL_OSC77 2 R406 49.9R 2 1 R409 49.9R 2 1 R404 49.9R 2 R402 1 1 DEVICE=RJ45_JC0-0019 P7 PARTS=1 LEVEL=STD PKG_TYPE=RJ45_JC0-0019 2 0.01UF C161 1 1 14 14 FERRITE-220 C NC=25,26 VCC2V5 NC F10 2 1 R422 2 249R 1 25.000MHZ PHY0_LED_DUPLEX PHY0_LED_RX PHY0_LED_TX DS35 1 GREEN 2 DS36 1 GREEN 2 1 R424 2 249R DS34 1 GREEN 2 1 R432 2 249R DS26 1 GREEN 2 R441 1 249R 2 VCC2V5 PHY0_CONFIG0 49 PHY0_CONFIG4 49 PHY0_CONFIG5 49 1 DS25 1 PHY0_AVDD0 AVDD_104104 AVDD_6464 AVDD_5959 AVDD_5252 AVDD_4949 AVDD_4444 R449 GREEN 2 1 49 1 2 249R R282 R429 2 249R PHY0_CONFIG0 2 2 1M 22PF C294 1 22PF C304 1 2 0 2 2 1 NC DS37 PHY0_LED_LINK10 PHY0_LED_LINK100 PHY0_LED_LINK1000 NC VCC2V5 J50, J28 1-2: GMII/MII to Cu (Default) J50, J28 2-3: SGMII to Cu, no clk J50 1-2, J49 ON: RGMII, modified MII in Cu GREEN 49 VCC2V5 VCC2V5 B PHY0_CONFIG4 VCC2V5 VCC2V5 F12 VDDOH_8989 VDDOH_9797 VDDOH_7373 PHY0_CONFIG5 PHY0_LED_LINK10 49 1 1 2 2 3 3 PHY0_AVDD0 VCC1V0 2 2 1 C297 1 C295 1 C296 0.01UF 0.01UF 1 1 0.1UF 1000PF 0.1UF C126 C121 2 2 2 DVDD_118118 DVDD_117117 DVDD_9696 DVDD_9090 DVDD_8585 DVDD_7878 DVDD_2727 DVDD_2323 DVDD_1717 DVDD_1212 DVDD_66 DVDD_22 1 2 J50 49 J28 FERRITE-220 10UF C166 PHY0_LED_DUPLEX PHY0_LED_LINK1000 VCC2V5 MII / RGMII / SGMII TRI-MODE ETHERNET PHY 1 VSS_127127 VSS_119119 VSS_116116 VSS_111111 VSS_108108 VSS_106106 VSS_103103 VSS_102102 VSS_101101 10UF 2 C165 1 10UF 2 2 2 1 1 1 2 2 0.01UF 0.01UF 0.1UF C167 C125 C123 C322 2 1 1 1 C226 1 C312 1 1 1 2 2 2 0.1UF 0.01UF0.01UF 0.1UF 0.1UF C224 C117 C119 C222 C223 SCH P/N ART P/N FAB P/N 1000PF1000PF 2 2 VCC1V0 Title: 1 VSSC_7474 2 10UF C168 1 2 C228 1 0.1UF 2 C227 0.1UF 2 1 1 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM 0.01UF 0.01UF 1 C129 C130 2 C343 1000PF 1 2 C324 1000PF A 8-1-2008_15:08 Date: Sheet Size: B Sheet 3 2 0381255 0532059 1280432 MII / RGMII / SGMII TRI-MODE ETHERNET PHY 2 M88E1111_PQFP128R PQFP-128R U47 4 49.9R 2 1 R385 49.9R 2 49.9R 1 R401 2 R374 1 2 0.01UF C127 DNP CONFIG088 CONFIG187 CONFIG286 CONFIG382 CONFIG481 CONFIG580 CONFIG679 2 0.01UF C128 1 LED_DPLX95 LED_RX92 LED_TX91 1 0.01UF C160 14 GTP_124_RX0_P GTP_124_RX0_N 49.9R 2 2 14 GTP_124_TX0_N XTAL176 XTAL275 LED_LINK10100 LED_LINK10099 LED_LINK100098 49.9R R384 1 GTP_124_TX0_P 1 SIN_P113 SIN_N112 1 122VDDO_122 30VDDO_30 11VDDO_11 5VDDO_5 NC NC SHIELD121 J49 VCC2V5 SCLK_P110 SCLK_N109 10AGND 2 25TXD4 26TXD5 28TXD6 29TXD7 4.7K SHIELD222 1 PHY0_TXD4 PHY0_TXD5 PHY0_TXD6 PHY0_TXD7 1 4.7K 9AVCC R373 18TXD0 19TXD1 20TXD2 24TXD3 R285 2 R388 PHY0_TXD0 PHY0_TXD1 PHY0_TXD2 PHY0_TXD3 R284 2 2 R286 1 2 R293 1 2 R294 4.7K 1 2 R342 4.7K 2 4.7K 4.7K 10 10 10 10 1 7ATD3_N X11 PHY0_TX* signals must be time-of-flight matched to each other 14GTXCLK 10TXCLK 13TXER PHY0_TXER PHY0_TXCTL_TXEN 16TXEN PHY0_GTXCLK HSDAC_P53 HSDAC_N54 8ATD3_P XTAL_MA506 10 10 33 1 10 PHY0_MDIP3 PHY0_MDIN3 5ATD2_N 1 1 R498 2 MDI3_P61 MDI3_N62 6ATD2_P 2 C 124RXD4 123RXD5 121RXD6 120RXD7 PHY0_MDIP2 PHY0_MDIN2 2 NC NC NC NC MDI2_P56 MDI2_N57 3ATD1_N 0.01UF 0.01UF 3RXD0 128RXD1 126RXD2 125RXD3 PHY0_MDIP1 PHY0_MDIN1 2 4.7K 21 PHY0_RXD0 PHY0_RXD1 PHY0_RXD2 PHY0_RXD3 7RXCLK 8RXER 4RXDV 1 R502 PHY0_RXCLK PHY0_RXER PHY0_RXCTL_RXDV MDI1_P46 MDI1_N47 1 C456 NC NC 31CLK125 32INT_B 37COMA 36RESET_B 39RSET 115CRS 114COL 0.01UF 3 10 10 PHY0_RX* signals must be time-of-flight matched10 10 to each other 10 10 SW6 1 D 4ATD1_P 1 C392 2 10 PHY0_INT 1 2 4.7K R343 2 4.7K R237 4.99K 1% PHY0_MDIP0 PHY0_MDIN0 2 NC R372 MDI0_P41 MDI0_N42 0.01UF 10 33MDIO 35MDC PHY0_MDIO PHY0_MDC 2 1 10 2 1 PHY0_RESET PHY0_TXCLK 2ATD0_P 1 1 C406 C404 4.7K 3 10/100/1000 RJ45 AND MAGNETICS 1ATD0_N R232 2 1 10 49 49 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 NOTE: BOTTOM SGMII SGMII: GTP 124_1 PHY1_AVDD0 10/100/1000 RJ45 AND MAGNETICS 50 NOTE: PHY ADDR = ‘00111’ D VCC2V5 1BTD0_N 1 R457 NC NC 67TDI 69TMS 68TRST_B 72TDO 70TCK NC 50NC_50 NC NC 2 4.7K B 71VDDOX_71 34VDDOX_34 VCC2V5 122VDDO_122 30VDDO_30 11VDDO_11 5VDDO_5 94VSS_94 93VSS_93 84VSS_84 83VSS_83 66VSS_66 65VSS_65 63VSS_63 60VSS_60 58VSS_58 55VSS_55 51VSS_51 48VSS_48 45VSS_45 43VSS_43 40VSS_40 38VSS_38 22VSS_22 21VSS_21 15VSS_15 9VSS_9 1VSS_1 A SOUT_P107 SOUT_N105 SEL_OSC77 GTP_124_TX1_N GTP_124_RX1_P GTP_124_RX1_N 14 0.01UF C420 1 2 0.01UF C418 1 1 R513 2 49.9R SHIELD123 DEVICE=RJ45_JC0-0019 P7 PARTS=1 LEVEL=STD PKG_TYPE=RJ45_JC0-0019 2 0.01UF C414 10BGND 1 R514 2 49.9R 1 R512 2 49.9R 1 R511 2 49.9R 1 R509 2 1 2 0.01UF C419 1 14 14 F21 C FERRITE-220 VCC2V5 NC VCC2V5 PHY1_CONFIG_0 2 1 GREEN 2 VCC2V5 50 GREEN 2 DS30 1 GREEN 2 DS31 1 DS32 1 AVDD_104104 AVDD_6464 AVDD_5959 AVDD_5252 AVDD_4949 AVDD_4444 VDDOH_8989 VDDOH_9797 VDDOH_7373 R504 1 DS28 1 R505 2 249R 1 249R 1 2 R503 2 249R 1 R506 2 249R 1 2 1 GREEN 2 1 VSS_127127 VSS_119119 VSS_116116 VSS_111111 VSS_108108 VSS_106106 VSS_103103 VSS_102102 VSS_101101 2 1M 249R 2 R508 2 249R VCC2V5 GREEN PHY1_AVDD0 XREF=50 F507 B PHY1_AVDD0 VCC2V5 1 1 10UF 1 C588 2 2 2 2 VCC2V5 1C687 0.01UF 0.01UF 1 C413 2 C981 1C679 FERRITE-220 1 1C681 C587 0.1UF 2 0.1UF 2 1000PF 10UF 2 2 2 10UF 2 C164 2C163 C344 1 C345 C403 C402 1 C671 1 C670 1 C674 1 C346 1 C169 1 1 1 0.1UF 0.1UF 1000PF1000PF 0.1UF 0.1UF 1 2 2 2 2 0.01UF0.01UF 2 0.01UF0.01UF 2 SGMII TRI-MODE ETHERNET PHY VCC1V0 1 2 10UF C589 1 2 C347 0.1UF 1 C680 2 0.1UF 2 1 2 0.01UF C411 1 SCH P/N ART P/N FAB P/N Title: 1C686 0.01UF C412 2 1000PF 1C682 2 SGMII TRI-MODE ETHERNET PHY 1000PF A 7-10-2008_10:19 Sheet Size: B Sheet 2 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM Date: VSSC_7474 3 0 22PF C6731 VCC1V0 DVDD_118118 DVDD_117117 DVDD_9696 DVDD_9090 DVDD_8585 DVDD_7878 DVDD_2727 DVDD_2323 DVDD_1717 DVDD_1212 DVDD_66 DVDD_22 R501 2 22PF C6721 R507 GREEN 2 PHY1_CONFIG_0 50 DNP PHY1_LED_DUPLEX PHY1_LED_RX PHY1_LED_TX CONFIG088 CONFIG187 CONFIG286 CONFIG382 CONFIG481 CONFIG580 CONFIG679 1 DS29 1 DS27 2 LED_DPLX95 LED_RX92 LED_TX91 PHY1_LED_LINK10 PHY1_LED_LINK100 PHY1_LED_LINK1000 R608 LED_LINK10100 LED_LINK10099 LED_LINK100098 R609 2 XTAL176 XTAL275 M88E1111_PQFP128R PQFP-128R U53 4 49.9R R510 2 49.9R R515 2 49.9R 2 14 SHIELD224 2 GTP_124_TX1_P 9BVCC 1 SIN_P113 SIN_N112 1 NC NC 1 SCLK_P110 SCLK_N109 2 4.7K 1 R516 2 1 4.7K 49.9R R460 2 1 25TXD4 26TXD5 28TXD6 29TXD7 R459 2 1 1 NC NC NC NC 7BTD3_N 2 18TXD0 19TXD1 20TXD2 24TXD3 HSDAC_P53 HSDAC_N54 8BTD3_P X9 25.000MHZ NC NC NC NC PHY1_MDIP3 PHY1_MDIN3 5BTD2_N NC 14GTXCLK 10TXCLK 13TXER 16TXEN MDI3_P61 MDI3_N62 6BTD2_P NC NC NC NC NC PHY1_MDIP2 PHY1_MDIN2 XTAL_MA506 C 124RXD4 123RXD5 121RXD6 120RXD7 MDI2_P56 MDI2_N57 3BTD1_N 0.01UF 0.01UF 4.7K NC NC NC NC PHY1_MDIP1 PHY1_MDIN1 2 21 3RXD0 128RXD1 126RXD2 125RXD3 1 R532 NC NC NC NC 7RXCLK 8RXER 4RXDV MDI1_P46 MDI1_N47 4BTD1_P 1 C676 NC NC NC SW8 PHY1_MDIP0 PHY1_MDIN0 1 C678 2 1 31CLK125 32INT_B 37COMA 36RESET_B 39RSET 115CRS 114COL MDI0_P41 MDI0_N42 2 1 PHY1_RESET_SGMII NC R500 2 10 PHY1_INT_SGMII 1 2 4.7K R458 2 4.7K NC R456 4.99K NC 33MDIO 35MDC 0.01UF0.01UF 4.7K 10 PHY1_MDIO PHY1_MDC 10 2 R450 2 1 1 C677 C675 1 4 D 2BTD0_P 50 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 SATA Host 1 GTP 120_1 2 1 13 GTP_120_TX1_N 0.01UF 2 2 1 GTP_120_TX1_P C362 13 SERIAL_ATA 0.01UF 1 GTP_120_RX1_N C361 13 D 7 GND_7 6 HRX+ 5 HRX4 GND_4 0.01UF C358 D J25 3 HTX2 HTX+ GTP_120_RX1_P SLOT 0.01UF 13 1 C 2 C363 1 GND_1 SD-6800_005 C SATA Host 2 0.01UF GTP_120_RX0_N 1 13 2 C364 GTP 120_0 B 2 GTP_120_TX0_N 1 13 0.01UF 2 1 GTP_120_TX0_P C373 13 SERIAL_ATA 7 GND_7 6 HRX+ 5 HRX4 GND_4 0.01UF C365 B J26 3 HTX2 HTX+ SLOT 0.01UF GTP_120_RX0_P 1 13 2 C374 1 GND_1 SD-6800_005 SATA INTERFACE SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A SATA INTERFACE A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 2 51 of Ver: C Rev: 01 Drawn By 70 BF 1 4 10 10 10 10 10 10 D 5 5 5 5 5 5 5 5 5 5 5 5 10 10 10 10 5 5 C 12 12 12 12 12 12 12 12 12 12 12 12 13 13 13 13 3 PM_IO_94_P PM_IO_95_N PM1 A1A1 A2A2 10 10 PM_IO_90_P PM_IO_91_N C1C1 C2C2 10 10 PM_IO_86_P PM_IO_87_N A3A3 A4A4 10 10 PM_IO_3V_16_N PM_IO_3V_12_P C3C3 C4C4 5 5 PM_IO_3V_25_N PM_IO_3V_18_P A5A5 A6A6 5 5 PM_IO_3V_1_N PM_IO_3V_3_P C5C5 C6C6 5 5 PM_IO_3V_7_N PM_IO_3V_22_P A7A7 A8A8 5 5 PM_IO_3V_17_N PM_IO_3V_5_P C7C7 C8C8 5 5 PM_IO_3V_9_N PM_IO_3V_13_P A9A9 A10A10 5 5 PM_IO_80_P PM_IO_81_N C9C9 C10C10 3 52 PM_IO_82_P PM_IO_83_N A11A11 A12A12 10 10 PM_IO_3V_19_N PM_IO_3V_24_P C11C11 C12C12 12 12 GTP_116_RX1_P GTP_116_RX1_N A13A13 A14A14 12 12 GTP_116_RX0_P GTP_116_RX0_N C13C13 C14C14 12 12 GTP_112_RX1_P GTP_112_RX1_N A15A15 A16A16 12 12 GTP_112_RX0_P GTP_112_RX0_N C15C15 C16C16 12 12 GTP_114_TX1_P GTP_114_TX1_N A17A17 A18A18 12 12 GTP_114_TX0_P GTP_114_TX0_N C17C17 C18C18 12 12 GTP_118_TX1_P GTP_118_TX1_N A19A19 A20A20 13 13 GTP_118_TX0_P GTP_118_TX0_N C19C19 C20C20 13 13 2 PM_IO_92_P PM_IO_93_N PM1 D1D1 D2D2 7 7 PM_IO_88_P PM_IO_89_N F1F1 F2F2 7 7 PM_IO_84_P PM_IO_85_N D3D3 D4D4 7 7 PM_IO_3V_10_N PM_IO_3V_4_P F3F3 F4F4 7 7 PM_IO_3V_21_N PM_IO_3V_20_P D5D5 D6D6 7 7 PM_IO_3V_15_N PM_IO_3V_0_P F5F5 F6F6 7 7 PM_IO_3V_8_N PM_IO_3V_6_P D7D7 D8D8 7 7 PM_IO_3V_23_N PM_IO_3V_11_P F7F7 F8F8 7 7 PM_IO_3V_2_N PM_IO_3V_14_P D9D9 D10D10 7 7 PM_CLK_TOP IIC_SDA_PM F9F9 F10F10 7 7 PM_IO_78_P PM_IO_79_N D11D11 D12D12 7 7 LVDS_CLKEXT_N LVDS_CLKEXT_P F11F11 F12F12 4 4 GTP_116_TX1_N GTP_116_TX1_P D13D13 D14D14 4 4 GTP_116_TX0_N GTP_116_TX0_P F13F13 F14F14 4 4 GTP_112_TX1_N GTP_112_TX1_P D15D15 D16D16 4 4 GTP_112_TX0_N GTP_112_TX0_P F15F15 F16F16 4 4 GTP_114_RX1_N GTP_114_RX1_P D17D17 D18D18 4 4 GTP_114_RX0_N GTP_114_RX0_P F17F17 F18F18 4 4 GTP_118_RX1_N GTP_118_RX1_P D19D19 D20D20 4 4 GTP_118_RX0_N GTP_118_RX0_P F19F19 F20F20 4 4 1 PM_IO_63_N PM_IO_62_P PM2 A1A1 A2A2 7 7 PM_IO_53_N PM_IO_52_P C1C1 C2C2 7 7 PM_IO_67_N PM_IO_66_P A3A3 A4A4 7 7 PM_IO_61_N PM_IO_60_P C3C3 C4C4 7 7 PM_IO_55_N PM_IO_54_P A5A5 A6A6 7 7 PM_IO_39_N PM_IO_38_P C5C5 C6C6 52 52 PM_IO_51_N PM_IO_50_P A7A7 A8A8 7 7 PM_IO_49_N PM_IO_48_P C7C7 C8C8 52 52 PM_IO_45_N PM_IO_44_P A9A9 A10A10 7 7 PM_IO_74_P PM_IO_75_N C9C9 C10C10 52 3 PM_IO_72_P PM_IO_73_N A11A11 A12A12 10 10 PM_IO_20_P PM_IO_21_N C11C11 C12C12 4 4 PM_IO_28_P PM_IO_29_N A13A13 A14A14 4 4 PM_IO_34_P PM_IO_35_N C13C13 C14C14 4 4 PM_IO_22_P PM_IO_23_N A15A15 A16A16 4 4 PM_IO_14_P PM_IO_15_N C15C15 C16C16 4 4 PM_IO_32_P PM_IO_33_N A17A17 A18A18 4 4 PM_IO_4_P PM_IO_5_N C17C17 C18C18 4 4 PM_IO_0_P PM_IO_1_N A19A19 A20A20 4 4 PM_IO_8_P PM_IO_9_N C19C19 C20C20 4 4 PM_IO_71_N PM_IO_70_P PM2 D1D1 D2D2 PM_IO_41_N PM_IO_40_P F1F1 F2F2 PM_IO_69_N PM_IO_68_P D3D3 D4D4 PM_IO_65_N PM_IO_64_P F3F3 F4F4 PM_IO_59_N PM_IO_58_P D5D5 D6D6 PM_IO_47_N PM_IO_46_P F5F5 F6F6 PM_IO_43_N PM_IO_42_P D7D7 D8D8 PM_IO_37_N PM_IO_36_P F7F7 F8F8 PM_IO_57_N PM_IO_56_P D9D9 D10D10 IIC_SCL_PM PM_CLK_BOT F9F9 F10F10 PM_IO_76_P PM_IO_77_N D11D11 D12D12 PM_IO_6_P PM_IO_7_N F11F11 F12F12 PM_IO_26_P PM_IO_27_N D13D13 D14D14 PM_IO_30_P PM_IO_31_N F13F13 F14F14 PM_IO_24_P PM_IO_25_N D15D15 D16D16 PM_IO_18_P PM_IO_19_N F15F15 F16F16 PM_IO_10_P PM_IO_11_N D17D17 D18D18 PM_IO_2_P PM_IO_3_N F17F17 F18F18 PM_IO_12_P PM_IO_13_N D19D19 D20D20 PM_IO_16_P PM_IO_17_N F19F19 F20F20 D C B B VCC1V0 W1W1 X1X1 Y1Y1 Z1Z1 2 W2W2 X2X2 Y2Y2 Z2Z2 2 W3W3 X3X3 Y3Y3 Z3Z3 VCC2V5 F8 1 VCC3V3 F9 1 2 W4W4 X4X4 Y4Y4 Z4Z4 VCC5V 2 W5W5 X5X5 Y5Y5 Z5Z5 W6W6 X6X6 Y6Y6 Z6Z6 VCC12V_P F6 1 VCC2V5 F7 1 ZDOK_550_RCPT GND;B1,B2,B3,B4,B5 GND;B6,B7,B8,B9,B10 GND;B11,B12,B13,B14,B15 GND;B16,B17,B18,B19,B20 GND;E1,E2,E3,E4,E5 GND;E6,E7,E8,E9,E10 GND;E11,E12,E13,E14,E15 GND;E16,E17,E18,E19,E20 VCC3V3 1 A IIC_SCL 2 IIC_SCL_PM_F 0 8,27,30,39,42,55,62,70 VCC5V 2 W2W2 X2X2 Y2Y2 Z2Z2 2 W3W3 X3X3 Y3Y3 Z3Z3 F4 1 F5 1 ZDOK_550_RCPT 57 PM_TDO 7 R632 DNP R633 PM_IO_47_N_J 3,57 FPGA_TCK PM_IO_47_N 52 4 R636 DNP R637 PM_IO_37_N_J 0 2 2 W5W5 X5X5 Y5Y5 Z5Z5 F3 1 F2 1 W6W6 X6X6 Y6Y6 Z6Z6 ZDOK_550_RCPT PM JTAG Resistors 3 IIC_SCL_PM PM_IO_37_N 52 0 GND;B1,B2,B3,B4,B5 GND;B6,B7,B8,B9,B10 GND;B11,B12,B13,B14,B15 GND;B16,B17,B18,B19,B20 GND;E1,E2,E3,E4,E5 GND;E6,E7,E8,E9,E10 GND;E11,E12,E13,E14,E15 GND;E16,E17,E18,E19,E20 ZDOK_550_RCPT PERSONALITY MODULE CONNECTORS SCH P/N ART P/N FAB P/N IIC_SDA_PM_F 0 8,27,30,39,42,55,62,70 2 3,57 FPGA_TDO 3 IIC_SDA_PM 7 52 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM PERSONALITY MODULE CONNECTORS PM JTAG 0 ohm resistors: R632, R636, R634, R638, R640 Q5 NDS331N R634 DNP R635 PM_IO_46_P_J 3,57 FPGA_TMS PM_IO_46_P 52 4 A R638 DNP R639 PM_IO_36_P_J Date: PM_IO_36_P 52 Sheet Size: B Sheet 0 0 8-1-2008_15:08 52 of 3 2 Ver: C Rev: 01 Drawn By 70 BF Q4 NDS331N 4 0381255 0532059 1280432 NO PM JTAG 0 ohm resistors: R633, R637, R635, R639, R641 52 1 IIC_SDA VCC12V_P W4W4 X4X4 Y4Y4 Z4Z4 Title: R77 R76 W1W1 X1X1 Y1Y1 Z1Z1 1 3 2 DVI_D0_N DVI_D0_P 54 54 DVI_D1_N DVI_D1_P 54 54 DVI_CLK_P DVI_CLK_N 54 54 DVI_HPDET 54 DVI_HSYNC DVI_VSYNC DVI_RED DVI_GREEN DVI_BLUE Place termination RPs near U37 Near DVI IC 54 54 DVI_D2_N DVI_D2_P D 1 To DVI Connector 4 54 54 54 54 54 D VCC5V TPS73633DBVT 1 2 3 1 C102 1UF 2 10V X5R IN OUT 5 DVI_VCCA GND 53 (3.3V) 1 C923 EN NR_FB 4 2 1 C104 0.01UF 2 X7R 16V U25 DNP 11 11 1 R651 47.5 2 1 R650 47.5 2 1 R652 47.5 2 1 R653 2 47.5 DVI_RESET_B DVI_XCLK_N DVI_XCLK_P 13 RESET_B 56 57 XCLK_N XCLK_P 2 4 5 2 2 1 2 NC 20 26 32 DVI_TVDD FERRITE-220 C94 1 0.1UF 2 10V X5R 1 C96 10UF 2 X5R 10V C95 1 0.1UF 2 10V X5R DVI_AS DVI_AVDD 18 DVI_VCCA FERRITE-220 AGND2 14 15 SPD SPC 7 8 10 GPIO1 GPIO0 AS 17 C97 1 0.1UF 2 10V X5R 53 B 1 C98 10UF 2 X5R 10V FB33 VDD 33 DVI_VDD FERRITE-220 R606 1% 19 1 1 2 140 U59 CH7301C-TF 35 ISET 11 TGND1 TGND2 TGND3 AVDD NC0 NC1 NC2 NC3 NC4 NC5 NC6 2 1 IIC_SCL_DVI DVI_GPIO1 23 29 FB32 1 8,54 DE H V TVDD1 TVDD2 VCC3V3 IIC_SDA_DVI To FPGA 8,54 B 1 C93 10UF 2 X5R 10V 2 GND1 GND2 34 40 1 C100 0.1UF 2 10V X5R 1 C101 10UF 2 X5R 10V DVI_VCCA 53 FB34 FERRITE-220 16 36 41 42 43 44 46 47.5 C92 1 0.1UF 2 10V X5R C91 1 0.1UF 2 10V X5R GND_VIDEO DVI CODEC NC NC NC NC NC NC NC 1 R654 2.43K R1151% 47.5 2 6 11 64 FERRITE-220 C90 1 0.1UF 2 10V X5R VCC3V3 VSWING 1 R656 DGND0 DGND2 DGND3 DVI_DVDD FB31 2.43K R113 1% 2 47.5 DVDD1 DVDD2 DVDD3 1% 2.43K R112 1% DVI_DE DVI_H DVI_V 2.43K R110 1% 8 3 3 1 R655 R116 1% 38 37 39 2 1 R111 100 R G B 48 47 VCC3V3 FB30 1 12 49 2 11 DVI_D3 DVI_D2 DVI_D1 DVI_D0 C 2 3 3 3 3 2 1 C106 0.1UF 2 10V X5R 1 47.5 1 2 C 2 1 1 R646 2 2 47.5 2 1 R647 2 45 3 1 2 47.5 DVDDV VREF 1 1 R649 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 GND_VIDEO 1 47.5 50 51 52 53 54 55 58 59 60 61 62 63 4.75K 2 R117 1% 1 R648 1 4.75K 3 3 3 3 DVI_D7 DVI_D6 DVI_D5 DVI_D4 HSYNC VSYNC 47.5 9 2 HPDET 47.5 1 R645 30 31 2 TLC_P TLC_N 1 R644 27 28 2 47.5 TDC2_N TDC2_P 1 R643 24 25 47.5 TDC1_N TDC1_P 2 TDC0_N TDC0_P 3 3 3 3 1 R642 21 22 VCC3V3 DVI_D11 DVI_D10 DVI_D9 DVI_D8 SCH P/N ART P/N FAB P/N Title: GND_VIDEO 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A DVI CODEC IIC Address = 0x76 A 8-1-2008_15:08 Date: Sheet Size: B Sheet 4 3 2 53 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCC5V 1 FB48 2 3 200MA IIC_SDA_DVI-F 3 2 2 FB49 40V FERRITE-220 VCC5V 3 DVI_CONN 1 Q21 NDS331N 2 1 C935 X7R 2 50V 270PF 1 To IIC DVI Bus D10 BAS40-04 1 IIC_SDA_DVI D FERRITE-220 VCC5V 2 1 C936 X7R 2 50V 270PF Q20 NDS331N 1 D 8,53 2 IIC_CLK_DVI-F 3 1 2 2 IIC_SCL_DVI 8,53 1 2.43K R16 1% 1 2.43K R118 1% VCC3V3 D11BAS40-04 200MA 40V 6 7 1.21K 53 53 R607 1% 1 3 VCC5V 53 53 2 1 C110 X5R 2 10V 0.1UF 1 DVI_HPDET 2 53 D12 BAS40-04 C 40V 2 VCC3V3 3 1 C924 NPO 2 50V 22PF FERRITE-220 1 1 53 DVI_HSYNC 2 D13 BAS40-04 200MA FB41 DVI_D1_N DVI_D1_P 9 10 DATA1_N DATA1_P DVI_D2_N DVI_D2_P 1 2 DATA2_N DATA2_P NC NC 12 13 DATA3_N DATA3_P NC NC 4 5 DATA4_N DATA4_P NC NC 20 21 DATA5_N DATA5_P 53 53 DVI_CLK_P DVI_CLK_N 23 24 DVI_CONN_HPDET VCC5V VCC5 1 3 VCC3V3 D14 BAS40-04 200MA 40V FB43 FB42 DVI_RED_TMP 14 1 C122 X5R 2 10V 0.1UF SHIELD_CLK SHIELD_0/5 SHIELD_1/3 SHIELD_2/4 22 19 11 3 GND0 15 CLK_P CLK_N AGND0 AGND1 C5 C6 16 HPDET SH_GND1 SH_GND2 25 26 DVI_CONN_HSYNC DVI_CONN_VSYNC C4 8 HS VS DVI_CONN_RED DVI_CONN_GREEN DVI_CONN_BLUE C1 C2 C3 RED GREEN BLUE C GND_VIDEO 2 1 C925 NPO 2 50V 22PF FERRITE-220 GND_VIDEO 330MA 5% DVI_CONN 82NH 330MA 5% 1 C926 NPO 2 50V 22PF VCC3V3 P10 B 2 1 C932 NPO 2 50V 33PF 2 1 2 1 82NH 3 1 B 1 C927 NPO 2 50V 22PF 1 R121 2 1% DVI_RED 75.0 53 DATA0_N DATA0_P DVI_VSYNC 2 53 17 18 40V GND_VIDEO 1 To Video Codec FB40 53 53 DVI_D0_N DVI_D0_P To Video Codec 200MA DDC_CLK DDC_DATA D15 BAS40-04 200MA 40V GND_VIDEO FB45 DVI_GRN_TMP 330MA 5% 1 C933 NPO 2 50V 33PF 2 1 2 1 82NH 82NH 330MA 5% 1 C928 NPO 2 50V 22PF VCC3V3 3 1 1 C929 NPO 2 50V 22PF 1 R122 2 1% DVI_GREEN 75.0 53 2 To Video Codec FB44 D16 BAS40-04 200MA 40V GND_VIDEO FB47 FB46 DVI_BLUE_TMP DVI VIDEO CONNECTOR 330MA 82NH 1 5% 330MA 5% 1 C930 NPO 2 50V 22PF SCH P/N ART P/N FAB P/N VCC3V3 0381255 0532059 1280432 2 NPO C934 2 50V 33PF 2 1 2 1% 1 82NH 3 1 1 C931 NPO 2 50V 22PF 1 R123 2 75.0 53 DVI_BLUE D17 BAS40-04 200MA Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM 40V A DVI VIDEO CONNECTOR GND_VIDEO A 7-10-2008_10:19 Date: Sheet Size: B Sheet 4 3 2 54 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 VCC3V3 2 1 VCC3V3 VCC3V3 VCC12V_P IIC_SDA IIC_SCL 10ALERT_L 2THERM_L 12RESET_L IIC_RESET_B VCC1V0 FAN_DACOUT 9VDD 8GND 66 R276 511 R274 511 66 FAN_SPD3 66 SMB_DX_P 60 1 C407 0.1UF 1C629 2 C59 10UF 6.3V DNP 2 LM87 VCC3V3 D VCC3V3 CI7 DACOUT_NTEST_IN11 C 511 FAN_SPD_5V D1P14 D1N13 VCC3V3 IIC_ALERT_B R275 FAN1_AIN15 FAN2_AIN26 24VID0_IRQ0 23VID1_IRQ1 22VID2_IRQ2 21VID3_IRQ3 20VID4_IRQ4 NC NC NC NC NC 4.75K R225 VCC3_PCI VIN1215 VIN516 VIN25_D2P18 VCCP2_D2N17 VCCP119 3SMBDATA 4SMBCLK VCC3V3 4,42 U20 1ADD_NTEST_OUT 511 IIC_SCL R273 SMBUS24 511 3NC 4.75K LTC1694 4 R272 IIC_SDA R497 NC R229 SMBUS15 VCC2V5 4.75K R224 1.00K VCC3V3 U27 1VCC 2GND VCC5V 4.75K D R279 R278 1.00K C415 0.1UF SMB_DX_N C 60 Silkscreen: "RTC OSC OUT" TP12 U22 7SDA 6SCL IIC_SDA IIC_SCL VCC3V3 4.75K 1 VCC3V3 VCC2V5 RTC-8564JE 2 1 2 3 C399 1000PF D3 3 1 I2C ADDR = 0xA2 1 R245 IIC_IRQ_B 3.00K R230 4 VCC4 CLKOE3 CLKOUT5 GND9 10INT IIC_IRQ_B TP D2 IIC_THERM_B NC R228 4,42 4.75K I2C ADDR = 0x5C J11 Silkscreen: "EEPROM WP DISABLE" B 4.75K R101 8,27,30,39,42,52,62,70 IIC_SCL IIC_SDA 8,27,30,39,42,52,62,70 FPGA_VBATT VCC3V3 B 3 2 Default setting: Jumper on IIC_SCL IIC_SDA VCC WP SCL SDA A0 A1 A2 VSS 1 B1 VCC3V3 U21 8 7 6 5 1 2 3 4 C408 0.1UF 2 24LC64 I2C ADDR = 0xA0 VCC3V3 A 11 11 SPI_DATA_CS_B SPI_DATA_OUT 4.75K R221 R271 4.75K 4.75K R270 4.75K R222 4.75K R223 I2C AND SPI DEVICES U19 1CS 2SO 3WP 4VSS VCC8 HOLD7 SCK6 SI5 25LC640 11 11 SCH P/N ART P/N FAB P/N VCC3V3 Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM I2C AND SPI DEVICES C405 0.1UF A SPI_DATA_IN SPI_CLK Date: 8-1-2008_15:08 Sheet Size: B Sheet 4 3 0381255 0532059 1280432 2 55 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 SYSACE_RESET_B 57 SYSACE_CFGA2 SYSACE_FLASH_CFGA1 SYSACE_FLASH_CFGA0 FPGA_MODE_2 FPGA_MODE_1 FPGA_MODE_0 JTAG_SRC_SEL SYSACE_CFGMODE PBR8 SRST7 RST6 RST5 2 R75 825 1 825 SW3 SDMX-8-X 4.75K R72 R71 4.75K R393 4.75K 4.75K R396 4.75K R398 R403 4.75K 4.75K R395 4.75K R397 4.75K R344 U31 1VCC3 2VCC25 3VCCA 4GND D 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 VCC3V3 VCC3V3 1 1 IF SW2 PRESSED > 2S; THIS ALSO ASSERTS SYSACE_RESET_B 57,62 3,56,57,62 3,56,57,62 3 3 3 58 57 4.75K R345 IF SW2 PRESSED < 2S; THIS ONLY ASSERTS FPGA_CPU_RESET_B R74 R73 825 Strong pullups required because RS drives 0 During Fallback configuration mode VCC2V5 D 2 2 VCC3V3 2 PB_SYSACE_RESET 62 NC LTC1326 1 SW1 VCC2V5 C C435 0.1UF 4.75K R332 VCC3V3 R331 VCC3V3 0 C C426 0.1UF FPGA_CPU_RESET_B 3 BPI Flash Addressing Scheme VCC3V3 FPGA (U37) BPI Addr Pin 4.75K R330 VCC3V3 RS1 (U37.AK12) SYSAC_FLASH_CFG1 FLASH_A23 U30 PBR8 SRST7 RST6 RST5 PB_FPGA_CPU_RESET 62 FPGA_CPU_RESET_B HARD_CPU_RESET_B R479-0ohm; R493-DNP A24 (U43.26) RS0 (U37.AK13) SYSAC_FLASH_CFG0 FLASH_A22 A23 (U43.9) R495-0ohm; R496-DNP A22 (U37.AK14) FPGA_A22 2 1VCC3 2VCC25 3VCCA 4GND 4 x 64 Mbit Revisions Parellel Flash (U43) Addr Pin Net Connection After Jumpering Schematic Net Name no connect no connect NC LTC1326 RS1 (U37.AK12) SYSAC_FLASH_CFG1 no connect 1 SW2 2 x 128 Mbit RS0 (U37.AK13) SYSAC_FLASH_CFG0 FLASH_A23 Revisions B Any Address Mode Note: R479-DNP; R493-0ohm no connect A24 (U43.26) R495-DNP; R496-0ohm A22 (U37.AK14) FPGA_A22 FLASH_A22 A23 (U43.9) A[21:0] (U37) FLASH_A[21:0] N/A A[22:1] (U43) FLASH_A[21:0] B See the ML510 User Guide for more details about BPI Flash 3,57 R389 FPGA_PROG_B 2 VCC3V3 R479 SYSACE_FLASH_CFGA1 3,56,57,62 0 R493 SYSACE_FLASH_CFGA0 3,56,57,62 DNP 4.75K 1 SW4 3 R413 FPGA_CCLK FLASH_A23 59 FPGA CONFIG, RESET, AND MISC I/O 4.75K 3,61 SCH P/N ART P/N FAB P/N R452 FPGA_DONE 0381255 0532059 1280432 330 R468 4.75K Title: A R495 SYSACE_FLASH_CFGA0 3,56,57,62 0 R496 FPGA_A22 3 DNP SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM FPGA CONFIG, RESET, AND MISC I/O FLASH_A22 59 A Date: 7-10-2008_10:19 Sheet Size: B Sheet 4 3 2 56 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 1 VCC3V3 VCC3V3 C546 0.1UF 2 C548 0.1UF C494 0.1UF C533 0.1UF C506 0.1UF C532 0.1UF C505 0.1UF C545 0.1UF VCC3V3 C551 0.1UF C493 0.1UF C547 0.1UF C523 0.1UF C495 0.1UF C552 0.1UF C496 0.1UF C522 0.1UF C579 0.1UF C580 0.1UF D D VCC3V3 VCC3V3 VCC3V3 NC R446 4.75K 56,57 58 58 58 58 NC 35 34 CF_IOWR CF_IORD C 46_BVD1 45_BVD2 40_VS2 33_VS1 24_WP 43_INPACK 46 45 40 33 24 43 39_CSEL 41_RESET 39 41 50_GND 1_GND 50 1 NC NC NC NC NC NC CF_CSEL CF_RESET GND_35 GND_26 GND_18 GND_9 GND_144 GND_136 GND_129 GND_120 GND_111 46_GND 54_GND 64_GND 83_GND 75_GND 91_GND 100_GND GND_112 GND_110 B NC=51,52,53,54,55,56,57,58,59,60 SYSACE_RESET_B SYSACE_TDO SYSACE_TMS SYSACE_TCK SYSACE_TDI SYSTEM ACE AND COMPACT FLASH VCC3V3 VCC3V3 182 RED A DS23 57 2 SCH P/N ART P/N FAB P/N 4.7K R394 SYSACE_ERRLED 1 R24 DS24 57 1.00K 35_IOWR 34_IORD R442 38 13 1.00K 38_VCC 13_VCC R443 25_CD2 49_D10 48_D09 23_D02 47_D08 22_D01 21_D00 20_A00 44_REG 19_A01 18_A02 42_WAIT 17_A03 16_A04 15_A05 14_A06 37_RDY/BSY 12_A07 36_WE 11_A08 10_A09 9_OEI 8_A10 32_CE2 7_CE1I 31_D15 6_D07 30_D14 5_D06 29_D13 4_D05 28_D12 3_D04 27_D11 2_D03 26_CD1 35 26 18 9 144 136 129 120 111 46 54 64 83 75 91 100 112 110 CFGMODEPIN TSTTDO TSTTMS TSTTCK TSTTDI 89 97 98 101 102 SYSACE_CFGMODE 25 49 48 23 47 22 21 20 44 19 18 42 17 16 15 14 37 12 36 11 10 9 8 32 7 31 6 30 5 29 4 28 3 27 2 26 ACEFLASH RESET_N STATLED ERRLED CFGADDR0 CFGADDR1 CFGADDR2 CLK 33 95 96 86 87 88 93 SYSACE_CFCD2 SYSACE_CFD10 SYSACE_CFD9 SYSACE_CFD2 SYSACE_CFD8 SYSACE_CFD1 SYSACE_CFD0 SYSACE_CFA0 SYSACE_CFREG SYSACE_CFA1 SYSACE_CFA2 SYSACE_CFWAIT SYSACE_CFA3 SYSACE_CFA4 SYSACE_CFA5 SYSACE_CFA6 SYSACE_CFRDBSY SYSACE_CFA7 SYSACE_CFWE SYSACE_CFA8 SYSACE_CFA9 SYSACE_CFDE SYSACE_CFA10 SYSACE_CFCE2 SYSACE_CFCE1 SYSACE_CFD15 SYSACE_CFD7 SYSACE_CFD14 SYSACE_CFD6 SYSACE_CFD13 SYSACE_CFD5 SYSACE_CFD12 SYSACE_CFD4 SYSACE_CFD11 SYSACE_CFD3 SYSACE_CFCD1 R444 56 SYSACE_STATLED SYSACE_ERRLED SYSACE_FLASH_CFGA0 SYSACE_FLASH_CFGA1 SYSACE_CFGA2 SYSACE_CLK 13 12 11 8 7 6 5 4 3 142 141 140 139 137 135 134 133 132 131 130 125 123 121 138 119 118 117 116 115 114 113 107 106 105 104 103 R445 B 57 57 3,56,62 3,56,62 56,62 22 CFCD2 CFD10 CFD09 CFD02 CFD08 CFD01 CFD00 CFA00 CFREG CFA01 CFA02 CFWAIT CFA03 CFA04 CFA05 CFA06 CFGRSVD CFA07 CFWE CFA08 CFA09 CFOE CFA10 CFCE2 CFCE1 CFD15 CFD07 CFD14 CFD06 CFD13 CFD05 CFD12 CFD04 CFD11 CFD03 CFCD1 1.00K DNP FPGA_TDI FPGA_TMS CFGINIT CFGPROG CFGTCK CFGTDI CFGTDO CFGTMS (DIE DOWN) VCC3V3 J22 1.00K 3 3,52 78 79 80 81 82 85 TQFP144 POR_RESET POR_TEST POR_BYPASS 0 R640 FPGA_INIT FPGA_PROG_B FPGA_TCK SYSTEMACE VCC3V3 72 74 108 PM_TDO R641 MPBRDY MPIRQ MPCE MPA06 MPA05 MPA04 MPD15 MPD14 MPD13 MPD12 MPD11 MPD10 MPD09 MPD08 MPD07 MPD06 MPD05 MPD04 MPD03 MPD02 MPD01 MPD00 MPA03 MPA02 MPA01 MPA00 MPWE MPOE VCCH_128 VCCH_109 73_VCCH 92_VCCH 55_VCCH 37_VCCH VCCH_17 VCCH_1 52 FPGA_TDO 39 41 42 43 44 45 47 48 49 50 51 52 53 56 58 59 60 61 62 63 65 66 67 68 69 70 76 77 128 109 73 92 55 37 17 1 3,52 3,39,61 3,56,57 3,52 SYSACE_MPBRDY SYSACE_MPIRQ SYSACE_MPCE SYSACE_MPA6 SYSACE_MPA5 SYSACE_MPA4 SYSACE_MPD15 SYSACE_MPD14 SYSACE_MPD13 SYSACE_MPD12 SYSACE_MPD11 SYSACE_MPD10 SYSACE_MPD9 SYSACE_MPD8 SYSACE_MPD7 SYSACE_MPD6 SYSACE_MPD5 SYSACE_MPD4 SYSACE_MPD3 SYSACE_MPD2 SYSACE_MPD1 SYSACE_MPD0 SYSACE_MPA3 SYSACE_MPA2 SYSACE_MPA1 SYSACE_MPA0 SYSACE_MPWE SYSACE_MPOE VCCL_126 99_VCCL 94_VCCL 84_VCCL 57_VCCL VCCL_25 VCCL_15 VCCL_10 C 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 NO PM JTAG 0 ohm resistors: R633, R637, R635, R639, R641 11 11 PM JTAG 0 ohm resistors: R632, R636, R634, R635, R640 11 126 99 94 84 57 25 15 10 U38 182 GREEN = Failsafe Mode Enabled Title: SYSACE_RESET_B 1 3,56,57 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM SYSTEM ACE AND COMPACT FLASH SYSACE_ERRLED R392 SYSACE_STATLED OR 0381255 0532059 1280432 FPGA_PROG_B 1 J10 2 SYSACE_ERRLED J4 2 56,57 57 A 7-10-2008_10:19 Date: Sheet Size: B Ver: C Rev: 01 SysACE Failsafe Mode Jumpers Sheet 4 3 2 57 of Drawn By 70 BF 1 4 3 VCC3V3 2 1 J9 NC 12 Vtst 2 Vref 58 PC4_TCK 6 TCK 58 PC4_TMS 4 TMS 58 PC4_TDI D NC 57,58 D 10 14 TDI INIT 8 SYSACE_TDO TDO 1 Gtst VCC3V3 3 GND 5 GND 7 GND 9 GND 11 GND 13 GND 16 VCC U39 15OE 56 CON_PC4 58 4,58 JTAG_SRC_SEL 1 A/B PC4_TDI 2 A1 CPU_TDI 3 B1 1 Y1 4 SYSACE_TDI VCC2V5 57 0 58 R352 CPU_VSENSE 0 58 J12 C 58 CPU_TDO 1 2 4,58 CPU_TDI 3 4 CPU_TRST_B 4,58 5 6 CPU_VSENSE 58 4,58 CPU_TCK 7 8 4,58 CPU_TMS 9 NC 4,58 NC 10 12 NC 13 14 NC 15 16 CPU_TCK A2 5 B2 6 1 Y2 7 SYSACE_TCK 57 58 0 C R405 TRC_VSENSE 0 58 NC 11 CPU_HALT_B 4,58 PC4_TCK 4,58 PC4_TMS 11A3 CPU_TMS 10B3 CPU_TDO_TMP 14A4 1 Y3 9 SYSACE_TMS 57 4,58 0 R361 CPU_TDI 4.75K NC NC 4 NC 57,58 SYSACE_TDO 13B4 8 1 Y412 R425 CPU_TDO_R 0 CPU_TDO 4,58 58 100 4.75K GND 4,58 SN74LVC157A TSSOP-16 R349 CPU_TCK 4.75K P8 MICTOR 38 R347 CPU_TMS 4,58 NOTE: THIS MUX INTRODUCES AN IMPLICIT 2.5V TO R339 CPU_HALT_B 4.75K 3.3V LEVEL-SHIFT FOR THE CPU JTAG SIGNALS. THE SERIES RESISTOR ON CPU_TDO IS INTENDED B 4,58 R355 CPU_TRST_B B TO PROVIDE PROTECTION FOR A 2.5V JTAG PROBE. 4 4 4 4 4 4 4 4 4 4 4 4 58 39 TRC_TS6 TRC_TS5 TRC_TS4 TRC_TS3 TRC_TS2 TRC_TS1 TRC_TS0 TRC_ES4 ATD_1 ATD_2 ATD_3 ATD_4 TRC_VSENSE TRC_CLK NC NC NC NC NC 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 TS6 TS5 TS4 TS3 TS2 TS1 TS0 ES4 ATD1 ATD2 ATD3 ATD4 NC14 VREF NC10 NC8 TRCCLK NC4 NC2 ES3 ES2 ES1 ES0 BS2_BR2 BS1_BR1 BS0_BR0 ATD0 TRST TDI TMS TCK NC13 TDO NC9 HALT NC5 NC3 NC1 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 TRC_ES3 TRC_ES2 TRC_ES1 TRC_ES0 TRC_BS2_BR2 TRC_BS1_BR1 TRC_BS0_BR0 ATD_0 CPU_TRST_B CPU_TDI CPU_TMS CPU_TCK NC NC 4.75K VCC3V3 VCC3V3 4 4 4 4 4 4 4 4 4,58 4,58 4,58 4,58 CPU_TDO 58 CPU_HALT_B ATCB_CLK 4,58 39 58 R423 PC4_TCK 4.75K C553 0.1UF JTAG, DEBUG, TRACE CONNECTORS SCH P/N ART P/N FAB P/N NC NC Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A JTAG, DEBUG, TRACE CONNECTORS A Date: 7-10-2008_10:19 Sheet Size: B Sheet GND;G1,G2,G3,G4,G5 MICTOR38P_RECP 4 3 2 58 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 Silkscreen: "Strata FLASH" "256 MBit" D D VCC1V8 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 56 56 4.7K R687 1 1 2 3 4 RP5 4.75K 8 7 6 5 C 2 VCC3V3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 FLASH_A0 FLASH_A1 FLASH_A2 FLASH_A3 FLASH_A4 FLASH_A5 FLASH_A6 FLASH_A7 FLASH_A8 FLASH_A9 FLASH_A10 FLASH_A11 FLASH_A12 FLASH_A13 FLASH_A14 FLASH_A15 FLASH_A16 FLASH_A17 FLASH_A18 FLASH_A19 FLASH_A20 FLASH_A21 FLASH_A22 FLASH_A23 29 A1 25 A2 24 A3 23 A4 22 A5 21 A6 20 A7 19 A8 8 A9 7 A10 6 A11 5 A12 4 A13 3 A14 2 A15 1 A16 55 A17 18 A18 17 A19 16 A20 11 A21 10 A22 9 A23 26 FLASH_D0 FLASH_D1 FLASH_D2 FLASH_D3 FLASH_D4 FLASH_D5 FLASH_D6 FLASH_D7 FLASH_D8 FLASH_D9 FLASH_D10 FLASH_D11 FLASH_D12 FLASH_D13 FLASH_D14 FLASH_D15 34 DQ0 36 DQ1 39 DQ2 41 DQ3 47 DQ4 49 DQ5 51 DQ6 53 DQ7 35 DQ8 37 DQ9 40 DQ10 42 DQ11 48 DQ12 50 DQ13 52 DQ14 54 FLASH_CE_B FLASH_ADV_B FLASH_WAIT 3 5 1 C186 0.1UF 2 X5R 10V VCC3V3 VCCQ38 VPP43 VSS012 VSS128 VSS231 1 C284 1 C386 1 C376 10UF 0.1UF 2 X5R 0.1UF 2 X5R 2 X5R 10V 10V 10V 1 C375 1 C355 0.1UF 0.1UF 2 X5R 2 X5R 10V 10V C Programmable-Delay Supervisor Circuit VCC3V3 DQ15 NC 3 1 C185 10UF 2 X5R 10V A24 FLASH_RESET_B FLASH_CLK FLASH_WE_B FLASH_OE_B 8,59 3 3 3 VCC013 VCC133 44 RST_B 45 CLK 14 WE_B 32 OE_B 27 RFU 30 CE_B 15 WP_B 46 ADV_B 56 8,59 SENSE5 CT4 3MR_N C477 DNP WAIT B TPS3808 U60 U43 1 4.7K 2 VDD6 1RESET_N 2GND NC B R465 FLASH_RESET_B <Cap Value in nF> = (((<DELAY in S>)-(0.5*0.001)) *175) SYNC. SRAM FLASH SCH P/N ART P/N FAB P/N 0381255 0532059 1280432 Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A SYNC. SRAM FLASH A 8-1-2008_15:08 Date: Sheet Size: B Sheet 4 3 2 59 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCC2V5 D D L25 1 2 0805 1 C6281 0.1UF 1 1UF C282 2 TEST_MON_AVDD 3,60 2 3 2 Default Setting: J38 Jumper on pins 2-3 VCC5V NC 1TEMP TRIM5 NC 2GND L1 3VIN 1 C 1UF C283 L26 1 2 VOUT4 ADR_VREFP 60 C2761 0.1UF ADR03 SC70 U29 1 2 TEST_MON_VREFP 3 C 0805 2 2 0805 System Monitor Header for probing B B J33 55 55 60 67 TEST_MON_VP0_P 2 FPGA_DX_P 3 4 FPGA_DX_N 5 6 ADR_VREFP CURRENT_SENSE_OUT 7 8 9 10 11 12 3 3 TEST_MON_AVDD 3,60 CURRENT_SENSE_REG 67 Default setting: TEST_MON_VN0_N 1 3 1 SMB_DX_N HEADER2X6 100 3 SMB_DX_P 2 C213 R45 1 100 2 0.01UF 2 R46 Jumper on 1-2, 3-4 To Measure VCCINT: 1 SYSMON HEADER / AVDD VREFP SUPPLY Jumper on 9-11, 10-12 SCH P/N ART P/N FAB P/N place 100 ohm resistors and 0.01 cap near FPGA A Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM SYS MONITOR HEADER / FPGA AVDD VREFP SUPPLY A Date: 8-1-2008_15:09 Sheet Size: B Sheet 4 3 2 60 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCC3V3 DS20 R368 VCC3V3 GREEN D D 10K 10K R683 10K R682 10K R684 R685 DS19 DS18 U36 20VCCA 7 2 6 3 5 4 11 11 11 11 192OE 112A1 132A2 152A3 172A4 R399 4.75K 825 2 NC NC NC NC 1 2 1 825 R623 2 825 R168 1 R163 825 R622 2 SW5 SDMX-4-X 1 11OE 21A1 41A2 61A3 81A4 DBG_LED_0 DBG_LED_1 DBG_LED_2 DBG_LED_3 DS17 182 R356 GREEN 2Y19 2Y27 2Y35 2Y43 182 R362 GREEN 1Y118 1Y216 1Y314 1Y412 BUFFER 1 NON-INVERTING 8 R364 GREEN VCC3V3 182 182 NC NC NC NC GND10 VCC3V3 SN74LVC244A C501 0.1UF C C VCC3V3 RED R315 182 2 1 GRN 4 3 DS9 B B VCC3V3 VCC3V3 U33 20VCCA FPGA_LCD_RS 5 FPGA_LCD_E 5,62 FPGA_LCD_RW 5,62 BUFFER 192OE 112A1 132A2 152A3 172A4 NON-INVERTING 4 4 3,56 3,39,57 11OE 21A1 41A2 61A3 81A4 OPB_BUS_ERROR PLB_BUS_ERROR FPGA_DONE FPGA_INIT R320 1Y118 1Y216 1Y314 1Y412 LED_OPB_ERROR LED_PLB_ERROR LED_DONE LED_INIT 2Y19 2Y27 2Y35 2Y43 LCD_RS LCD_E LCD_RW LED_DONE_BUF GND10 182 RED 2 1 GRN 4 3 DS10 62 62 62 62 DS12 R333 DEBUG AND STATUS LEDS 182 GREEN SCH P/N ART P/N FAB P/N SN74LVC244A 4.75K R358 VCC3V3 A VCC3V3 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM DS11 R329 DEBUG AND STATUS LEDS 182 C443 0.1UF Title: RED A Date: 8-1-2008_15:08 Sheet Size: B Sheet 4 3 0381255 0532059 1280432 2 61 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCC3V3 VCC3V3 SN74LVC1G00 SOT23-5 B C447 0.1UF 5,61 C977 0.1UF R376 SPKR C R360 B U61 5 5 5 C FPGA_LCD_DB1 4 FPGA_LCD_DB2 5 FPGA_LCD_DB3 6 FPGA_LCD_DB4 7 FPGA_LCD_DB5 8 FPGA_LCD_DB6 9 FPGA_LCD_DB7 5 10 11 12 OE A2 B1 A3 B2 A4 A5 A6 A7 A8 GND1 GND2 B3 B4 B5 B6 B7 B8 GND3 2 23 NC R686 100 21 LCD_DB0 62 20 LCD_DB1 62 19 LCD_DB2 62 18 LCD_DB3 62 17 LCD_DB4 62 16 LCD_DB5 62 15 14 3 U45 DEVICE=POT_10K J13 GND LCD_DB6 61 62 LCD_DB7 62 62 62 13 62 62 62 3,56,57 2 LCD_VLC 3 4 LCD_RS 61 LCD_RW 5 6 LCD_E 61 LCD_DB0 7 8 LCD_DB1 62 LCD_DB2 9 10 LCD_DB3 62 LCD_DB4 11 12 LCD_DB5 62 LCD_DB6 13 14 LCD_DB7 62 15 16 FPGA_LED_USER1 4 FPGA_LED_USER2 4 62 LCD_BLV MANF=ASTRON MANF_PN=27-0103-208-11 J23 1 2 SYSACE_FLASH_CFGA0 SYSACE_FLASH_CFGA1 4 SYSACE_CFGA2 5 6 LED_DONE_R 7 8 ATX_PWRLED 9 10 ATX_SPKR 11 12 IIC_SDA 8,27,30,39,42,52,55,70 13 14 41 KBINH 15 16 62 ATX_IDELED_R 17 18 PWR_SUPPLY_ON 19 20 56 PB_SYSACE_RESET 21 22 56 PB_FPGA_CPU_RESET 23 24 VCC3V3 56,57 62 182 VCC5V 1 3 3,56,57 R453 2 22 SN74LVCC3245A 62 ATX_PWRLED VCC5V CW A1 1 24 8,27,30,39,42,52,55,70 IIC_SCL 62 B 63 R430 5 3 NC TRANSLATOR 5 FPGA_LCD_DB0 DIR VOLTAGE LEVEL 2 VCCB VCCA E 2 3904 1N4148 SOD-123 D4 1 5 C478 180PF 3 470 VCC3V3 1 D 1 Q3 42,47 VCC2V5 62 33 C440 0.1UF U62 5 ATX_SPKR 3 GND D 5,61 4.75K Y FPGA_LCD_RW R621 4 2 VCC2V5 62 1.00K A FPGA_LCD_E 4.75K VCC C978 0.1UF 1 R620 5 C LCD_BLV NC VCC5V B Default setting: Jumper on pins 19-20 HDR_2X12 61 R433 LED_DONE_BUF LED_DONE_R 62 VCC5V 182 D5 ATX AND FRONT PANEL CONNECTORS 46 PIDE_DASP_B ATX_IDELED 2 1 3 R451 ATX_IDELED_R SCH P/N ART P/N FAB P/N 62 182 NC C531 0.1UF C582 0.1UF Title: D6 A 46 SIDE_DASP_B 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM ATX AND FRONT PANEL CONNECTORS 2 1 3 A NC Date: 8-1-2008_15:08 Sheet Size: B Sheet 4 3 2 62 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 VCC5V D 1 VCC3V3 D VCC12V_N J18 11 12 13 62 2 14 PWR_SUPPLY_ON 15 16 17 NC 18 19 20 3.3-C 3.3-A -12V 3.3-B COM-D COM-A PS-ON 1 Min Load 1.5A on 5v, 0.8A on 3.3V and 0.5A on 12V 2 3 4 5V-A COM-E 5 COM-B COM-F 6 5V-B COM-G 7 COM-C PW-OK -5V 5V-C NC 5V_STDBY 9 5VSB 5V-D VCC12V_P 8 10 12V BLUE VCC5V C VCC12V_N VCC12V_P VCC3V3 C 2 C239 1000UF 10V C234 1000UF 10V C218 1000UF 10V 300 C241 470UF 25V R485 DS33 1 25V 470UF C204 ATX Power Connector B VCC1V0 VCC3V3 B 5V_STDBY U44 C15 220UF 6.3V 5 22UF C349 10V 2 NC 33V_STDBY 31,32,70 OUT 1 IN SHDN ADJ 4 BYP GND3 3 1 GND6 6 GND7 7 45.3 C136 220UF 6.3V C155 220UF 6.3V 1206 C153 220UF 6.3V 26.1 C220 220UF 6.3V R53 C137 220UF 6.3V R68 8 2 C350 3.3UF 6.3V LT1763CS8 VCC2V5 C235 220UF 6.3V C64 220UF 6.3V C154 220UF 6.3V C51 220UF 6.3V C135 100UF 10V C240 100UF 10V C187 22UF 25V 1206 VCC5V ATX CONNECTOR, PWR TOGGLE SCH P/N ART P/N FAB P/N VCC12V_N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A ATX CONNECTOR, PWR TOGGLE AND HEADER A 8-1-2008_15:08 Date: BULK CAPS DISTRIBUTED AROUND BOARD. Sheet Size: B Sheet 4 3 2 63 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCC1V0 VCC5V 3904 RED 2 15K R280 C423 0.1UF U28 1VEF 2IN1 3IN2 4GND R283 120 GRN 4 3 LTC2909 VCC5V 4.42K 1 E 2 C416 0.1UF R295 SEL8 TMR7 VCC6 RST5 VCC5V R298 DS8 C985 1 2200PF Silkscreen: "VCC 5.0V" VCC8 MODE7 OUT16 OUT25 1 VCC5V RED 2 VCC5V R296 C422 0.1UF 330 R281 GRN 4 3 D 330 DS7 MC34161D 1.62K 1.02K R624 R625 1.27K 1.27K C984 1000PF VCC5V C B 3 U5 1ADJ1 2ADJ2 3REF 4GND NC C219 1000PF VCC3V3 Silkscreen: "VCC 1.0V" C221 0.1UF R482 D 1.02K VCC3V3 R483 Q22 VCC5V 1 2 VCC2V5 VCC5V GRN 4 3 DS6 MC34161D R249 C410 330 R243 R628 VCC8 MODE7 OUT16 OUT25 330 B U23 1ADJ1 2ADJ2 3REF 4GND NC C986 1000PF C989 1000PF Silkscreen: "VTT_DDR2" 1 Q23 VCC5V C C988 0.1UF 0.1UF R629 1VEF 2IN1 3IN2 4GND RED 1 2 VCC3V3 1.62K U24 R626 1.33K VCC3V3 1.02K VCC5V 1.02K Silkscreen: "VCC 2.5V" 1.62K VCC5V R627 R248 C401 0.1UF VTT_DDR2 1.62K R242 VCC2V5 1 3 SEL8 TMR7 VCC6 RST5 E 2 3904 4 RED 2 R247 15K R241 GRN 3 120 DS5 LTC2909 C987 1 2200PF C C 2 VCC3_PCI DS4 MC34161D GTP_AVCC 330 R197 VCC3V3 330 C387 0.1UF NC C983 1000PF C991 1000PF VCC3V3 B U63 1ADJ1 2ADJ2 3REF 4GND 1 3 SEL8 TMR7 VCC6 RST5 E 2 3904 4 RED 2 R194 15K R195 GRN 3 120 DS38 LTC2909 C990 1 2200PF 1VEF 2IN1 3IN2 4GND VCC5V VCC1V8 RED 1 2 VCC8 MODE7 OUT16 OUT25 GRN 4 3 DS2 MC34161D VCC5V R173 C367 0.1UF 330 R161 C359 0.1UF R170 330 VCC5V 523 U13 B Silkscreen: "VCC 3.3V" 1.62K 2.32K VCC5V 1.62K R160 R172 VCC5V 2 B C360 0.1UF Silkscreen: "GTP_AVCC 1.0V" 1 Q24 C VCC3V3 R158 VCC3V3 R631 C398 0.1UF 1.02K GRN 3 R215 R630 4 21,64,68 RED 2 1.27K 1 VCC5V 1.02K VCC8 MODE7 OUT16 OUT25 VCC5V 1.27K U18 1VEF 2IN1 3IN2 4GND Silkscreen: "VCC 3.0V" R212 1.96K VCC5V R213 R214 C388 0.1UF 1.62K R196 VCC3_PCI U12 1VEF 2IN1 3IN2 4GND Silkscreen: "VCC 1.8" 1 VCC8 MODE7 OUT16 OUT25 4 RED 2 GRN 3 DS1 MC34161D VCC5V R171 VCC5V C366 0.1UF 330 R159 330 POWER SUPPLY MONITORS AND LEDS 21,64,68 "1.0V" "2.5V" "VCC3_PCI" "3.3V" "5V" VCC1V0 VCC2V5 VCC3_PCI VCC3V3 VCC5V "VTT_DDR2" VTT_DDR2 GTP_AVCC TP SCH P/N ART P/N FAB P/N TP9 "1.8V" VCC12V_N VCC12V_P VCC1V8 Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A POWER SUPPLY MONITORS AND LEDS A TP TP TP TP TP TP TP TP TP TP17 TP14 TP10 TP8 TP16 TP13 TP19 TP18 TP7 Sheet Size: B Sheet 4 3 8-1-2008_15:08 Date: 2 64 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 Mounting holes for ATX Form Factor D D M5 M16 M18 M28 1 1 1 1 M1 M2 1 NC M4 M7 1 1 M17 M26 M29 1 1 1 M3 1 1 NC M8 M9 1 1 M11 1 NC NC NC NC M13 M22 M23 M24 M25 1 1 1 1 1 NC NC NC NC NC FMC connectors for power supply testing M27 C C 1 VCC1V8 VCC3V3 VCC2V5 1 FMC_15 VCC1V8 J43 VCC3V3 VCC2V5 FMC_15 J41 FMC_15 1 1 1 1 VCC1V0 FMC_15 J45 2 3 4 5 6 7 8 9 10 11 12 13 14 15 J47 2 3 4 5 6 7 8 9 10 11 12 13 14 15 FMC_15 2 3 4 5 6 7 8 9 10 11 12 13 14 15 J40 2 3 4 5 6 7 8 9 10 11 12 13 14 15 FMC_15 1 1 1 VCC1V0 J46 FMC_15 FMC_15 J44 J42 B B TP6 TP15 TP1 TP28 TP21 TP23 TP3 TP5 TP2 TP25 TP24 TP27 TP4 TP26 TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP 1 1 1 1 1 1 1 1 1 1 1 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 2 3 4 5 6 7 8 9 10 11 12 13 14 15 TP11 TP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 TP22 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Spread out on the board. 1 Silkscreen: ATX MOUNTING HOLES / TEST POINTS "GND" SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A ATX MOUNTING HOLES AND TEST POINTS A 8-1-2008_15:08 Date: Sheet Size: B Sheet 4 3 2 65 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCC12V_P D Q2 TAB 0 NOSTUFF G S IRFL9110 C R324 D 1 Q1 FAN_DACOUT 4 1 R15 1 55 2 2 100K R325 D 3 B 3 0 E 2 3904 VCC5V R328 1.00K 1 2 4.75K R336 C R337 3 FAN_SPD3 55 0 R338 J7 VCC12V_N 10.0K_DNP 240 R326 2.4K R327 C C433 0.1UF_DNP B B 2 3 4.75K 1 R226 VCC5V FAN_SPD_5V 55 FPGA FAN SWITCH AND TACH SCH P/N ART P/N FAB P/N J8 Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A FPGA FAN SWITCH AND TACH A Date: 8-1-2008_15:08 Sheet Size: B Sheet 4 3 2 66 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 2VIN 0.1UF 2 1 VCC2V5 VR3 TI_PTH05010_ADJ 2VIN 1 J37 TI_PTH05010_ADJ VOUT6 1 C860 2 330UF 2 C417 2 330UF EUH VO_ADJ4 J35 2.21K J30 C855 10UF 1 3INHIBIT 1 C487 1UF 2 2 R484 2 EUH 68 SENSE5 1 VO_ADJ4 1GND1 7GND2 C858 2 330UF 2 1 C184 1UF 1 3INHIBIT D VCC2V0 VOUT6 SENSE5 1 R524 2 1K 4.12K TRK8 VR1 For 2.0V, R29 = 4.176K 1 DNP 1 C611 RSET=10K*(0.8V/(VOUT-0.8V)-2.49K Vout=(8K/(RSET+2.49K))+0.8V 2 R523 R522 2 R520 2 1 2 R517 M_DN9 MRGIN_DN_20 M_UP10 MRGIN_UP_20 2 1 1GND1 7GND2 0.1UF 3 1 0 TRK8 1 C992 M_DN9 MARGIN_DN_25 M_UP10 MARGIN_UP_25 1 1-2 : -5% Margining 2-3 : +5% Margining VCC5V 0 VCC5V 1 3 J24 2 1 VCC5V D VCC5V 1-2 : -5% Margining 2-3 : +5% Margining 2 2.0V Supply @15A 2.5V Supply @15A C857 10UF 1 C485 2 330UF 1 2 LOW ESR LOW ESR 2 LOW ESR LOW ESR C C 1.0V Supply @30A VCC5V VCC5V B B 1.82K 1 C455 X5R 2 10V 10UF 1 C612 X5R 2 10V 10UF 1 C995 X5R 2 10V 10UF 1 CURRENT_SENSE_REG INH/UVLO TT 1 13 R657 TI PTH05T210W 2 6.3V 2 POSCAP VR2 C996 470UF 12 1 3 4 7 8 C859 470UF VADJ GND_3 GND_4 GND_7 GND_8 NC TRACK VIN_2 VIN_6 14 2 6 VCC5V 1 2 R519 SNS_P 10 VOUT_5 VOUT_9 5 9 SNS_N 11 2 S1 60 VCC1V0 RES_CUR_SENSE_SMT 1R1 R24 S2 3 SMV_R4723 0.002R 3 WATTS 1 C421 1 1000UF 2 2.5V 2 POSCAP C994 1000UF 1 2.5V 2 POSCAP C993 C856 NS 10UF NA TANT 1 FPGA CORE AND IO VOLTAGE 2 SCH P/N ART P/N FAB P/N 63.4K 6.3V POSCAP 1 2 R518 CURRENT_SENSE_OUT 0381255 0532059 1280432 60 Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A FPGA CORE AND IO VOLTAGE A Date: 8-1-2008_15:08 Sheet Size: B Sheet 4 3 2 67 of Ver: C Rev: 01 Drawn By 70 BF 1 4 VCC2V0 3 1K 1 MAX8556_7 TQFN16 2 R536 12 POK/POR 16 EN C867 1 1206 22UF 240 1 NC VCC2V0 NC MAX8556_7 TQFN16 1 2 R541 C832 22UF 1 2 C488 22UF 12 POK/POR 16 EN C834 1206 2 22UF 2 240 340 1 NC GTP_AVTTRX 15 21 1.2V@4A Nominal NC 1 14 GND 17 GND_TAB 13 FB 2 R529 D 7 OUT_7 8 OUT_8 9 OUT_9 10 OUT_10 11 OUT_11 1 IN_1 2 IN_2 3 IN_3 4 IN_4 5 IN_5 6 IN_6 Q6 1 67,68 1K 1 1 1 21 LXT/SXT Devices: 1.2V@4A Nominal FXT Device: 1.0V@4A Nominal 14 GND 17 GND_TAB 13 FB 2 R531 15 For FXT devices R436 must be 240 ohms For LXT/SXT devices R436 should be 340 ohms Place R436 in an easily accessible area GTP_AVCC_PLL 7 OUT_7 8 OUT_8 9 OUT_9 10 OUT_10 11 OUT_11 1 IN_1 2 IN_2 3 IN_3 4 IN_4 5 IN_5 6 IN_6 D 2 NOTE: 67,68 2 C507 22UF C489 22UF 1 2 2 Q8 2 R436 340 1 R527 2 C C R2 = R1*{(Vout/0.5)-1} VCC2V0 67,68 1K 1 2 MAX8556_7 TQFN16 2 R539 12 POK/POR 16 EN C833 1 22UF 240 NC 2 R530 15 14 GND 17 GND_TAB 13 FB 67,68 1K GTP_AVTTTX 7 OUT_7 8 OUT_8 9 OUT_9 10 OUT_10 11 OUT_11 1 IN_1 2 IN_2 3 IN_3 4 IN_4 5 IN_5 6 IN_6 1206 1 VCC2V0 1 21 1.2V@4A Nominal C835 1 2 NC 1 2 C511 22UF 1 MAX8556_7 TQFN16 2 R537 1206 C502 22UF 22UF 240 2 Q9 1 2 R528 12 POK/POR 16 EN GTP_AVCC 7 OUT_7 8 OUT_8 9 OUT_9 10 OUT_10 11 OUT_11 1 IN_1 2 IN_2 3 IN_3 4 IN_4 5 IN_5 6 IN_6 NC 15 14 GND 17 GND_TAB 13 FB 21,64 1.0V@4A Nominal NC 1 C504 22UF 1 C524 22UF 2 2 Q7 340 1 B R526 240 2 1 R525 B 2 GTP POWER SUPPLIES SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A GTP POWER SUPPLIES A Date: 8-1-2008_15:08 Sheet Size: B Sheet 4 3 2 68 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 1 VCC5V D D 1 1 C36 2 10UF C45 2 10UF VCC5V 0.9V@2A IRF7821 VTT_DDR2 VCC1V8 1 2 3 4 1 0.9V@10mA C69 4.7UF 2 VREF_DDR2 5,6,7,8,9,25,27,28,30 1_S 2_S 3_S 4_G SO-8 VCC1V8 8 7 6 5 D_8 D_7 D_6 D_5 L22 U40 C 1.8V@10A 1 IRF7832 4.7K SO-8 1 2 3 4 1_S 2_S 3_S 4_G U8 C173 150UF 10V C174 150UF 10V 21 11 12 13 14 15 16 17 18 19 100K R258 B R259 PWRPAD_21 S3_11 S5_12 PGOOD_13 V5IN_14 CS_15 PGND_16 DRVL_17 LL_18 DRVH_19 5.1K 0.1UF 0805 C57 2 10UF 1_VLDOIN 2_VTT 3_VTTGND 4_VTTSNS 5_GND 6_MODE 7_VTTREF 8_COMP 9_VDDQSNS 10_VDDQSET 20_VBST 2 1 C58 2 10UF C35 1 1 B 1 2 3 4 5 6 7 8 9 10 20 D_8 D_7 D_6 D_5 1uH C46 2 4.7UF 1 R261 TPS51116 HTSSOP-20 1 C52 R260 0805 0.033UF 2 4.7K 8 7 6 5 C 2 VCC5V U56 DDR2 POWER SUPPLY SCH P/N ART P/N FAB P/N Title: 0381255 0532059 1280432 SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM A DDR2 POWER SUPPLY A Date: 8-1-2008_15:08 Sheet Size: B Sheet 4 3 2 69 of Ver: C Rev: 01 Drawn By 70 BF 1 4 3 2 IIC_SCL 8,27,30,39,42,52,55,62 VCC12V_P IIC_SDA 8,27,30,39,42,52,55,62 1 R538 D 1_S 2_S 3_S 4_G SO-8 D_8 D_7 D_6 D_5 1 C772 1 R33 CFILTERB35 Si4420DY 8 7 6 5 15 C774 D_8 D_7 D_6 D_5 SO-8 1_S 2_S 3_S 4_G 1 2 3 4 C829 2 R544 0.047UF C ONA44 ONB43 AUXENA45 AUXENB42 FAULT_A1 FAULT_B36 1 U51 3VOUTA16 22UF C597 25V PCIE_SLOTA_3V3 15 2 R542 0.022UF SO-8 22PF 0.1UF C777 C776 2 R543 Si4420DY 8 7 6 5 15 IIC_SCL_PCIE IIC_SDA_PCIE 70 70 1 DNP 1 DNP 1 100K 1 100K 100K 1 100K 1 1 100K 1 100K 1 100K 100K 1 2 R561 100K 1 2 R564 R691 2 R690 2 R555 2 R553 2 33V_STDBY 31,32,63,70 2 R556 D_8 D_7 D_6 D_5 SO-8 1_S 2_S 3_S 4_G NC 2 0.01 0.01UF 100K 1 100K 1 2 R557 DEVICE=MIC2592B U55 NC 3VINB25 INT37 SCL47 SDA48 100K-DNP R567 2 1 1 R37 A041 A140 A239 20 19 46 18 17 22UF C599 25V VCC3V3 1 2 GND1 NC3 GND2 NC4 RFILTER_AB 12VOUTB27 C775 NC B U14 PCIE_SLOTB_12V C601 2 R566 R552 2 NC_130 1 C827 22UF 100K 1 GPIB_038 8 7 6 5 R551 2 D_8 D_7 D_6 D_5 R550 2 1_S 2_S 3_S 4_G 2 R565 NC R549 2 Si4435DY 1 2 3 4 0.1UF C826 NC7 R548 2 0.025 12VSENSEB29 100K 1 GPIA_04 2 1 100K 1 R38 R547 2 C778 12VINB32 1 100K FORCE_A9 FORCE_B28 C779 R546 2 22PF 0.1UF 1 100K 22UF C600 25V PWRGDA6 PWRGDB31 R554 2 VCC12V_P 3VGATEB23 C828 0.047UF 2 0.01UF 2 R558 1 CFILTERA2 C 3VSENSEB24 C603 0 IREF33 C773 0.01 12VGATEB34 2 C831 2 22UF C594 25V VCC3V3 0.1UF B 1 C602 2 100UF VSTBYA11 VSTDBYB26 22PF 3VGATEA14 1 0.01UF 1 U16 PCIE_SLOTA_12V 3VINA12 0.1UF 47UF 8 7 6 5 C830 C770 15 C596 22UF 3VSENSEA13 33V_STDBY Si4435DY C771 12VOUTA10 70 31,32,63,70 1 2 3 4 2 R540 IIC_SDA_PCIE 2 0.1UF 0.022UF R431 0 0.025 12VGATEA3 I2C ADDR = 0x8E Make sure IIC Address is set correctly C768 12VINA5 12VSENSEA8 70 22PF 0.1UF C769 D IIC_SCL_PCIE 0 22UF 25V C595 R428 1 1 2 3 4 PCI-E PWR MGMT CONTROLLER SCH P/N ART P/N FAB P/N 0381255 0532059 1280432 1 Title: SCHEM, ROHS COMPLIANT, ML510 VIRTEX-5 EVAL PLAFTORM U52 A PCIE_SLOTB_3V3 VAUXA15 PCIE_SLOTA_3V3AUX VAUXB22 PCIE_SLOTB_3V3AUX PCI-E PWR MGMT CONTROLLER 22UF C598 25V 3VOUTB21 31 32 A Date: Sheet Size: B Sheet DEVICE=MIC2592B U55 4 3 8-1-2008_15:08 2 70 of Ver: C Rev: 01 Drawn By 70 BF 1

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