Tutorial 4 Parameters Sweeping for Circuit Characterization

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Tutorial 4
Parameters Sweeping for Circuit Characterization
In a system, some parameters are correlated, which means that when a parameter
changes, some other parameters will change correspondingly. During circuit analysis, it
is very common to draw curves to characterize such relationship. In this tutorial, we will
take a single NMOS transistor as an example, and learn how to run DC sweeping analysis
to find the relationship between Ids, Vgs and Vds. The similar procedures can be applied to
other system analysis.
NMOS Transistor Characteristics
ID
+Vgate
+-
Vgs
Vds
Fig. 1 shows the circuit configuration. Vds and Vgs are two controllable DC voltage
sources. To determine the relationship between Ids and Vds, we sweep the value of Vds
from 0 to 3.3v and then plot the corresponding current. Since the transistor current also
strongly depends on the gate-source voltage, we set different Vgs to depict such
dependence. Fig. 2 shows the simulation results.
Experimental Procedures:
1. Input the schematic as you learned from tutorial 1.
1). Attach HP0.60 AMOS14TB technology file
2). Set the transistor size to be W/L=9um/3um
3). Drain-Source Voltage source Vds:
Select NCSU_Analog_Parts
Voltage_Sources
Vdc
Don’t change the property
4). Gate-source voltage source Vgs:
Select NCSU_Analog_Parts
Voltage_Sources
Vdc
In the schematic, highlights Vgs, and then click the button “Q” to change its
property. In the Edit Object Properties Window, under the heading “DC
voltage”, please fill in a variable name, for example “Vgate”.
Don’t assign any numeric value!
2. Choosing Analysis
From the schematic window, click “Tools””Analog Environment”
In the new simulator window
1). Select Setup
Simulator/Directory/Host. Choose simulator “Spectre”,
and then click “OK”.
2). Choose Model Library
From the Analog Artist menu, select Setup ->Model Library…. Add model files as
below
3). Select “Analysis
Choose…”
This will result in a window, “Choose Analysis”. Click dc analysis.
4). Under “Sweep Variable”, select “Component Parameter”, which will expand
the window for other options. Click “Select Component” and go to the schematic to
highlight the voltage source Vds. You will find the “Component Name” is filled
automatically. You should manually fill in the “Parameter Name” item “dc”.
5). Under the heading “Sweep Range” fill in the “Start” and “Stop” values of the
voltage to be swept. In this simulation, the start value is 0, the stop value is 3.3.
6). Under the heading “Sweep Type”, which read “Automatic”, select the square button
and choose “Linear”.
7). Now fill in “step size”. [e.g, 0.01 (no letter “V”!) for steps of the voltage sweep}
8). Finally, select “OK”, the “Choosing Analysis” window will close.
3. Outputs
Under the “outputs”, click “Save All…”
4. Setup sweeping variable
Under manu item “Tools”, click “parametric analysis…”.
The “parametric analysis window” will appear.
Under “variable name”, type in “Vgate”, which is the name of the voltage source for
gate-source bias.
Under “range type”, fill in “From” and “To” items to be 1.2 and 3 respectively.
Under “Step Control”, “total steps” is 5 or other number.
In the same window, click “Analysis
Start”. The simulation will start.
5. Plot curves
After running the simulation, we will use “Calculator” to plot the curves.
Tools Calculator
1). To plot the current curves, select the label: DCIdc
2). Make sure you carefully select the middle of the red square of the drain node on your
schematic. Watch the Calculator window and it will show what you have selected.
Click “plot”.
Now see what you have achieved!
Assignment:
1. Design a CMOS inverter using reasonable sizes of NMOS and PMOS
transistors. (For example, PMOS W/L= 7.2u/0.6u, NMOS W/L=3.6u/0.6u)
2. Scan the input voltage from 0 to 3.3 v, plot the output vs. input voltage curve.
3. Find out the noise margin from the output curve.
Note, the Vdd= 3.3v, and the technology file is still the HP0.6 um.
Hand In:
Schematic and simulation curves.
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