ELEKTRONIKOS ĮTAISAI
1
2009
Elements
Isolation of
of elements
MOS ICs
MOS integrated circuits are based on insulated-gate field-effect transistors.
MOS devices and associated integrated circuits are fabricated in silicon using
similar processing techniques to those used for bipolar circuits, but, because of
the much simpler structure of the MOSFET, fewer processing stages are
required.
There are four types of FETs:
• transistors with n or p channel and
• transistors, containing built channel, and transistors with induced
channel.
Electrons are majority carriers in a n channel. Their mobility is higher. For this
reason properties of nMOSFETs are better.
The structure and processing of a MOSFET with induces channel is less
complicate.
MOSFETs with induced channels are the main elements of MOS ICs.
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
2
2009
Elements
Isolation of
of elements
MOS ICs
http://www.answers.com/topic/mosfet
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
3
2009
Elements
Isolation of
of elements
MOS ICs
http://www.answers.com/topic/mosfet
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
4
2009
Elements
Isolation of
of elements
MOS ICs
n-channel enhancement MOSFETs can be formed using p-type silicon
substrate by the sequence of such steps:
Step 1. Oxidation.
Step 2. Photolithography using a source and drain mask.
Step 3. Source and drain diffusion.
Step 4. Oxidation.
Step 5. Photolithography using a gate mask. Openings are made in
the oxide layer between source and drain regions.
Step 6. Oxidation. A thin oxide layer of 0.1 mm is grown to form
gate insulators.
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
5
2009
Elements
Isolation of
of elements
MOS ICs
Step 7. Photolithography opening windows for contacts to the
source and drain.
Step 8. Metallization of the entire slice usually by vacuum
evaporation of aluminium.
Step 9. Photolithography (selective etching of the metal layer)
leaving contacts and interconnections between circuit
components.
Step 10. Anneal forming ohmic contacts.
Step 11. Passivation.
Step 12. Photolithography exposing bonding pads.
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
6
2009
Elements of MOS ICs
MOS circuits have advantages compared with bipolar integrated circuits.
• The processing steps required for producing MOSFETs include 4 or 5
masking operations and one diffusion which can be compared with 12 - 14
masking stages and four diffusions typically necessary to fabricate a BJT.
This relative reduction in processing complexity means that MOS integrated
circuits can potentially be made with a better yield.
• MOS transistors are self-isolating and no area-consuming isolation
diffusions are required. Besides that, the MOSFET has a relatively small
size. It only occupies a chip area of 5 -10 percent of that required for a BJT.
This results in enhanced device packing density in MOS ICs.
• MOS transistors may be used as active load devices and a separate
process is therefore not required to form resistors. Passive capacitors can
be most conveniently fabricated using MOS technology, but they use
relatively large chip area. On the other hand, MOS transistors have
exceptionally high input impedance. This allows the gate electrodes to be
used as temporary capacitors for dynamic memory and other applications.
• Because of the high input impedance and small size of MOSFETs power
dissipation is greatly reduced.
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
7
2009
Elements
Isolation of
of elements
MOS ICs
MOS circuits tend to be slower than their bipolar counterparts due to their
inherently lower mutual conductance and to the fact that their speed is
extremely dependent on the load capacitance.
In the described MOS technology a certain amount of overlap of the gate
electrode and source and drain regions is necessary. However, such overlap
produces additional gate capacitance.
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
8
2009
Elements
Isolation of
of elements
MOS ICs
http://www.engr.sjsu.edu/jfreeman/BasicMOS_files/image016.gif
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
9
2009
Self-aligned
Isolation gate
of elements
technology
Several self-aligned gate technologies have evolved to overcome this difficulty.
Self-alignment can be realized using ion implantation.
The other modern technology is silicon gate technology. It solves two
problems: allows to form the structure with self-aligned gate and
reduced threshold voltage.
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
10
2009
Polysilicon
Isolationgate
of elements
technology
Polysilicon
Step 1. Oxidation.
Step 2. Photolithography.
Step 3. Oxidation.
Step 4. Deposition of a
polysilicon layer.
Step 5. Photolithography.
Step 6. Source and drain
diffusion.
Step 7. Oxidation.
Step 8. Photolithography
opening contact windows.
Step 9. Metallization.
Step 10. Photolithography
(selective etching of a
metal layer).
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
11
2009
Elements
Isolation of
of elements
MOS ICs
In order to increase operation speed short gates and materials with high
electron mobility and heterojunctions are used.
An SEM (scanning electron microscope) image of the upright-type
double-gate MOS transistor
http://www.aist.go.jp/aist_e/latest_research/2006/20060117/fig3.jpg
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
12
2009
Elements
Isolation of
of elements
MOS ICs
Self-alignment and self-formation principles are used to form nanostructures.
Prof. R.Navickas
VGTU EF ESK
Prof. S.Janusonis
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
13
2009
Isolation
CMOS
of elements
IC
Integrated logic gates using CMOS circuitry draw only extremely small
standing currents from supply in either logic state. They are therefore
most useful in portable, battery-powered systems and are also finding
increasing application in large-scale integrated-circuit systems.
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
14
2009
CMOS IC
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
15
2009
CMOS IC
http://www.answers.com/topic/integrated-circuit
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
16
2009
CMOS IC
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
17
2009
CMOS IC
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
18
2009
Formation ofIsolation
CMOS IC
ofusing
elements
SOS technology
VGTU EF ESK
stanislovas.staras@el.vgtu.lt
ELEKTRONIKOS ĮTAISAI
19
2009
Isolation
Properties
of elements
of ICs
Bipolar and MOS integrated circuits each have particular advantages.
Bipolar circuits are usually faster and can handle more power.
MOS circuits can be more economic because of their potential for higher
packing density and enhanced yield.
Mixed technologies in which bipolar and MOS components can be
incorporated on the same chip (Bi-MOS, BiCMOS technologies) have
been devised for specialized applications.
VGTU EF ESK
stanislovas.staras@el.vgtu.lt