4/1/2008
Lecture 17
OUTLINE
• NMOSFET in ON state (cont’d)
– Body effect
– Channel‐length modulation
– Velocity saturation
• NMOSFET in OFF state
• MOSFET models
• PMOSFET
• Reading: Finish Chap. 6
EE105 Spring 2008
Lecture 17, Slide 1
Prof. Wu, UC Berkeley
Body Effect Example
VTH = VTH 0 + γ
where γ =
(
2ϕB + VSB − 2ϕ B
2qN Aε Si
Cox
)
Example:
Typical values
γ ~ 0.5
ϕ B = 0.48V for N A = 1018 cm−3
(substrate doping)
A substrate bias of VSB = 1V
produce a VTH shift of 0.2V
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Lecture 17, Slide 2
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4/1/2008
Channel‐Length Modulation
• The pinch‐off point moves toward the source as VDS increases.
Æ The length of the inversion‐layer channel becomes shorter with increasing VDS.
Æ ID increases (slightly) with increasing VDS in the saturation region of operation.
I Dsat ∝
1
1 ⎛ ΔL ⎞
≅ ⎜1 +
⎟
L − ΔL L ⎝
L ⎠
ΔL ∝ (VDS − VDSsat )
1
W
2
μnCox (VGS − VTH ) ⎡⎣1 + λ (VDS − VD , sat ) ⎤⎦
2
L
λ: channel length modulation coefficient
1
W
2
* Note: in Razavi: I D , sat = μ nCox (VGS − VTH ) [1 + λVDS ]
2
L
I D , sat =
EE105 Spring 2008
Lecture 17, Slide 3
Prof. Wu, UC Berkeley
λ and L
• The effect of channel‐length modulation is less for a long‐
channel MOSFET than for a short‐channel MOSFET.
λ∝
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⇒ short channel MOSFET has larger λ
L
Lecture 17, Slide 4
Prof. Wu, UC Berkeley
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Velocity Saturation
• In state‐of‐the‐art MOSFETs, the channel is very short (<0.1μm); hence the lateral electric field is very high and carrier drift velocities can reach their saturation levels.
– The electric field magnitude at which the carrier velocity saturates is Esat.
v
Saturation
Velocity: vsat
E
Drift velocity: v = μ E
Slope = μ
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⎧8 ×106 cm/s for electrons in Si
vsat = ⎨
6
⎩ 6 × 10 cm/s for holes in Si
⎧⎪ NMOS: μ n ≈ 250 cm 2 /V-s ⇒ Esat ≈ 30, 000 V/cm
⎨
2
/V-ss ⇒ Esat ≈ 80
80, 000 V/cm
⎪⎩PMOS: μn ≈ 80 cm /V
For L = 0.1 μ m
⎧⎪VD , sat = 0.3 V for NMOS
⎨
⎪⎩VD , sat = 0.8 V for PMOS
Lecture 17, Slide 5
Prof. Wu, UC Berkeley
Impact of Velocity Saturation
• Recall that I D = WQinv ( y )v( y )
• If VDS > Esat×L, the carrier velocity will saturate and hence the drain current will saturate:
I D, sat = WQinvvsat = WCox (VGS − VTH )vsat
• ID,sat is proportional to VGS–VTH rather than (VGS – VTH)2
• ID,sat is not dependent on L
is not dependent on L
• ID,sat is dependent on W
EE105 Spring 2008
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Lecture 17, Slide 6
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Short‐Channel MOSFET ID‐VDS
P. Bai et al. (Intel Corp.),
Int’l Electron Devices Meeting, 2004.
• ID,sat is proportional to VGS‐VTH rather than (VGS‐VTH)2
• VD,sat is smaller than VGS‐VTH
• Channel‐length modulation is apparent (?)
EE105 Spring 2008
Lecture 17, Slide 7
Prof. Wu, UC Berkeley
Drain Induced Barrier Lowering (DIBL)
• In a short‐channel MOSFET, the source & drain regions each “support” a significant fraction of the total channel depletion charge Qdep×W×L
g
Æ VTH is lower than for a long‐channel MOSFET
DIBL
Injection
Barrier
Source
ShortChannel
LongChannel
-qVDS
Drain
Drain
• As
As the drain voltage increases, the reverse bias on the body‐drain PN the drain voltage increases the reverse bias on the body drain PN
junction increases, and hence the drain depletion region widens.
ÆVTH decreases with increasing drain bias.
(The barrier to carrier diffusion from the source into the channel is reduced.)
Æ ID increases with increasing drain bias.
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Lecture 17, Slide 8
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NMOSFET in OFF State
• We had previously assumed that there is no channel current when VGS < VTH. This is incorrect!
• As V
As VGS is reduced below V
is reduced below VTH (towards 0 V), the potential barrier to (towards 0 V) the potential barrier to
carrier diffusion from the source into the channel is increased. ID becomes limited by carrier diffusion into the channel, rather than by carrier drift through the channel.
(This is similar to the case of a PN junction diode!)
ÆID varies exponentially with the potential barrier height at the source which varies directly with the channel potential
source, which varies directly with the channel potential.
EE105 Spring 2008
Lecture 17, Slide 9
Prof. Wu, UC Berkeley
Sub‐Threshold Leakage Current
• Recall that, in the depletion (sub‐threshold) region of operation, the channel potential is capacitively coupled to the gate potential. c a ge gate o tage ( GS)) results in a change in channel esu ts a c a ge c a e
A change in gate voltage (ΔV
voltage (ΔVCS):
⎛ Cox
ΔVCS = ΔVGS × ⎜
⎜C +C
dep
⎝ ox
⎞
Cdep
>1
⎟⎟ ≡ ΔVGS / m ; m = 1 +
Cox
⎠
• Therefore, the sub‐threshold current (ID,subth) decreases exponentially with linearly decreasing VGS/m
ID
l (ID)
log
Sub-threshold swing:
−1
VTH
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VGS
VTH
VGS
Lecture 17, Slide 10
⎛ d (log10 I DS ) ⎞
S ≡⎜
⎟
dVGS
⎝
⎠
S = mVT ln(10) > 60mV/dec
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Short‐Channel MOSFET ID‐VGS
P. Bai et al. (Intel Corp.),
Int’l Electron Devices Meeting,
g, 2004.
EE105 Spring 2008
Lecture 17, Slide 11
Prof. Wu, UC Berkeley
VTH Design Trade‐Off
• Low VTH is desirable for high ON‐state current:
1 < η < 2
ID,sat ∝ (VDD ‐ VTH)η
• But high VTH is needed for low OFF‐state current:
log ID
Low VTH
ÆVTH cannot be
reduced aggressively
aggressively.
High VTH
IOFF,low VTH
IOFF,high VTH
0
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VGS
Lecture 17, Slide 12
Prof. Wu, UC Berkeley
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MOSFET Large‐Signal Models (VGS > VTH)
• Depending on the value of VDS, the MOSFET can be represented with different large‐signal models. VDS << 2(VGS-VTH)
RON =
1
W
μ nCox (VGS − VTH )
L
Triode Region
Saturation Region
VDS < VD,sat
VDS > VD,sat
I D,tri = μnCox
EE105 Spring 2008
V ⎤
W⎡
(VGS −VTH ) − DS ⎥VDS
L ⎢⎣
2⎦
1
W
2
ID,sat = μnCox (VGS −VTH) [1+λ(VDS −VD,sat)]
2
L
or
ID,sat = vsatWCox(VGS −VTH)[1+λ(VDS −VD,sat)]
Lecture 17, Slide 13
Prof. Wu, UC Berkeley
MOSFET Transconductance, gm
• Transconductance (gm) is a measure of how much the drain current changes when the gate voltage changes.
gm ≡
∂I D
∂VGS
• For amplifier applications, the MOSFET is usually operating in the saturation region.
– For a long‐channel MOSFET:
g m = μn Cox
{
}
W
2I D
(VGS − VTH ) 1 + λ (VDS − VD, sat ) =
L
VGS − VTH
– For a short‐channel MOSFET:
{
}
g m = vsatWCox 1 + λ (VDS − VD , sat ) =
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Lecture 17, Slide 14
ID
VGS − VTH
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MOSFET Small‐Signal Model (Saturation Region of Operation)
• The effect of channel‐length modulation or DIBL (which cause ID to increase linearly with VDS) is modeled by the transistor output resistance ro.
output resistance, r
ro ≡
EE105 Spring 2008
∂V DS
1
≈
λI D
∂I D
Lecture 17, Slide 15
Prof. Wu, UC Berkeley
Derivation of Small‐Signal Model (Long‐Channel MOSFET, Saturation Region)
1
W
2
I D = μnCox (VGS − VTH ) ⎡⎣1 + λ (VDS − VD,sat ) ⎤⎦
2
L
∂I
∂I
∂I
1
id = D vgs + D vbs + D vds ≡ gmvgs + gmbvbs + vds
∂VGS
∂VBS
∂VDS
ro
gmvgs
gmbvbs
id
vgs
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Lecture 17, Slide 16
Prof. Wu, UC Berkeley
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4/1/2008
PMOS Transistor
• A p‐channel MOSFET behaves similarly to an n‐channel MOSFET, except the polarities for ID and VGS are reversed.
Circuit symbol
S h
Schematic
ti cross-section
ti
• The small‐signal model for a PMOSFET is the same as that for an NMOSFET.
– The values of gm and ro will be different for a PMOSFET vs. an NMOSFET, since mobility & saturation velocity are different for holes vs. electrons. EE105 Spring 2008
Lecture 17, Slide 17
Prof. Wu, UC Berkeley
PMOS I‐V Equations
1
W
μ pCox
2
L
1
W
= μ p Cox
2
L
Long Channel:
I D ,tri =
2
⎡⎣ 2 (VSG − VTH ) VDS − VDS
⎤⎦
DS ↔ SD GS ↔ SG
2
⎡⎣ 2 ( VGS − VTH ) VDS − VDS
⎤⎦
1
W
2
μ p Cox (VSG − VTH ) ⎡⎣1 + λ (VSD − VSD , sat ) ⎤⎦
2
L
2
1
W
= μ p Cox ( VGS − VTH ) ⎡1 + λ VDS − VD , sat ⎤
⎣
⎦
2
L
Short Channel:
I D , sat =
(
I D , sat = vsatWCox (VSG − VTH ) ⎡⎣1 + λ (VSD − VSD , sat ) ⎤⎦
(
)
)
= vsatWCox ( VSG − VTH ) ⎡1 + λ VDS − VD , sat ⎤
⎣
⎦
Note: VGS < 0, VDS < 0,VD , sat < 0,VTH < 0 in PMOS
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Lecture 17, Slide 18
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4/1/2008
CMOS Technology
• It possible to form deep n‐type regions (“well”) within a p‐type substrate to allow PMOSFETs and NMOSFETs to be co‐fabricated on a single substrate. • This is referred to as CMOS (“Complementary MOS”) technology.
Schematic cross-section of CMOS devices
EE105 Spring 2008
Lecture 17, Slide 19
Prof. Wu, UC Berkeley
Comparison of BJT and MOSFET
• The BJT can achieve much higher gm than a MOSFET, for a given bias current, due to its exponential I‐V characteristic.
(Long-Channel)
(Short-Channel)
MOSFET
Linear
VGS > VDsat ; VDsat = Esat L
VGS < VDsat
EE105 Spring 2008
EE105 Fall 2007
Lecture 17, Slide 20
Prof. Wu, UC Berkeley
10