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VLSI DESIGN (numerical problems on MOSFET current and Threshold voltage) Ex 1: An NMOS transistor with device transconductance K = 20µA/V2 and threshold voltage of 1.5 V is operated at VGS = 5V and ID = 100 µA. Find VDS. Solution :- Let us assume that the MOSFET is operating in Saturation, ID sat = K/2 ( VGS – VTH )2 = 20/2 ( 5 – 1.5 )2 = 122.5 µA For device in saturation, the ID 122.5 µA but ID of device is Given as 100 µA which is less than ID sat hence the device is not In saturation but in linear region. ---------------------- ( 2 Marks ) ID linear = K/2 { 2 ( VGS – VTH ) VDS – VDS2 } 100 µA = 20/2 { 2 ( 5 – 1.5 ) VDS – VDS2 } 10 = 7VDS – VDS2 VDS2 – 7VDS + 10 = 0 ( VDS – 5 ) ( VDS – 2 ) = VDS = 5 or VDS = 2 For linear region, VDS < ( VGS – VTH ) i.e. VDS < ( 5 – 1.5 ) i.e. VDS < 3.5V Hence VDS = 2V ----------------------- ( 3 Marks ) 1 Ex 2:- Solution :- Calculate the zero-bias threshold voltage for an NMOS Silicongate transistor that has well doping = 5 × 10¹⁵ cm⁻³, gate doping = ND =10²⁰ cm⁻³ , gate- oxide thickness = 100 A⁰ , and 3 × 10¹⁰ / cm² singly charged positive ions at the oxide-Silicon interface. Also calculate the ion- implant doses needed to achieve a threshold voltage of -1 V. VT = ΦSG - 2 ΦF sub – QBO/COX – QOX/COX ---------( 1 Mark ) ΦF sub = -VT = -0.02 -------------------------------- ( 1 Mark ) = -0.331V ΦF GATE = VT = 0.02 = 0.589V ----------------------------------- ( 1 Mark ) ΦSG = ΦF sub - ΦF GATE = -0.331 – 0.589 = -0.92V εox = 3.97 x ε₀ = 3.97 x 8.854 × 10⁻¹⁴ F/cm = 3.515 × 10⁻¹3 F/cm ----------------------------- (1 Mark ) = 351.5 × 10-9 F/cm2 QBO = – = – 33.12 × 10-9 C/cm2 -- ( 1 Mark ) = –0.0942 V --------------------- ( 1 Mark ) 2 --------------------------------- ( 1 Mark ) VT = - 0.92 +0.662 +0.0942 – 0.01365 = - 0.17745 V ---( 1 Mark ) NI = = For -1 V , = 0.82255 V NI = 1.8 x 1012 Donor ions / cm2 -------------------(2 Mark ) ----------------------------------------------------------------------------------------------------- 3