Lecture 7 ANNOUNCEMENTS

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Lecture 7

• • ANNOUNCEMENTS MIDTERM #1 will be held in class on Thursday, October 11 MIDTERM #2 will be held in class on Tuesday, November 13 • OUTLINE BJT Amplifiers (cont’d) – Biasing – Amplifier topologies – Common-emitter topology Reading: Chapter 5.1.2-5.3.1

Lecture 7, Slide 1 Prof. Liu, UC Berkeley EE105 Fall 2007

Biasing of BJT

• Transistors must be biased because 1. They must operate in the active region, and 2. Their small-signal model parameters are set by the bias conditions.

EE105 Fall 2007 Lecture 7, Slide 2 Prof. Liu, UC Berkeley

DC Analysis vs. Small-Signal Analysis

• • Firstly, DC analysis is performed to determine the operating point and to obtain the small-signal model parameters.

Secondly, independent sources are set to zero and the small-signal model is used.

EE105 Fall 2007 Lecture 7, Slide 3 Prof. Liu, UC Berkeley

Simplified Notation

• Hereafter, the voltage source that supplies power to the circuit is replaced by a horizontal bar labeled V CC , and input signal is simplified as one node labeled v in. EE105 Fall 2007 Lecture 7, Slide 4 Prof. Liu, UC Berkeley

Example of Bad Biasing

• • The microphone is connected to the amplifier in an attempt to amplify the small output signal of the microphone. Unfortunately, there is no DC bias current running through the transistor to set the transconductance.

EE105 Fall 2007 Lecture 7, Slide 5 Prof. Liu, UC Berkeley

Another Example of Bad Biasing

• • The base of the amplifier is connected to V CC , trying to establish a DC bias. Unfortunately, the output signal produced by the microphone is shorted to the power supply.

EE105 Fall 2007 Lecture 7, Slide 6 Prof. Liu, UC Berkeley

Biasing with Base Resistor

• • Assuming a constant value for V BE , one can solve for both I B and I C and determine the terminal voltages of the transistor.

However, the bias point is sensitive to  variations.

EE105 Fall 2007 Lecture 7, Slide 7 Prof. Liu, UC Berkeley

Improved Biasing: Resistive Divider

• Using a resistive divider to set V BE , it is possible to produce an I C that is relatively insensitive to variations in  , if the base current is small.

EE105 Fall 2007 Lecture 7, Slide 8 Prof. Liu, UC Berkeley

Accounting for Base Current

• With a proper ratio of R 1 insensitive to to R 2 , I C can be relatively  . However, its exponential dependence on R 1 // R 2 makes it less useful.

EE105 Fall 2007 Lecture 7, Slide 9 Prof. Liu, UC Berkeley

Emitter Degeneration Biasing

• •

R

E helps to absorb the change in V X relatively constant.

so that V BE This bias technique is less sensitive to  stays (if I 1 >> I B ) and V BE variations.

EE105 Fall 2007 Lecture 7, Slide 10 Prof. Liu, UC Berkeley

Bias Circuit Design Procedure

1. Choose a value of I C to provide the desired small signal model parameters: g m , r  , etc.

2. Considering the variations in R 1 , R 2 , and V BE , choose a value for V RE.

3. With V RE chosen, and V BE calculated, V x determined.

can be 4. Select R 1 and R 2 to provide V x.

EE105 Fall 2007 Lecture 7, Slide 11 Prof. Liu, UC Berkeley

Self-Biasing Technique

• • This bias technique utilizes the collector voltage to provide the necessary V x and I B .

One important characteristic of this approach is that the collector has a higher potential than the base, thus guaranteeing active-mode operation of the BJT.

EE105 Fall 2007 Lecture 7, Slide 12 Prof. Liu, UC Berkeley

Self-Biasing Design Guidelines

(1)

R C

 ( 2) 

V BE R B

 

V CC

V BE

(1) provides insensitivity to  .

(2) provides insensitivity to variation in V BE .

EE105 Fall 2007 Lecture 7, Slide 13 Prof. Liu, UC Berkeley

Summary of Biasing Techniques

EE105 Fall 2007 Lecture 7, Slide 14 Prof. Liu, UC Berkeley

PNP BJT Biasing Techniques

• The same principles that apply to NPN BJT biasing also apply to PNP BJT biasing, with only voltage and current polarity modifications.

EE105 Fall 2007 Lecture 7, Slide 15 Prof. Liu, UC Berkeley

Possible BJT Amplifier Topologies

• • There are 3 possible ways to apply an input to an amplifier and 3 possible ways to sense its output.

In practice, only 3 out of the possible 6 input/output combinations are useful.

EE105 Fall 2007 Lecture 7, Slide 16 Prof. Liu, UC Berkeley

Common-Emitter (CE) Topology

EE105 Fall 2007 Lecture 7, Slide 17 Prof. Liu, UC Berkeley

Small Signal of CE Amplifier

EE105 Fall 2007

A v

v out v in

Lecture 7, Slide 18 Prof. Liu, UC Berkeley

Limitation on CE Voltage Gain

• • Since g m = I C /V T , the CE voltage gain can be written as a function of V RC , where V RC = V CC - V CE .

V

CE should be larger than V BE operating in active mode.

for the BJT to be

A v

I C R C V T

V RC V T

EE105 Fall 2007 Lecture 7, Slide 19 Prof. Liu, UC Berkeley

Voltage-Gain / Headroom Tradeoff

EE105 Fall 2007 Lecture 7, Slide 20 Prof. Liu, UC Berkeley

I/O Impedances of CE Stage

• When measuring output impedance, the input port has to be grounded so that v in = 0.

R in

v X i X

r

 EE105 Fall 2007 Lecture 7, Slide 21

R out

v X i X

R C

Prof. Liu, UC Berkeley

CE Stage Design Trade-offs

EE105 Fall 2007 Lecture 7, Slide 22 Prof. Liu, UC Berkeley

Inclusion of the Early Effect

• The Early effect results in reduced voltage gain of the CE amplifier. EE105 Fall 2007

A v R out

  

g m

(

R C R C

||

r O

||

r O

) Lecture 7, Slide 23 Prof. Liu, UC Berkeley

Intrinsic Gain

• • As R C goes to infinity, the voltage gain approaches its maximum possible value, g m × r O , which is referred to as the intrinsic gain. The intrinsic gain is independent of the bias current:

A v

 

g m r O A v

V A V T

EE105 Fall 2007 Lecture 7, Slide 24 Prof. Liu, UC Berkeley

Current Gain, A I

• • The current gain is defined as the ratio of current delivered to the load to current flowing into the input.

For a CE stage, it is equal to  .

A I A I

i out i in

 

CE

Lecture 7, Slide 25 EE105 Fall 2007 Prof. Liu, UC Berkeley

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