EVAL-AD7091R-2SDZ/AD7091R-4SDZ/
AD7091R-8SDZ User Guide
UG-633
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the AD7091R-2/AD7091R-4/AD7091R-8
12-Bit Monitor and Control System
FEATURES
EVALUATION BOARD DESCRIPTION
Full featured evaluation board for the AD7091R-2/
AD7091R-4/AD7091R-8 family
On-board power supplies
Standalone capability
System demonstration platform (SDP) compatible
(EVAL-SDP-CB1Z)
PC software for control and data analysis (download from
product page)
The EVAL-AD7091R-2SDZ, EVAL-AD7091R-4SDZ, and EVALAD7091R-8SDZ are full featured evaluation boards designed to
allow the user to easily evaluate all features of the AD7091R-2/
AD7091R-4/AD7091R-8 family of analog-to-digital converters
(ADCs). The evaluation board can be controlled via the SDP
connector (J13). The SDP board (EVAL-SDP-CB1Z) allows the
evaluation board to be controlled through the USB port of a PC
using the evaluation board software available for download from
the product page.
EVALUATION KIT CONTENTS
Evaluation board
Screw/nut kit
Mains power supply adapter
On-board components include: the AD8031 high speed precision
rail-to-rail op amp, the AD8032 high speed precision rail-to-rail
dual op amp, the ADP3303 high accuracy 200 mA low dropout
linear regulator, and the REF193 3.0 V precision micropower, low
dropout, low voltage reference.
ADDITIONAL EQUIPMENT NEEDED
EVAL-SDP-CB1Z (must be ordered separately)
includes a USB cable
Signal source
PC running Windows XP SP2, Windows Vista, or Windows 7
with USB 2.0 port
FUNCTIONAL BLOCK DIAGRAM
UNIPOLAR
OUT
VINx
MID AMP
MUX OUT
CONVST
CS
BIPOLAR
IN
ADCIN
MUX
BIAS UP
AD7091R-2/
AD7091R-4/
AD7091R-8
SDI
ADSP-BF527
DSP
SCLK
SDO
VDD
VDRIVE
AGND
VDD
A
LK3
LK11
A B
DC
JACK
ON-BOARD
POWER SUPPLY
VDRIVE 3.3V
SDP BOARD
VDRIVE DGND
Figure 1. EVAL-AD7091R-2SDZ, EVAL-AD7091R-4SDZ, and EVAL-AD7091R-8SDZ Block Diagram
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. A | Page 1 of 32
11902-001
B
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EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1
Evaluation Board Software ............................................................ 10
Evaluation Kit Contents ................................................................... 1
Software Installation .................................................................. 10
Additional Equipment Needed ....................................................... 1
Launching the Software ............................................................. 12
Evaluation Board Description......................................................... 1
Description of Main Window ................................................... 14
Functional Block Diagram .............................................................. 1
Waveform Capture ..................................................................... 15
Revision History ............................................................................... 2
AC Testing—Histogram ............................................................ 16
Quick Start Guide ............................................................................. 3
DC Testing—Histogram ............................................................ 16
Evaluation Board Hardware ............................................................ 4
AC Testing—FFT Capture ........................................................ 17
Device Description ....................................................................... 4
Summary Tab .............................................................................. 18
Hardware Link Options ............................................................... 4
Read Register Tab ....................................................................... 18
Power Supplies .............................................................................. 4
Saving Files .................................................................................. 19
Sockets/Connectors...................................................................... 8
Opening Files .............................................................................. 20
Test Points ...................................................................................... 8
Evaluation Board Schematics and Artwork ................................ 21
Basic Hardware Setup .................................................................. 9
REVISION HISTORY
6/14—Rev. 0 to Rev. A
Changes to Table 2 ............................................................................ 8
Changes to Figure 30 ...................................................................... 25
Changes to Figure 31 ...................................................................... 26
Changes to Figure 32 ...................................................................... 27
Changes to Figure 33 ...................................................................... 28
12/13—Revision 0: Initial Version
Rev. A | Page 2 of 32
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
UG-633
QUICK START GUIDE
Follow these steps to quickly evaluate the AD7091R-2/AD7091R-4/
AD7091R-8 ADCs:
2.
3.
Install the evaluation software from the AD7091R-2/
AD7091R-4/AD7091R-8 product page. Ensure that the
EVAL-SDP-CB1Z board is disconnected from the USB
port of the PC while installing the software. The PC may
need to be restarted after the installation.
Ensure that the various link options are configured as
outlined in Table 2.
Connect the EVAL-SDP-CB1Z board to the evaluation
board as shown in Figure 2. Screw the two boards together
using the enclosed nylon screw/nut set to ensure that the
boards connect firmly together.
5.
6.
7.
Connect the power supply adapter included in the kit to
Connecter J1 on the evaluation board.
Connect the EVAL-SDP-CB1Z board to the PC via the
USB cable. For Windows® XP, you may need to search for
the EVAL-SDP-CB1Z drivers. Choose to automatically
search for the drivers for the EVAL-SDP-CB1Z board if
prompted by the operating system.
Launch the evaluation software from the Analog Devices
subfolder in the Programs menu.
Connect an input signal via either the BIPOLAR IN/
UNIPOLAR OUT connectors, J10 and J14, or any of the
unipolar channel inputs, J5 to J8 and J16 to J19.
11902-002
1.
4.
Figure 2. Evaluation Board (Left) Connected to the SDP Board (Right)
Rev. A | Page 3 of 32
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EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
EVALUATION BOARD HARDWARE
DEVICE DESCRIPTION
diameter jack that connects to the evaluation board at J1. The
9 V supply is connected to the on-board 5 V linear regulator
that supplies the correct bias to each of the various sections on
the evaluation board and on the EVAL-SDP-CB1Z board.
This user guide describes the evaluation board for the
AD7091R-2/AD7091R-4/AD7091R-8 family of ADCs. All
models in this family are 12-bit, ultralow power, successive
approximation ADCs. These devices operate from a single
2.7 V to 5.25 V power supply and are capable of achieving
a throughput rate of 1 MSPS. These ADCs also feature an
on-chip conversion clock, an accurate reference, and a high
speed serial interface.
When using this evaluation board with the EVAL-SDP-CB1Z
board, it is necessary to power the board through the J1
connector.
If the evaluation board is used without the 9 V adapter, an
external power supply in the range of 2.7 V to 5.25 V must
be connected to the VDD input to supply the AD7091R-2/
AD7091R-4/AD7091R-8 VDD pin. In addition, an external supply
in the range of 1.65 V to 5.25 V must be connected to the VDRIVE
input to supply the VDRIVE pin.
The conversion process and data acquisition are controlled
using a CONVST signal and an internal oscillator. The
AD7091R-2/AD7091R-4/AD7091R-8 devices have a serial
interface allowing data to be read after the conversion, while
achieving a 1 MSPS throughput rate. This family of devices
uses advanced design and process techniques to achieve
ultralow power dissipation at high throughput rates. An
on-chip, accurate 2.5 V reference is available.
Each supply is decoupled on this board using 10 µF tantalum
and 100 nF multilayer ceramic capacitors.
Complete specifications for the AD7091R-2/AD7091R-4/
AD7091R-8 devices are provided in the device data sheet,
available from Analog Devices, Inc., which should be consulted
in conjunction with this user guide when using the evaluation
board. Full details on the EVAL-SDP-CB1Z are available online.
HARDWARE LINK OPTIONS
The functions of the link options are described in Table 2.
The default setup is configured to operate the board with
the mains power supply adapter and to interface to the
EVAL-SDP-CB1Z board.
There are two main ground planes, AGND and DGND. These
are connected at one location close to the ADC.
Caution
When the EVAL-AD7091R-2SDZ/EVAL-AD7091R-4SDZ/
EVAL-AD7091R-8SDZ is connected to the EVAL-SDP-CB1Z,
care must be taken to ensure that, if an external voltage is
supplied to the VDRIVE input connector, J4, the voltage does not
exceed 3.3 V. Otherwise, permanent damage may occur to the
EVAL-SDP-CB1Z board.
Table 1. External Power Supplies Required
POWER SUPPLIES
Care should be taken before applying power and signals to
the evaluation board to ensure that all link positions are set
according to the required operating mode. See Table 2 for the
complete list of link options.
Power
Supply
DC Jack
Voltage Range
9 V ± 5%
VDD
VDRIVE
2.7 V to 5.25 V
1.65 V to 5.25 V
This evaluation board is supplied with a wall-mountable
switching power supply that provides 9 V dc output. Connect
the supply to a 100 V to 240 V ac wall outlet at 50 Hz to 60 Hz.
The output from the supply is provided through a 2.0 mm inner
Rev. A | Page 4 of 32
3.3 V ± 5%
Purpose
Supplies power to on-board
power management devices
Analog supply rail
Digital supply rail without EVALSDP-CB1Z connected
Digital supply rail with EVALSDP-CB1Z connected
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
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Table 2. Link Options
Category
Power Supplies
Termination
Power Supplies
Termination
Link
LK1
Default
Position
A
LK2
A
LK3
A
LK4
Inserted
LK5
Inserted
LK6
Inserted
LK7
Inserted
LK8
B
LK9
A
LK10
Inserted
Function
This link is used to select the op amp positive supply source.
In Position A, the positive supply is generated from the 9 V dc jack plug.
In Position B, the positive supply is provided by the J3-3 connector.
This link is used to select the op amp negative supply source.
In Position A, the negative supply is generated from the 9 V dc jack plug.
In Position B, the negative supply is provided by the J3-1 connector.
This link is used to select the source of the VDRIVE supply for the AD7091R-2/AD7091R-4/AD7091R-8.
In Position A, the VDRIVE supply is sourced from the on-board 5 V regulator.
In Position B, the VDRIVE supply is sourced externally via the J4-1 connector.
Adds a 51 Ω termination resistor to AGND at VIN6.
Inserted—51 Ω termination on the VIN6 input.
Not inserted—no 51 Ω termination on the VIN6 input.
Adds a 51 Ω termination resistor to AGND at VIN4.
Inserted—51 Ω termination on the VIN4 input.
Not inserted—no 51 Ω termination on the VIN4 input.
Adds a 51 Ω termination resistor to AGND at VIN2.
Inserted—51 Ω termination on the VIN2 input.
Not inserted—no 51 Ω termination on the VIN2 input.
Adds a 51 Ω termination resistor to AGND at VIN0.
Inserted—51 Ω termination on the VIN0 input.
Not inserted—no 51 Ω termination on the VIN0 input.
This link is used to select the source of the VDRIVE supply for the AD7091R-2/AD7091R-4/AD7091R-8.
In Position A, the VDRIVE supply is sourced from the on-board 5 V regulator or J9-1.
In Position B, the VDRIVE supply is sourced from the on-board 3.3 V regulator.
This link is used to select the source of the VDD supply for the AD7091R-2/AD7091R-4/AD7091R-8.
In Position A, the VDD supply is sourced from the on-board 5 V regulator.
In Position B, the VDD supply is sourced externally via the J-1 connector.
Adds a 51 Ω termination resistor to AGND at BIPOLAR IN.
Inserted—51 Ω termination on the BIPOLAR IN input.
Not inserted—no 51 Ω termination on the BIPOLAR IN input.
Rev. A | Page 5 of 32
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EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
Default
Position
B
Category
Power Supplies
Link
LK11
Reference Input
LK12
Not
Inserted
Analog Input
LK13
A
LK14
A
LK15
Inserted
LK16
Inserted
LK17
Inserted
LK18
Inserted
Termination
Function
This link is used to select the source of the VDD supply for the AD7091R-2/AD7091R-4/AD7091R-8.
In Position A, the VDD supply is sourced from either the on-board 5 V regulator or J9-1.
In Position B, the VDD supply is sourced from the on-board 3.3 V regulator.
This link is used to select the source of the reference input for the AD7091R-2/AD7091R-4/AD7091R-8.
Inserted—reference voltage is generated by REF193.
Not inserted—reference either generated internally by AD7091R-2/AD7091R-4/AD7091R-8 or
provided by the J12 connector.
This link is used to select the connection option for the MUXOUT pin.
In Position A, the MUXOUT pin is connected to Pin 3 of U16.
In Position B, the MUXOUT pin is connected to Pin 3 of U15 (U15 is the default, Do Not Insert).
In Position C, the MUXOUT pin is connected directly to LK14.
This link is used to select the source of the ADCIN input for the AD7091R-2/AD7091R-4/AD7091R-8.
In Position A, the ADCIN pin is sourced from U16.
In Position B, the ADCIN pin is sourced from U15 (U15 is the default, Do Not Insert).
In Position C, the ADCIN pin is sourced directly from position C of LK13.
Adds a 51 Ω termination resistor to AGND at VIN7.
Inserted—51 Ω termination on the VIN7 input.
Not inserted—no 51 Ω termination on the VIN7 input.
Adds a 51 Ω termination resistor to AGND at VIN5.
Inserted—51 Ω termination on the VIN5 input.
Not inserted—no 51 Ω termination on the VIN5 input.
Adds a 51 Ω termination resistor to AGND at VIN3.
Inserted—51 Ω termination on the VIN3 input.
Not inserted—no 51 Ω termination on the VIN3 input.
Adds a 51 Ω termination resistor to AGND at VIN1.
Inserted—51 Ω termination on the VIN1 input.
Not inserted—no 51 Ω termination on the VIN1 input.
Rev. A | Page 6 of 32
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
Category
Analog Input
Link
SL1
Default
Position
A
SL2
A
SL3
A
SL4
A
SL5
A
SL6
A
SL7
A
SL8
A
SL9
A
SL10
A
SL11
A
SL12
A
SL13
A
SL14
A
SL15
A
SL16
A
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Function
This link is used in conjunction with SL2 to select the buffering option for the VIN0 input.
In Position A, the VIN0 input signal is buffered by U9-A.
In Position B, the VIN0 input signal bypasses the U9-A buffer.
This link is used in conjunction with SL1 to select the buffering option for the VIN0 input.
In Position A, the VIN0 input signal is buffered by U9-A.
In Position B, the VIN0 input signal bypasses the U9-A buffer.
This link is used in conjunction with SL4 to select the buffering option for the VIN1 input.
In Position A, the VIN1 input signal is buffered by U25-B.
In Position B, the VIN1 input signal bypasses the U25-B buffer.
This link is used in conjunction with SL3 to select the buffering option for the VIN1 input.
In Position A, the VIN1 input signal is buffered by U25-B.
In Position B, the VIN1 input signal bypasses the U25-B buffer.
This link is used in conjunction with SL6 to select the buffering option for the VIN2 input.
In Position A, the VIN2 input signal is buffered by U9-B.
In Position B, the VIN2 input signal bypasses the U9-B buffer.
This link is used in conjunction with SL5 to select the buffering option for the VIN2 input.
In Position A, the VIN2 input signal is buffered by U9-B.
In Position B, the VIN2 input signal bypasses the U9-B buffer.
This link is used in conjunction with SL8 to select the buffering option for the VIN3 input.
In Position A, the VIN3 input signal is buffered by U25-A.
In Position B, the VIN3 input signal bypasses the U25-A buffer.
This link is used in conjunction with SL7 to select the buffering option for the VIN3 input.
In Position A, the VIN3 input signal is buffered by U25-A.
In Position B, the VIN3 input signal bypasses the U25-A buffer.
This link is used in conjunction with SL10 to select the buffering option for the VIN7 input.
In Position A, the VIN7 input signal is buffered by U24-A.
In Position B, the VIN7 input signal bypasses the U24-A buffer.
This link is used in conjunction with SL9 to select the buffering option for the VIN7 input.
In Position A, the VIN7 input signal is buffered by U24-A.
In Position B, the VIN7 input signal bypasses the U24-A buffer.
This link is used in conjunction with SL12 to select the buffering option for the VIN6 input.
In Position A, the VIN6 input signal is buffered by U8-B.
In Position B, the VIN6 input signal bypasses the U8-B buffer.
This link is used in conjunction with SL11 to select the buffering option for the VIN6 input.
In Position A, the VIN6 input signal is buffered by U8-B.
In Position B, the VIN6 input signal bypasses the U8-B buffer.
This link is used in conjunction with SL14 to select the buffering option for the VIN5 input.
In Position A, the VIN5 input signal is buffered by U24-B.
In Position B, the VIN5 input signal bypasses the U24-B buffer.
This link is used in conjunction with SL13 to select the buffering option for the VIN5 input.
In Position A, the VIN5 input signal is buffered by U24-B.
In Position B, the VIN5 input signal bypasses the U24-B buffer.
This link is used in conjunction with SL16 to select the buffering option for the VIN4 input.
In Position A, the VIN4 input signal is buffered by U8-A.
In Position B, the VIN4 input signal bypasses the U8-A buffer.
This link is used in conjunction with SL15 to select the buffering option for the VIN4 input.
In Position A, the VIN4 input signal is buffered by U8-A.
In Position B, the VIN4 input signal bypasses the U8-A buffer.
Rev. A | Page 7 of 32
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Category
Digital Input
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
Link
SL17
Default
Position
A
SL18
B
SL19
A
SL20
A
Function
This link is not connected to the circuit because of the R124 Do Not Insert instruction.
Position A is the default position.
Do not use in Position B.
This link is not connected to the circuit because of the R125 Do Not Insert instruction.
Do not use in Position A.
Position B is the default position.
This link is used to determine the serial clock input to the AD7091R-2/AD7091R-4/AD7091R-8.
In Position A, the serial clock signal is produced by the U19 AND gate.
Do not use in Position B.
This link is used to determine the digital host pin that receives the ADC serial data output
In Position A, the serial data output is provided to the SPORT_DR0 pin of J13.
Do not use in Position B.
SOCKETS/CONNECTORS
TEST POINTS
The connectors and sockets on the EVAL-AD7091R-2SDZ/
EVAL-AD7091R-4SDZ/EVAL-AD7091R-8SDZ are outlined in
Table 3.
There are numerous test points on the EVAL-AD7091R-2SDZ/
EVAL-AD7091R-4SDZ/EVAL-AD7091R-8SDZ boards. These
test points provide easy access to the signals from the evaluation
board for probing, evaluation, and debugging.
Table 3. On-Board Connectors
Connector
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
J14
J15
J16
J17
J18
J19
Function
9 V, 2.0 mm dc jack connector
External PWR_IN and GND power connector
External OP_AMP_POS, OP_AMP_NEG, and GND
power connector
External VDRIVE and GND power connector
VIN6 analog input signal
VIN4 analog input signal
VIN2 analog input signal
VIN0 analog input signal
External VDD and GND power connector
BIPOLAR IN analog input signal to bias up circuit
MUXOUT signal from output of multiplexer
External reference voltage connector
120-way connector for EVAL-SDP-CB1Z interface
UNIPOLAR OUT analog signal from bias up circuit
ADCIN analog input signal
VIN7 analog input signal
VIN5 analog input signal
VIN3 analog input signal
VIN1 analog input signal
It is also possible to access the AD7091R-2/AD7091R-4/
AD7091R-8 devices via the test points to operate the evaluation
board in standalone mode without the need for the EVAL-SDPCB1Z board.
The default interface to this evaluation board is via the 120-way
connector, which connects the EVAL-AD7091R-2SDZ/
EVAL-AD7091R-4SDZ/EVAL-AD7091R-8SDZ to the EVALSDP-CB1Z board.
Rev. A | Page 8 of 32
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
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BASIC HARDWARE SETUP
The EVAL-AD7091R-2SDZ/ EVAL-AD7091R-4SDZ/EVALAD7091R-8SDZ connects to the EVAL-SDP-CB1Z system
demonstration platform board. The EVAL-SDP-CB1Z board is
the controller board, which is the communication link between
the PC and the main evaluation board.
Figure 2 shows a photograph of the connections between
the EVAL-AD7091R-2SDZ/ EVAL-AD7091R-4SDZ/EVALAD7091R-8SDZ daughter board and the EVAL-SDP-CB1Z
board.
The analog input range to the AD7091R-2/AD7091R-4/
AD7091R-8 devices is 0 V to VREF and should not be exceeded.
When using the on-chip reference, VREF is 2.5 V. An input signal
in the range of 2.5 V p-p should be connected to the evaluation
board via any analog input connector.
If an input signal is a bipolar input, it should be connected to
BIPOLAR IN, the J10 connector. This signal is biased to VREF/2
via the bias up circuitry on the EVAL-AD7091R-2SDZ/ EVALAD7091R-4SDZ/EVAL-AD7091R-8SDZ. The signal source
should be a low impedance source. The signal should then be
connected to any unipolar analog input by connecting
UNIPOLAR OUT, the J14 connector, to any connector (J5 to J8
or J16 to J19). On-board unity gain amplifiers buffer the signal
to the ADC. This is the default configuration on the evaluation
board.
A unipolar input signal should be directly connected to any
multiplexer input VIN0 to VIN7, the J5 to J8 and J16 to J19
connectors. On-board unity gain amplifiers buffer the signal to
the AD7091R-2/AD7091R-4/AD7091R-8.
Before connecting power, connect the EVAL-AD7091R-2SDZ/
EVAL-AD7091R-4SDZ/EVAL-AD7091R-8SDZ to Connector A
on the EVAL-SDP-CB1Z board. A nylon screw/nut set is
included in the evaluation kit and can be used to ensure that
the evaluation board and the EVAL-SDP-CB1Z boards are
connected firmly together.
Ensure that the link options are in the default positions as
outlined in Table 2.
After the evaluation board and the EVAL-SDP-CB1Z board are
connected securely, connect the power to the evaluation board.
The evaluation board requires an external power supply
adapter, which is included in the evaluation board kit. Connect
this power supply to Connector J1 on the evaluation board. For
further details on the required power supply connections and
options, see the Power Supplies section.
Before connecting the EVAL-SDP-CB1Z board to your PC,
ensure that the evaluation software has been installed. The full
software installation procedure is detailed in the Evaluation
Board Software section.
Finally, connect the EVAL-SDP-CB1Z board to the PC via
the USB cable enclosed in the EVAL-SDP-CB1Z kit. If using
a Windows XP platform, you may need to search for the
EVAL-SDP-CB1Z drivers. Choose to automatically search for
the drivers for the EVAL-SDP-CB1Z board if prompted by the
operating system.
Rev. A | Page 9 of 32
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EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
EVALUATION BOARD SOFTWARE
SOFTWARE INSTALLATION
1.
2.
3.
4.
5.
6.
Start the Windows operating system and download the
evaluation software from the relevant product page.
Unzip the downloaded file.
Double-click the setup.exe file to run the install. The
default location for the software is
C:\Program Files\Analog Devices\AD7091R-x\
Power up the evaluation board as described in the Power
Supplies section.
Connect the evaluation board and the EVAL-SDP-CB1Z
board to the USB port of the PC to ensure that the
evaluation system is correctly recognized when connected to
the PC.
When the software detects the evaluation board, proceed
through any dialog boxes that appear to finalize the
installation.
11902-004
The EVAL-AD7091R-2SDZ/ EVAL-AD7091R-4SDZ/EVALAD7091R-8SDZ kit includes software available for download
from the product page.
Figure 4. Evaluation Software Installation—Destination Directory
2.
Select the installation directory. Click Next.
There are two parts to the installation:
•
EVAL-AD7091R-2SDZ/ EVAL-AD7091R-4SDZ/EVALAD7091R-8SDZ evaluation software installation
EVAL-SDP-CB1Z system demonstration platform board
drivers installation
Figure 5. Evaluation Software Installation—Start Installation
3.
Click Next to install the software.
11902-003
Follow Step 1 to Step 4 (see Figure 3 to Figure 6) to install the
evaluation board software. Follow Step 5 to Step 8 (see Figure 7
to Figure 10) to install the EVAL-SDP-CB1Z drivers. Proceed
through all of the installation steps, allowing the software and
drivers to be placed in the appropriate locations. Connect the
EVAL-SDP-CB1Z board to the PC only after the software and
drivers have been installed.
11902-005
•
Figure 3. Evaluation Software Installation—User Account Control
Click Yes to begin the installation process.
11902-006
1.
Figure 6. Evaluation Software Installation—Installation Complete
4.
Rev. A | Page 10 of 32
The installation of the evaluation software completes. Click
Finish to proceed with the installation of the drivers.
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11902-007
11902-010
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
Figure 10. EVAL-SDP-CB1Z Drivers Installation—Complete
Figure 7. EVAL-SDP-CB1Z Drivers Installation—Setup Wizard
5.
8.
The setup wizard opens. Click Next to begin the driver
installation process.
Click Finish.
After the evaluation software installation is complete, connect
the EVAL-AD7091R-2SDZ/ EVAL-AD7091R-4SDZ/EVALAD7091R-8SDZ board to the EVAL-SDP-CB1Z board
as described in the Evaluation Board Hardware section.
11902-008
When you first plug in the EVAL-SDP-CB1Z board via the
USB cable provided, allow the Found Hardware Wizard to run.
After the drivers are installed, you can check that the board is
connected correctly by looking at the Device Manager of the
PC. The Device Manager can be found by right-clicking My
Computer>Manage>Device Manager from the list of System
Tools as shown in Figure 11.
The EVAL-SDP-CB1Z SDP-B board should appear under ADI
Development Tools. This completes the installation.
Figure 8. EVAL-SDP-CB1Z Drivers Installation—Choose Install Location
Select a destination folder for the SDP drivers, and click
Install.
11902-011
6.
11902-009
Figure 11. Device Manager
Figure 9. EVAL-SDP-CB1Z Drivers Installation—Windows Security
7.
Click Install to proceed with the installation.
Rev. A | Page 11 of 32
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EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
LAUNCHING THE SOFTWARE
After the evaluation board and EVAL-SDP-CB1Z board are
correctly connected to your PC, the evaluation software can be
launched.
From the Start menu, select Programs>Analog Devices>
AD7091R-x. The main window of the software then opens
(see Figure 13).
11902-012
If the evaluation board is not connected to the USB port
via the EVAL-SDP-CB1Z when the software is launched, a
connectivity error displays (see Figure 12). Connect the
evaluation board to the USB port of the PC, wait a few seconds,
click Rescan, and follow the instructions.
Figure 12. Connectivity Error Alert
Rev. A | Page 12 of 32
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
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1
5
6
7
12
2
3
4
9
11
11902-013
10
Figure 13. Evaluation Software Main Window
Rev. A | Page 13 of 32
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
Analysis Ch. Labeled 5, this selects which channel will be
analyzed and will thus have its parametric performance data
displayed in the plot analysis blocks.
DESCRIPTION OF MAIN WINDOW
The following tools allow user control of the different chart
displays. When the software is launched, the main software
window opens (see Figure 13).
The user software panel as shown in Figure 13 has the following
features:
•
•
•
•
•
Menu bar
Control buttons
Configuration display
Data capture display
Register read
Samples. Labeled 6, this selects the number of samples to be
completed in a single acquisition.
Single Capture. Initiates the sampling and readback of the
defined number of measurements. See Label 7 in Figure 13.
Continuous Capture. Performs a continuous capture from the
ADC. Click a second time to stop sampling. See Label 7 in
Figure 13.
Menu Bar
The menu bar, labeled 1 in Figure 13, consists of the File, Edit,
and Help menus.
Reference Settings. Indicates current reference setting (see
Section 9 in Figure 13). If External Reference is selected, the
user has the option to provide an off-board external reference.
If this option is selected, the supplied reference value must be
entered in Ref. Value.
Flash LED. Labeled 10 in Figure 13, this causes the orange
LED1A on the SDP board to flash, which can be a useful
debugging tool.
File Menu
Open. Loads previously captured data in comma separated
values (CSV) format for analysis.
Reset. Labeled 11 in Figure 13, this resets the ADC and places
the default configuration in the control register. Click a second
time to release reset state.
Save Analysis Data. Saves captured data in CSV format for
future analysis.
Save Picture. Saves captured data images as a JPEG file.
Configuration Buttons
Save Register Configuration. Saves current device
configuration for later use.
There are four configuration register buttons contained within
the block diagram on the Configure tab. Selecting these blue
buttons, , produce pop-up boxes that allow the user to
configure the respective section of the block diagram.
Exit. Exits the program.
Edit Menu
Reinitialize to default. Places the evaluation board in a known
default state.
Help Menu
Context Help. Turns on context sensitive help.
User Guide. Open the evaluation kit user guide.
About. Provides evaluation kit information.
Control Buttons, Drop-Down Boxes, and Indicators
The evaluation software includes the following control buttons,
drop-down boxes, and indicators.
Device Connected. Labeled 2 in Figure 13, this indicates which
model of the AD7091R-2/AD7091R-4/AD7091R-8 has been
detected.
Device Mode. Labeled 3, this indicates the operating mode
of the ADC. In Normal mode, the ADC is ready to acquire
samples. In Sleep mode, the device enters power-down mode
with sampling disabled.
The four buttons control the enabled channels (I/P MUX),
the source of the reference input (2.5V VREF), the CONTROL
LOGIC AND REGISTERS, and the Alert Register. Refer
to the AD7091R-2/AD7091R-4/AD7091R-8 data sheet for details
on available configuration options.
Note that the light emitting diode (LED), D3, can be used to
indicate an alert to the evaluation board user. Refer to the data
sheet for instructions on configuring the CONTROL LOGIC
AND REGISTERS so that a high state of the alert pin on the
ADC enables the LED, D3.
Data Capture Display
There are four tabs that display the conversion data in different
formats: Waveform, Histogram, FFT, and Summary. See Label
12 in Figure 13.
The tools shown in Figure 14 allow user control of the different
chart displays within the four tabs.
Throughput. Labeled 4 in Figure 13, this selects the sampling
rate of the data acquisition.
1
2
3
1. USED FOR CONTROLLING THE
CURSOR, IF PRESENT.
2. USED FOR ZOOMING IN AND OUT.
3. USED FOR PANNING.
Figure 14. Chart Tools
Rev. A | Page 14 of 32
11902-014
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EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
UG-633
WAVEFORM CAPTURE
All enabled channels can be shown in the waveform plot. It is
possible to remove any undesired channel(s) from the plot by
deselecting that channel within the Plot Legend (labeled 2). If
an alert is generated, the Alert indicator (labeled 3) on the
waveform panel illuminates.
Figure 15 illustrates the tab used for Waveform capture.
The waveform analysis reports the amplitudes recorded
from the captured signal as well as the frequency of the signal
tone. The analysis report is generated for the channel selected
via the Analysis Ch. drop-down menu (see Label 1 in
Figure 15).
1
3
11902-015
2
Figure 15. Waveform Capture Tab
Rev. A | Page 15 of 32
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EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
11902-016
1
Figure 16. Histogram Capture Tab
AC TESTING—HISTOGRAM
DC TESTING—HISTOGRAM
Figure 16 shows the Histogram capture tab. This tests the
ADC for the code distribution for the ac input and computes
the mean and standard deviation, or transition noise of the
converter, and displays the results.
The histogram is more commonly used for dc testing. Similar to
ac testing, this tests the ADC for the code distribution for the dc
input and computes the mean and standard deviation, or transition noise of the converter, and displays the results.
Raw data is captured and passed to the PC for statistical
computations. To perform a histogram test, select the
Histogram tab in the evaluation software main window and
click the Single Capture or Continuous Capture button
(labeled 1 in Figure 16).
Raw data is captured and passed to the PC for statistical
computations. To perform a histogram test, select the
Histogram tab in the evaluation software main window and
click the Single Capture or Continuous Capture button
(labeled 1 in Figure 16).
Note that an ac histogram requires a quality signal source
applied to the input BIPOLAR IN or VINx connectors.
Rev. A | Page 16 of 32
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
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1
11902-017
2
Figure 17. FFT Capture Tab
AC TESTING—FFT CAPTURE
Figure 17 shows the FFT capture tab. This tests the traditional
ac characteristics of the converter and displays a fast Fourier
transform (FFT) of the results. As in the histogram test, raw
data is captured and passed to the PC where the FFT is performed,
displaying SNR, SINAD, and THD.
To perform an ac test, apply either a bipolar sinusoidal signal
to the evaluation board at the BIPOLAR IN input, J10. Then,
connect the UNIPOLAR OUT connector, J14, to any input
multiplexer channel connector, J5 to J8 or J16 to J19, or apply
a unipolar sinusoidal signal directly to any of these channel
connectors. Low distortion, better than 115 dB, is required to
allow true evaluation of the part. One possibility is to filter the
input signal from the ac source. There is no suggested bandpass filter, but consideration should be taken in the choice.
Furthermore, if using a low frequency band-pass filter when the
full-scale input range is more than a few volts peak-to-peak, it
is recommended to use the on-board amplifiers to amplify the
signal, thus preventing the filter from distorting the input
signal.
Optional on-board anti-alias filtering can be implemented by
populating RC filters connected to the noninverting inputs of
channel buffers.
Figure 17 displays the spectral analysis results of the captured
data.
•
•
•
Rev. A | Page 17 of 32
The plot is the FFT image of the analysis channel selected.
The Spectrum Analysis panel displays the performance
data: SNR, THD, SINAD, dynamic range, and noise
performance along with the input signal characteristics.
See Label 1 in Figure 17.
Select View Harmonic Content to switch the panel to
display the frequency and amplitude of the fundamental
in addition to the 2nd to 5th harmonics. See Label 2 in
Figure 17.
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EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
1
11902-018
2
Figure 18. Summary Tab
SUMMARY TAB
Figure 18 shows the Summary tab. This tab captures and
displays all of the information in one panel with a synopsis of
the information, including key performance parameters, such
as SNR and THD, labeled 1 and 2, respectively.
READ REGISTER TAB
All indicators within the Read Register tab are automatically
updated when this tab is selected. In addition, this tab features a
Refresh Registers button (labeled 1 in Figure 19) that is useful
for monitoring the Alert Indication sub-tab while performing
data captures and viewing the Read Register panel.
The Read Register tab as shown in Figure 19 offers the
following sub-tabs:
•
•
•
•
•
Channel Register. Indicates the current enable/disable state
of all channels available on the AD7091R-2/AD7091R-4/
AD7091R-8.
Configuration Register. Indicates the configuration state of the
AD7091R-2/AD7091R-4/AD7091R-8.
Alert Indication. Indicates the current high and low alert status
of individual channels. This allows the user to service an alert
that has been triggered.
Alert Registers. Indicates the current high, low, and hysteresis
alert register values that are programmed into the AD7091R-2/
AD7091R-4/AD7091R-8 control registers.
All Registers. Displays all current register values contained
within the AD7091R-2/AD7091R-4/AD7091R-8.
Channel Register
Configuration Register
Alert Indication (labeled 2 in Figure 19)
Alert Register
All Registers
Rev. A | Page 18 of 32
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
UG-633
11902-019
1
11902-021
2
Figure 19. Read Register Tab
Figure 21. Save All Dialog Box
Saving Plot Images
SAVING FILES
The software can save the current captured data for future
analysis. The software has the ability to capture the current plot
images and the current device configuration, as well as the raw
waveform data, histogram data, and ac spectrum data.
To save plot images, go to the File menu, click Save Picture and
select the desired plot image to be saved.
The Waveform option saves the image from the waveform
panel.
Saving Data
The Histogram options save the image from the histogram
panel.
To save data, go to the File menu, click Save Analysis Data, and
select the desired data type to be saved.
The FFT option saves the image from the FFT panel.
•
•
The images are saved in JPEG format and do not contain any
raw data information. Saved plots cannot be loaded back into
the evaluation environment. To save images, the Save As dialog
box in Figure 22 opens. Save the images to an appropriate
location.
Saving Device Configurations
11902-022
•
The Waveform Data saves the raw data captured as seen in
the Waveform tab.
The Histogram Data generates a file that contains two
columns, one that contains the codes captured and the
other containing the number of time each code was
observed in the current capture.
The Spectrum Analysis saves all the information that
would be required for the user to recreate the spectral
analysis.
The Save All Analysis Data option produces a pop-up box
that allows the user to save all of the analysis types to a
specific folder location. For the individual saves, the save
dialog box in Figure 20 opens. Save to an appropriate
folder location. For the save all option, the dialog box in
Figure 21 opens.
Figure 22. Save Image Dialog Box
To save the current device configuration in XML format, go to
the File menu and click Save Register Configuration.
To save the current device configuration, the Save As dialog box
in Figure 23 opens. Save to an appropriate location.
11902-020
•
Figure 20. Save File Dialog Box
Rev. A | Page 19 of 32
11902-024
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
11902-023
UG-633
Figure 24. Open File Dialog Box
Figure 23. Save Register Configuration Dialog Box
OPENING FILES
Loading Device Configurations
Loading Captured Data
The software can load a previously utilized device
configuration.
The software can load previously captured data for analysis.
When Waveform Data is selected, the Open file dialog box
in Figure 24 opens for loading an appropriate file. The
evaluation software expects that a previously generated
waveform file is in .CSV format.
Go to the File menu, click Open, and select Register
Configuration. The software loads all previously used device
settings to the ADC and updates the evaluation platform
appropriately. When Register Configuration is selected, the
Open file dialog box in Figure 25 opens. Load an appropriate
.XML file.
11902-025
Go to the File menu, click Open, and select Waveform Data.
Only the previously captured waveform data can be opened, not
a histogram or spectral analysis file. The waveform data is a raw
data capture that rebuilds the histogram and ac spectrum
analyses upon being loaded into the evaluation platform.
Figure 25. Open Configuration Dialog Box
Rev. A | Page 20 of 32
Figure 26. Schematic Page 1
Rev. A | Page 21 of 32
PWR IN
1%
R13
2k4
V_IN
GREEN
LED1
C21
R19
18k
5%
R29
18k
5%
C27
DNP
C28
DNP
R26
18k
5%
5%
R27
68k
VSDP
R25
18k
5%
5%
R24
68k
OP_AMP_POS_+5V
DNP
C29
5%
R28
68k
ONBOARD_5V
DNP
1uF 5.5mR
5%
R17
68k
EXT_GND
EXT_VIN
C19
R14
470R
J2-2
J2-1
5.1V
BZT52
D2
J1-1
J1-2
5
4
3
2
OUT 3
OUT 2
OUT 1
PWRGD
10
VDD
Q2
MMBT3904LT1G
GND
1
ADM1185ARMZ
VIN4
VIN3
VIN2
VIN1
U4
E
C
6
7
8
9
R22
10k
5%
R23
10k
5%
R20
10k
5%
5%
AGND
1
2
3
R2
100K
Q3
2N7002
GREEN
LED2
POWER GOOD
1%
R18
2k4
V_IN
OP_AMP_SUPPLIES_ENABLE
ONBOARD_ENABLE
SDP_GND
Ground Star points. Place near to V_in jack plug J702
C2
10uF
V_IN
R21
10k
C1
10uF
Power up sequencer
B
R10
61R9
7V to 9V PWR IN
C11
10uF
J1-4
J1-3
Jack Plug
1uF
C12
V_IN
R3
100K
1uF
C39
V_IN
C13
10nF
ONBOARD_ENABLE
1uF
C31
V_IN
ONBOARD_ENABLE
C41
10nF
C34
10nF
5
8
U2
PG
ADJ
N/C
VOUT
GND EP GND
3 9 6
EN/UVLO
VIN
ADP7104ARDZ
8
OUT 1
IN1
7
OUT 2
IN2
5
ERROR
SD
NR
GND
4
U6
ADP3303ARZ-3.3
7
2
4
1
1
2
6
3
8
OUT 1
IN1
7
OUT 2
IN2
5
ERROR
SD
NR
GND
4
U5
ADP3303-5
1
2
6
3
DNI
10nF
C43
R115
R12
10k
R11
47k
0r
R15
330k
10nF
C16
1uF
C17
10nF
R0402
5%
R0402
5%
330k
C36
R114
+
C38
10uF
0r
R16
10nF
C40
+
U3
1
4
PG
7
SENSE 2
N/C
VOUT
GND EP GND
3 9 6
EN/UVLO
VIN
ADP7104ARDZ-5.0
SDP_GND
5
8
C42
10uF
ONBOARD_3.3V
10nF
C33
ONBOARD_5V
10nF
C23
1uF
C22
VSDP
11902-026
Screw Block
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
UG-633
EVALUATION BOARD SCHEMATICS AND ARTWORK
0r
R44
1uF
C44
GND J4-2
VDRIVE
J4-1
ONBOARD_5V
GNDJ9-2
VDDJ9-1
ONBOARD_5V
LK3
LK9
OP_AMP_NEG_-5V
OP_AMP_POS_+5V
V_IN
A
B
A
B
TP9
TP8
+
C50
10uF
10nF
C35
+
C37
10uF
ONBOARD_3.3V
10nF
C47
R43
100K
LK11
LK8
4
GND
U7
REF193
SLEEP
VIN
O/P
6
EXT_REF
1uF
C57
J12
LK12
REF
1
GND
VDRIVE
EMC_FILTER
1nF Filter 2A
3
OUT
IN
EMC_FILTER
1nF Filter 2A
1
3
OUT
IN
LC1
GND
LC2
VDD
MUX_OUT_AMP_NEG
MUX_OUT_AMP_POS
3
2
ONBOARD_3.3V
0r
R41
0r
R38
0r
R36
B
A
B
A
2
Rev. A | Page 22 of 32
2
Figure 27. Schematic Page 2
2.2uF
C60
MUX_OUT
J11
VDD
100K
R63
C
B
LK13
A
0.1uF
C63
VIN7
VIN6
VIN5
VIN4
VIN3
VIN2
VIN1
0r
R60
VIN0
TP1
R64
DNI
VDD
3
R120
DNI
-
-
V+
7
C75
C114
C110
R119
U16
C109
0r
C107
6
DNI
0.1uF
1uF
6
0r
1uF
0.1uF
0.1uF
1uF
GND
GND
GPO1
ADCIN
18
ADCIN
C71
DNI
R118
OP
AD8655
V4
+
U15
Do Not Insert
2
3
C77
C117
MUXOUT
SCLK
SDI
SDO
CONVST
CS
RESET
ALERT/BUSY/GPO0
7
V+
OP
AD8031
V4
+
MUX_OUT _AMP_NEG
2
3
7
U1
24
VDRIVE
AD7091R-8BRUZ
MUXOUT
REGCAP
X1
CLAMP-SOIC-TSSOP
REFIN/REFOUT
VIN7
VIN6
VIN5
VIN4
VIN3
VIN2
VIN1
VIN0
MUX_OUT _AMP_POS
R61
100K
1uF
C64
4
5
13
12
14
11
16
9
17
8
0.1uF
C65
MUX_OUT _AMP_POS
REGCAP
REFIN/OUT
1uF
C66
VDD
C86
4.7nF
19
6
15
10
22
20
21
23
1
2
0.1uF
C111
C
B
51r
GND
0r
R67
LK14
A
R90
1uF
C112
VDRIVE
VDRIVE
J15
ADC_IN
TP2
R52
DNI
GPO0
0r
R51
DNI
C76
B
E
C
D3
0r
R91
Q4
RED
R95
DNI
GPO1
0r
R96
ALERT-BUSY-GPO0
R35
2k2
V_IN
SCLK
SDI
SDO
CONVST
CS
RESET
B
GPO1
SCLK_SW
SDI_SW
DNI
C81
TP3
CONVST_SW
CS_SW
RESET_SW
E
C
D4
Q5
GREEN
R106
2k2
SDO_SW
11902-027
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EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
1uF 5.5mR
Figure 28. Schematic Page 3
Rev. A | Page 23 of 32
D1
SGND
5.1V
BZT52
61R9
470R
B
R9
R7
OP_AMP_SUPPLIES_ENABLE
C6
V_IN
AGND
R1
15pF
10nF
SGND
16K5
SGND
C4
C3
R5
Q1
MMBT3904 LT1G
24k9
E
C
1uF 10mR
C20
15uH
L2
49k9
R4
1uF
SGND
C10
1uF
C18
C5
Join at U6.4
8
SS
7
FREQ
6
VIN
5
SW
GND
4
U13
1
COMP
2
FB
3
EN
ADP1613 ARMZ
DRQ73-150-R
AGND
DRQ73-150-R
15uH
1
L4
2
1
2
4
3
4
3
AGND
1uF 10mR
R6
1uF 5.5mR
C30
BAT54
D5
1uF 10mR
C15
AGND
BAT54
D6
+5V
AGND
1uF 10mR
C32
-5V
AGND
1uF 10mR
C9
1
L3
2
L1
2
1.0uH 60mR
1
1R3
R8
1.0uH 60mR
C26
C24
AGND
4u7F 14mR
4u7F 14mR
C7
AGND
4u7F 14mR
C14
OP_AMP_POS
GND
OP_AMP_NEG
4u7F 14mR
C25
4u7F 14mR
C8
J3-3
J3-2
J3-1
4u7F 14mR
A
B
B
A
R30
LK1
LK2
TP11
TP10
OP_AMP_POS_+5V
OP_AMP_NEG_-5V
11902-028
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EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
UG-633
Vin2
J18
Vin3
J7
J19
Vin1
Vin0
LK17
LK6
LK18
LK7
R34
51r
R111
51r
R33
51r
R101
DNI
R47
DNI
R102
DNI
R48
DNI
C89
R97
2 -
3 +
0r
R42
OP_AMP_NEG_-5V
0r
R39
7
DNI
DNI
0r
SL7
SL5
SL3
SL2
TP5
R59
0r
VIN3
VIN2
VIN1
C46
C49
1uF
0.1uF
J16
J5
J17
J6
Vin7
Vin6
Vin5
Vin4
4
C98
C96
1uF
0.1uF
0.1uF
1uF
LK15
LK4
LK16
LK5
4
C45
C48
1uF
0.1uF
8 AD8032ARZ
0.1uF
U8-C V+
V-
C58
C55
1uF
8 AD8032ARZ
0.1uF
U25-C V+
V-
C80
C88
1uF
C59
C56
8 AD8032ARZ
4
DNI
C121
DNI
C102
DNI
C122
DNI
C103
VIN0
Input buffer power supply
R83
0r
0r
R84
0r
R58
U9-C V+
V-
TP4
AD8032ARZ
1
0r
AD8032ARZ
U25-A
C53
R53
6 -
5 +
DNI
0r
AD8032ARZ
7
0r
DNI
U9-B
C93
R98
6 -
5 +
1
AD8032ARZ
U25-B
C54
-
U9-A
R55
2
3 +
OP_AMP_POS_+5V
R110
51r
SL8
SL6
SL4
SL1
B
R32
51r
SL14
SL16
R31
51r
U24-C V+
V-
R108
51r
C87
C79
R99
DNI
R45
DNI
R100
DNI
R46
DNI
0.1uF
1uF
4
C97
C95
1uF
0.1uF
8 AD8032ARZ
SL10
SL12
R109
51r
A
B
A
B
A
B
A
B
A
B
A
B
B
A
A
VIN0
VIN1
VIN2
VIN3
B
A
B
A
C91
R93
2 -
3 +
7
DNI
DNI
0r
AD8032ARZ
1
0r
AD8032ARZ
U24-A
C51
R50
6 -
5 +
DNI
0r
AD8032ARZ
7
0r
DNI
U8-B
C92
R94
6 -
5 +
1
AD8032ARZ
U24-B
C52
-
U8-A
R54
2
3 +
SL9
SL11
SL13
SL15
B
A
B
R57
0r
0r
R81
R56
0r
R82
0r
B
A
A
VIN4
VIN5
VIN6
VIN7
B
A
B
A
Rev. A | Page 24 of 32
B
Figure 29. Schematic Page 4
A
J8
DNI
C119
DNI
C100
DNI
C120
DNI
C101
VIN7
VIN6
VIN5
VIN4
REF
0r
DNI
1
OP_AMP_NEG_-5V
OP_AMP_POS_+5V
U11-A
AD8032ARZ
3 +
2 -
C68
R117
R49
51r
7
0r
R40
0r
R37
1K5
R66
AD8032ARZ
U11-B
5 +
J10
LK10
6 -
BIPOLAR IN
TP7
+
1uF
C124
C99
C62
1uF
0.1uF
0.1uF
1uF
BIAS_UP_AMP_NEG
4
8 AD8032ARZ
C67
C104
C74
0.1uF
C78
6
BIAS_UP_AMP_NEG
0.1uF
V-4
AD8031
OP
V+7
-
U18
C106 BIAS_UP_AMP_POS
0.1uF
3
2
1K5
68pF
BIAS_UP_AMP_POS
U11-C V+
V-
TP6
1K5
R65
1K5
R116
1uF
C113
C116
R121
J14
11902-029
UG-633
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
UG-633
11902-030
Figure 30. Schematic Page 5
Rev. A | Page 25 of 32
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
11902-031
UG-633
Figure 31. EVAL-AD7091R-2SDZ/EVAL-AD7091R-4SDZ/EVAL-AD7091R-8SDZ Top-Side Silkscreen
Rev. A | Page 26 of 32
UG-633
11902-032
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
Figure 32. EVAL-AD7091R-2SDZ/EVAL-AD7091R-4SDZ/EVAL-AD7091R-8SDZ Top Layer
Rev. A | Page 27 of 32
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
11902-033
UG-633
Figure 33. EVAL-AD7091R-2SDZ/EVAL-AD7091R-4SDZ/EVAL-AD7091R-8SDZ Bottom-Side Silkscreen
Rev. A | Page 28 of 32
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
NOTES
Rev. A | Page 29 of 32
UG-633
UG-633
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
NOTES
Rev. A | Page 30 of 32
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
NOTES
Rev. A | Page 31 of 32
UG-633
UG-633
EVAL-AD7091R-2SDZ/AD7091R-4SDZ/AD7091R-8SDZ User Guide
NOTES
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set
forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have
read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”),
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non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and
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RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT
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UG11902-0-6/14(A)
Rev. A | Page 32 of 32