# EE315_II_V_301 ```King Saud University
Electrical Engineering Department
EE315: Analog and Digital Electronic Circuits
Second Mid Term Exam.: First Semester 1430-1431 H,
Name:
Time allowed:1&frac12; Hrs.
Number:
Question 1: Encircle the most correct answer.
1.
(10 pts.)
Biasing of IC MOS amplifiers utilizes -------------------- sources.
(a) constant current
(b) variable current
(c) current controlled
2.
For Basic MOSFET Constant Current Source, I0/IREF is equal to:
3.
(a) (W/L)2/(W/L)1
(b) (W/L)1/(W/L)2
An NMOSFET is in triode region, if :
(c) (W/L)2 + (W/L)1
(a) vDS &gt; vGS – Vt
(c) vGS &gt; vDS – Vt
(d) voltage controlled
(d) 1
(b) vDS &lt; vGS – Vt
(d) vGS &lt; vDS – Vt
4.
Two types of load devices are used in NMOS. One of them is ---------------- MOSFET with the drain
connected to the gate, and the other is -------------- MOSFET with the gate connected to the source.
(a) depletion, enhancement
(b) enhancement, depletion
(c) enhancement, enhancement
(d) depletion, depletion
5.
The availability; of both n- and p-channel transistors in --------------technology makes it more convenient to
(a) CMOS, NMOS, CMOS
(b) CMOS, NMOS, NMOS
(c) CMOS, CMOS, NMOS
(d) NMOS, CMOS, NMOS
6.
The inverting Op Amp configuration is an example of -------------------- feedback.
7.
(a) shunt - shunt
(b) shunt - series
(c) series - shunt
The output impedance of a feedback amplifier depends upon:
8.
(d) series - series
(a) the method of sampling only.
(c) the method of mixing only.
(b) the method of sampling as well as of mixing.
(d) none of them
The negative feedback in amplifiers:
(a) reduces nonlinear distortion.
(c) increases the effect of noise.
(b) increases nonlinear distortion.
(d) reduces the bandwidth.
9.
Negative feedback is applied to a trans-conductance amplifier. The input impedance will:
(a) increase
(b) decrease
(c) remain constant
(d) become zero
10. In a practical series-shunt feedback amplifier, the feedback network ------------------ an ideal voltagecontrolled -------------------- source.
(a) will not be, voltage
(b) will be, current
(c) will be, voltage
(d) has to be, current
1
Question 2:
1. The figure shows an incomplete circuit for a current
mirror. Draw the missing connection.
(10 pts.)
(1pt.)
2. In an NMOS amplifier with enhancement load, the
two transistors are perfectly matched and are of same
size. Calculate the large signal voltage gain. (1pt.)
3. An amplifier has output resistance of 100 Ohms.
Series-series feedback is applied to reduce the gain
by a factor of 100. What will be the new output
resistance?
(2pt.)
4. An amplifier has a bandwidth of 1 KHz. A feedback
is applied to reduce the gain by a factor of 100.
Calculate the bandwidth.
(2pts.)
5. The VTC of an NMOS amplifier with enhancement
load is shown below. Write the status of the
amplifying transistor in the three regions shown.
(2pts.)
6. For the circuit shown, write the name of the feed
back configuration. Also indicate whether it is a
voltage amplifier, current amplifier, trans-resistance
amplifier or trans-conductance amplifier?
(2pts.)
2
Question 3:
(10 pts.)
An OP-Amp having infinite input resistance, zero
output resistance and a voltage gain of 2 x 104, is
connected with a feedback arrangement as shown in
the figure. The closed loop voltage gain is 20. Find:
(i) an expression for the feedback factor, β.
(ii) the value of R2/R1 correct to two decimal places.
(iii) the value of feedback factor β.
(iv) the values of Vo, Vf and Vi, if Vs= 500 mV.
3
+
+
_
A
VO
_
VS
RL
R1
R2
Question 4:
(10 pts.)
An MOS differential pair using transistors with (W/L) ratio of 80, μnCox = 2 X 10-4 A/V2, VA = 20 V and
RD = 6KΩ is operating at a total bias current of 1mA. Calculate the values of:
(i) VOV = (VGS – Vt)
(ii) gm
(iii) r0 and
4