Constructing an Analog Digital Converter (ADC) to Measure Neutron Depolarization in Deuterium
Aung Kyaw Sint and Dr. Alexander Komives
Initial incentive of building ADC circuit:
In order to determine the  weak meson coupling constant, neutrons will need to maintain a significant amount of their polarization when captured by
the deuterium. Neutron capture in deuterium is not very efficient and the neutrons will bounce" around considerably before merging with a deuterium
nucleus. Each "bounce" provides a significant opportunity for neutron depolarization. If too many neutrons are depolarized, the experiment won't be
practical to perform. In order to measure the polarization, we need to construct a device that enables us to determine the polarization of gammas
which in turn will lead us to determine the polarization of neutrons. Part of the data acquisition system includes the ADC.
Theory behind it:
By targeting a polarized neutron to deuterium, it
produces a tritium nucleus, an isotope of
hydrogen with 2 neutrons and one proton, and
high energy gamma of 6.2 MeV. The photons from
the above reaction are detected by a scintillator,
which comes from the word scintillate meaning
emit quick flashes. We use CsI (Cesium Iodide
crystal) scintillator in our project. When high
energy photons reach the CsI crystal, lower
energy photons come out of the crystal in the form
of small flashes of light. The more flashes of light
means the larger the energy of the gamma.
Attached to the scintillator is a photomultiplier tube
(PMT) which captures the flashes of light coming
from the CsI and sends them to the multichannel
analyzer, MCA. The MCA graphs the input from
the PMT as a histogram. A complete summary is
shown in the diagram on right.
Pulse Height Analysis (PHA):
One of the main
functions of the
ADC circuit is
pulse height
analysis, also
known as PHA.
This is why we
choose the
Wilkinson ADC
circuit to build for
this project. The
basic idea of PHA
is that pulses with
a range of
amplitudes are
input to a peak
detector of ADC
circuit that
converts the
relative pulse
height to a
number. These
numbers are then
histogrammed.
Wilkinson Analog Digital Converter:
The height of the
amplitude is
proportional to
the energy of the
gamma, The
ADC digitizes the
input pulse
converting it into
a number. Since
it has a linear
relationship, the
higher the
energy, the
higher the peak,
and the higher
the number
produced by the
ADC.
The pulse of high energy gamma seen in oscilloscope
CsI scintillator with Amplifier and Multichannel Analyzer (MCA)
The complete name of the ADC is a Wilkinson ADC, or a single
slope integration ADC. We chose to build this particular type of
ADC as opposed to a successive or dual slope ADC, because
single slope ADC’s main function is pulse height analysis (PHA).
The functionality of a Wilkinson ADC can be simply explained by
three major processes: sample-and-hold, digitizing, and producing
counts of the channel. Each process is carried out by
corresponding circuit chips. Sampling-and-holding is performed by
switch and peak detector, digitizing is done by comparator, clock
and counter.
The switch controls the incoming pulses from the PMT allowing time
for the rest of the circuit to digitize the pulse. What we did not
achieve in building this summer is the one-shot timer which is
supposed to trigger the timing of open/close of the switch. From our
Wilkinson ADC figure, we need two one-shot timers namely G1 and
G2 referring to gate 1 and gate 2. We tried to build the following
behavior of circuit: incoming pulse will trigger the G1, then G1 will
close the switch allowing the pulse to go through the rest of the
circuit. G1’s allowance time for the pulse to pass is very short, 100
microseconds (10-6 s). After 100 microseconds, G2 will open the
switch blocking the other incoming pulses. G2 will control the
switch long enough that the digitizing process can take place for the
first pulse. We intend to set G2’s holding time for a few milliseconds
(10-3 s). After that, G1 will wait for another pulse to pass through
The ADC circuit on the breadboard with LEDs
the switch.
The AND gate is a logic gate with two inputs and one output. The main thing that the AND gate does is allow the counter to count the clock signals. One
of the two inputs of AND gate is a clock which produces a square wave with equal width between +5V (high) and ground (low).
The discharging voltage from the capacitor (C1 in figure on the left), which is charged by the PMT pulse, is fed to one of the inputs of the AND gate with
the other input being a clock. Since the clock is high and low alternately over equal amounts of time, the counter will count the clock pulses while the
capacitor is discharging.
Current source:
Peak Detector of Sample-and-hold process:
Another supporting circuit element in the ADC circuit is the current source. The current source helps the capacitor’s discharging
voltage to be constant over time. In order to see the important role of the current source in the ADC circuit, I collected the data and
plot the above graph with current source and without current source of the capacitor’s discharging time. As expected, with the
current source, we obtained the plots of linear data whereas the other plot without current source is non-linear data.
The main part of the sample-and-hold process is called peak detector. A combination of peak detector and switch is called
sample-and-hold. Peak detector is basically a dual op-amp and its job is to store (or hold) the highest peak from input
pulses in a capacitor and discharge it at a constant rate using the constant current source. The graph below shows us the
peak detector performs linearly when discharging the input voltage.
Counting of Discharging Time With and Without Current Source
Peak Detector Discharging Time vs. Input Voltage
90
80
80
70
R2 = 0.9914
R2 = 0.98
60
60
50
Discharging time (sec)
Discharging Elasped Time (sec)
70
40
30
20
10
50
40
30
20
0
0
2
4
6
8
10
10
12
Voltage Input (V)
0
with current source
w/o current source
Linear (with current source)
0
2
4
6
8
10
12
Voltage input (V)
Comparator (Digitizing the Analog signals)
Cascaded Counter:
Wilkinson Analog Digital Converter (ADC) circuit schematic diagram
A comparator is basically a dual op-amp. This is the key part
of transforming from input analog signals to output digital
signals. Comparator has one reference ground input (pin 3 in
the schematic form). As long as the other input (pin 2) is
higher than ground, there will be output. When the other input
equals ground, the comparator shown in the following diagram
stops producing output. Pin 3 is grounded together with pins 4
and 1. If input pin 2 is higher than pin 3, there will be output in
pin 7. Otherwise, there will not be any output. Output from
comparator will be one of the inputs of AND gate. The other
input is from the clock. As long as comparator produces a
signal, the counter will count the clock pulses. Thus, the
comparator digitizes the analog signal.
Schematic form of the comparator
Acknowledgments:
DePauw University, Faculty Development Committee, Physics and Astronomy Department, Dr. Komives
Help: Dr. Brooks and Andy Smith
Equipment: DePauw University Physics and Astronomy Department
Reference: Forrest Mims, III, Engineer’s handbook: A Handbook of Integrated Circuit Application, 1st Edition, Radio Shack, 1981.
Paul Horowitz and Winfield Hill, The Art of Electronics, 2nd edition, Cambridge University Press, 1994.
Manufacturer’s data sheets for each IC chips
4-bit Cascaded Counter schematic form
The counter I am building is a 4-bit cascaded binary
counter. I built two of those since we want to count
up to 256 (2^8). I connected the output of the
counter with LEDs (light emitting diodes) to see the
counting digitally. The schematic diagram on the left
explains the basic function of the chip and its
connection. Pins 7, 6, 2, and 3 of both chips are
connected with LEDs to display the digital counting.
Pin 5 of the first counter is input and pins 16 and 4
of both chips are connected to +5 V. Likewise, pins
8 and 14 of both chips are connected to ground.
Pin 12 from the first chip is cascaded to pin 5 of the
second chip. And the rest of the pins are connected
to ground.