MEMORY ORGANIZTION
& ADDRESSING
Presented by:
Bshara Choufany
Outline:
• Introduction
• Memory Allocation
• Memory Hierarchy
• Memory Addressing
1- Introduction:
Memory is divided into tiers:
- Main Memory
* Relatively expensive
* Relatively small capacity
* High-performance
- Second Storage
* Cheap
* Large Capacity
* Slow
- Memory can be organized in two ways
1. One process uses the entire space
2. Each process gets its own partition in
memory
* Dynamically allocated
* Statically allocated
Dynamic allocated memory is the allocation of
memory storage for use in a computer program
during the run time of that program
Static allocated memory refers to the process of
allocating memory at compile-time before the
associated program is executed
Dynamically allocated memory exists until it is
released wither explicitly by the programmer, exiting
a block, or by the garbage collector.
Static memory allocation has a fixed duration
Memory Allocation
Contiguous vs. Noncontiguous Memory Allocation
• Ways of organizing programs in memory
– Contiguous allocation
• Program must exist as a single block of contiguous
addresses
• Sometimes it is impossible to find a large enough
block
• Low overhead
– Noncontiguous allocation
• Program divided into chunks called segments
• Each segment can be placed in different part of
memory
• Easier to find “holes” in which a segment will fit
• Increased number of processes that can exist
simultaneously in memory offsets the overhead
incurred by this technique
Single-User Contiguous Memory Allocation
• One user had control of entire machine
– Resources did not need to be shared
– Originally no operating systems on computer
• Programmer wrote code to perform
resource management
– Input-Output Control Systems (IOCS)
• Libraries of prewritten code to manage I/O devices
• Precursor to operating systems
Single-user contiguous memory allocation
- Memory Hierarchy
Memory Hierarchy
Main memory
– Should store currently needed program instructions
and data only
• Secondary storage
– Stores data and programs that are not actively
needed
• Cache memory
– Extremely high speed
– Usually located on processor itself
– Most-commonly-used data copied to cache for faster
access
– Small amount of cache still effective for boosting
performance
Memory Hierarchy
- Classification System of Memory
Recall:
- Two major types of Memory:
* RAM (Read Access Memory)
i.
ii.
iii.
Perform
Read
Write
* ROM (Read-Only Memory)
i.
ii.
A Programmable logic device
Perform only the read operation
Registers associated with the memory system:
Both RAM and ROM can be characterized by two registers and a
number of control signals.
For Example: Consider a memory of 2ⁿ words, each having M
bits. Then,
the Memory Address Register (MAR) is an n-bit register used to
specify the memory address
The Memory Buffer Register (MBR) is an M-bit register used to
hold data to be written to the memory or just read from the
memory. This register is also called Memory Data Register
(MDR)
- Organization of Memory Units
 A basic memory unit provides the ability to store and access a
fixed number of bits.
 Each bit within such a unit may be selected individually for
reading and writing.
 Memory units are usually distributed as bit slices.
 If A chip can store 64K bits, each chip will be used to store one
bit each from 64K different locations, rather than a complete
byte from 8K different locations
Bit Slice Memory Organizition
- Memory as a linear Array
Consider a byte-addressable memory with N bytes of
memory.
Byte memory [N]; // Address ranges from 0 to (N-1)
Let’s say for example that these notes were written on
a computer with 384MB of memory.
384MB=384*2²⁰ bytes, since memory is byte
addressable, N= 384*1048576 = 402,653,184
Also note that:
384 MB = (256 + 128)*220 = 228 + 227
- Memory Addressing
 A memory address is an identifier for a memory location, at
which a computer program or a hardware device can store
data and later retrieve it.
 It’s a binary number from a finite monotonically sequence
that uniquely describes the memory itself.
 In modern byte-addressable computers, each address
identifies a single byte of storage
Samples of Memory Addressing
- Addressing Strategies
1- Coordinate-Addressed:
• Memory is accessed by supplying a number (address) which is
used directly to identify a particular physical storage location.
• Data is copied into or out the selected location.
Coordinate-Addressed are typically constructed as a collection of
individual units such as chips, each capable of storing a
limited number of bits.
2- Content-Addressed:
• Also called Associative.
• It is accessed by supplying
a data value for certain
portions (fields) of a
storage location, rather
than the physical address
of that location.
• The memory automatically
identifies any locations that
match the given data, and
the contents of these
locations may be accessed.
- Two registers are associated with the ContentAddressed Memory (CAM):
 MASK
 DATA
 Each register has the size of one full word
 Each word includes some comparison logic and one or more
TAG bits.
 Each set of tag bits forms a bit-slice register, with one bit for
each word of the memory
A Content-Addressable Memory
Includes a set of words, each
consisting of a number of bits.
Common for such a memory to
have very large word sizes, often
100 bits or more.
- Types of operations that may be possible on
associative memories:
READ & WRITE
SEARCH: Identify words that match a particular pattern
COUNT MATCHES: This operation indicates how many tag bits
are set.
MASKED WRITE: Write data from the data register into only the
bits selected by the mask register
MULTIWRITE: Write data into all tagged words at the same
time.
STORE: Write a data word into any empty location, rather than a
selected one.
ADDRESS OPERATIONS: Determine the coordinate address of a
tagged word, or read or write by address.
TAG OPERATIONS: Set, clear or read a tag register, or copy
among multiple tag registers.
Example of Search Register Setup
The above figure shows these two registers set to search
for all words that contain the pattern 1101 in bits 10
through 7, and 010 in bits 3 through 1.
- Two was to assign memory units to the address
space:
1 – BANK ADDRESSING:
 Uses the high-order bits of the address to select units
 Each unit represents a consecutive sequence of addresses
 Bank switching assigns different units to parts of memory
likely to be used for different purposes
2 - INTERLEAVING:
 uses the low-order bits of the address to select units.
 consecutive memory locations are assigned to different
memory units.
 When it is desired to read a consecutive sequence at high
speed, such as pipelined instruction fetching or block data
transfer to disk, the transfers can be effectively overlapped
since they will tend to come from independent units.
Figure 1- Bank Selection
Figure 2- Interleaving
- Memory Management Strategies
• Strategies divided into several categories
– Fetch strategies
• Demand or anticipatory
• Decides which piece of data to load next
– Placement strategies
• Decides where in main memory to place
incoming data
– Replacement strategies
• Decides which data to remove from main
memory to make more space
Course: CS 147 Computer Architecture
Instructor: Dr. Sin-Min Lee
Date: 03/19/09