Lecture 16
ANNOUNCEMENTS
• Wed. discussion section (Eudean Sun) moved to 2-3PM in 293 Cory
• HW#9 is posted online.
OUTLINE
• MOS capacitor (cont’d)
– Effect of channel-to-body bias
– Small-signal capacitance
– PMOS capacitor
• NMOSFET in ON state
– Derivation of I-V characteristics
– Regions of operation
Reading: Chapter 6.2.2
EE105 Fall 2007
Lecture 16, Slide 1
Prof. Liu, UC Berkeley
VGB = VTH (Threshold)
• VTH is defined to be the gate voltage at which the inversion-layer
carrier concentration is equal to the channel dopant concentration.
– For an NMOS device, n = NA at the surface (x=0) when VGB = VTH:
•
 (x )
n
 p


 
V
ln


V
ln
The semiconductor potential is T  
T
 ni 
 ni 


• The potential in the body (“bulk”) is  VT ln  N A   fB
 ni 
Xd
-tox
x
V (x )
• At VGB = VTH, the potential at the surface is
n
N 
VT ln    VT ln  A   fB
 ni 
 ni 
 The total potential dropped in the semiconductor is 2fB
 The depletion width is X d  2 Si 2fB 
qN A
-tox0
EE105 Fall 2007
Xd
x
VTH  VFB  2fB 
2q Si N A (2fB )
Cox
Lecture 16, Slide 2
Prof. Liu, UC Berkeley
Effect of Channel-to-Body Bias
• When a MOS device is biased in the inversion region of operation,
a PN junction exists between the channel and the body. Since the
inversion layer of a MOSFET is electrically connected to the
source, a voltage can be applied to the channel.
VG ≥ VTH
• If the source/channel of an NMOS device
is biased at a higher potential (VC) than
the body potential (VB), the channel-tobody PN junction is reverse biased.
 The potential drop across the depletion region is increased.
 The depletion width is increased: X d 
2 Si (2fB  VCB )
qN A
 The depletion charge density (Qdep= qNAXd) is increased.
 The inversion-layer charge density is decreased, i.e. VTH is increased.
EE105 Fall 2007
Lecture 16, Slide 3
Prof. Liu, UC Berkeley
Small-Signal Capacitance
• The MOS capacitor is a non-linear capacitor: Q  f (V )  CV
• If an incremental (small-signal) voltage dVG is applied in addition
to a bias voltage VG, the total charge on the gate is
df (V )
QG  f (VG  dVG )  f (VG ) 
 dVG  QGo  dQG
dV V VG
constant charge
• Thus, the incremental gate charge (dQG) resulting from the
incremental gate voltage (dVG) is
df (V )
dQG 
 dVG  CG dVG
dV V VG
dQG df (V )
• CG is the small-signal gate capacitance: CG 

dVG
dV V VG
EE105 Fall 2007
Lecture 16, Slide 4
Prof. Liu, UC Berkeley
(N)MOS C-V Curve
• The MOS C-V curve is obtained by
taking the slope of the Q-V curve.
 CG = Cox in the accumulation and
inversion regions of operation.
 CG is smaller, and is a non-linear
function of VGB in the depletion
region of operation.
EE105 Fall 2007
Lecture 16, Slide 5
Prof. Liu, UC Berkeley
MOS Small-Signal Capacitance Model
Cox 
 ox
Depletion
Accumulation
tox
Inversion
Cox
Cox
Cox
Cdep
C dep 
 Si
Xd
The incremental
charge is located at
the semiconductor
surface
The incremental
charge is located at
the bottom edge of
the depletion region
Cmin 
CoxCdep,min
Cox  Cdep,min
where Cdep,min 
EE105 Fall 2007
Lecture 16, Slide 6
The incremental
charge is located at
the semiconductor
surface
 Si
X d ,max
Prof. Liu, UC Berkeley
MOS Capacitive Voltage Divider
• In the depletion (sub-threshold) region of operation, an
incremental change in the gate voltage (DVGB) results in an
incremental change in the channel potential (DVCB) that is
smaller than DVGB:
VG
Cox
VC
Cdep
DQG 
CoxCdep
Cox  Cdep
 DVCB 
DVGB  Cdep DVCB
Cox
DVGB
Cox  Cdep
VB
• How can we maximize DVCB/DVGB ?
EE105 Fall 2007
Lecture 16, Slide 7
Prof. Liu, UC Berkeley
PMOS Capacitor
• The PMOS structure can also be considered as a parallel-plate
capacitor, but with the top plate being the negative plate, the
gate insulator being the dielectric, and the n-type semiconductor
substrate being the positive plate.
– The positive charges in the semiconductor (for VGB < VFB) are comprised of
holes and/or donor ions.
Inversion
VGB < VTH
Depletion
VTH <VGB < VFB
 (x )
x
-tox
Xd,max
x
Xd
-tox
x
0
0
VTH  VFB  2fB 
EE105 Fall 2007
 (x )
 (x )
-tox
0
Accumulation
VGB > VFB
2q Si N D ( 2fB )
Cox
Lecture 16, Slide 8
 ND 

 ni 
fB  VT ln 
Prof. Liu, UC Berkeley
PMOS Q-V , C-V
X d ,max 
2 Si ( 2fB )
depletion
inversion
accumulation
QG
qN D
Qdep,max  2qN D Si ( 2fB )
VTH
VGB V 
 Qdep,max
 Qinv  Cox VGB  VTH 
VFB
CG
VTH
EE105 Fall 2007
Lecture 16, Slide 9
VFB
VGB V 
Prof. Liu, UC Berkeley
MOSFET in ON State (VGS > VTH)
• The channel charge density is equal to the gate capacitance
times the gate voltage in excess of the threshold voltage.
Areal inversion
charge density [C/cm2]:
Qinv  Cox (VGS  VTH )
• Note that the reference voltage is the source voltage.
In this case, VTH is defined as the value of VGS at which the channel
surface is strongly inverted (i.e. n = NA at x=0, for an NMOSFET).
EE105 Fall 2007
Lecture 16, Slide 10
Prof. Liu, UC Berkeley
MOSFET as Voltage-Controlled Resistor
• For small VDS, the MOSFET
can be viewed as a resistor,
with the channel resistance
depending on the gate
voltage.
RON
L
1
L
 resistivit y 


tinv  W q n ninv tinv  W
• Note that qninv  tinv  Qinv  Cox VGS  VTH 
RON 
EE105 Fall 2007
1
 nCox
W
VGS  VTH 
L
Lecture 16, Slide 11
Prof. Liu, UC Berkeley
MOSFET Channel Potential Variation
• If the drain is biased at a higher potential than the source, the
channel potential increases from the source to the drain.
The potential difference between the gate and channel
decreases from the source to drain.
EE105 Fall 2007
Lecture 16, Slide 12
Prof. Liu, UC Berkeley
Charge Density along the Channel
• The channel potential varies with position along the channel:
Qinv ( y)  Cox VGS  VTH  VC ( y)
• The current flowing in the channel is I D  WQinv ( y)  v( y)
dVC ( y )
• The carrier drift velocity at position y is v( y )   n E   n
dy
where n is the electron field-effect mobility
EE105 Fall 2007
Lecture 16, Slide 13
Prof. Liu, UC Berkeley
Drain Current, ID (for VDS<VGS-VTH)
dVC ( y)
I D  WQinv ( y)  v( y)  WQinv ( y)  n
dy
Integrating from source to drain:

L
0
VD
I D L  W n 
VS
I D dy   W nQinv (VC )dVC
VS
1 2

Cox VGS  VTH  VC dVC  W nCox VGS  VTH VDS  VDS 
2 

W
I D   nCox
L
EE105 Fall 2007
VD
VDS 

(VGS  VTH )  2 VDS


Lecture 16, Slide 14
Prof. Liu, UC Berkeley
ID-VDS Characteristic
• For a fixed value of VGS, ID is a parabolic function of VDS.
• ID reaches a maximum value at VDS = VGS- VTH.
I D   nCox
EE105 Fall 2007
Lecture 16, Slide 15
W
L
VDS 

(
V

V
)

VDS
 GS TH

2 

Prof. Liu, UC Berkeley
Inversion-Layer Pinch-Off (VDS>VGS-VTH)
• When VDS = VGS-VTH, Qinv = 0 at the drain end of the channel.
 The channel is “pinched-off”.
• As VDS increases above VGS-VTH, the pinch-off point (where
Qinv = 0) moves toward the source.
– Note that the channel potential VC is always equal to VGS-VTH at the
pinch-off point.
 The maximum voltage that can be applied
across the inversion-layer channel (from
source to drain) is VGS-VTH.
 The drain current “saturates” at a
maximum value.
EE105 Fall 2007
Lecture 16, Slide 16
Prof. Liu, UC Berkeley
Current Flow in Pinch-Off Region
• Under the influence of the
lateral electric field, carriers
drift from the source
(through the inversion-layer
channel) toward the drain.
• A large lateral electric field
exists in the pinch-off region:
V  VGS  VTH 
E  DS
L  L1
• Once carriers reach the
pinch-off point, they are
swept into the drain by the
electric field.
EE105 Fall 2007
Lecture 16, Slide 17
Prof. Liu, UC Berkeley
Drain Current Saturation
(Long-Channel MOSFET)
• For VDS > VGS-VTH: I D  I D , sat
1
W
2
  nCox VGS  VTH 
2
L
VD , sat  VGS  VTH
EE105 Fall 2007
Lecture 16, Slide 18
Prof. Liu, UC Berkeley
MOSFET Regions of Operation
• When the potential
difference between
the gate and drain is
greater than VTH, the
MOSFET is operating
in the triode region.
EE105 Fall 2007
• When the potential
difference between the
gate and drain is equal
to or less than VTH, the
MOSFET is operating in
the saturation region.
Lecture 16, Slide 19
Prof. Liu, UC Berkeley
Triode or Saturation?
• In DC circuit analysis, when the MOSFET region of operation is
not known, an intelligent guess should be made; then the
resulting answer should be checked against the assumption.
Example: Given nCox = 100 A/V2, VTH = 0.4V.
If VG increases by 10mV, what is the change in VD?
EE105 Fall 2007
Lecture 16, Slide 20
Prof. Liu, UC Berkeley