Computer Networks: Switching and Queuing Ivan Marsic Rutgers University Chapter 4 – Switching and Queuing Delay Models Switching and Queuing Delay Models Chapter 4 Topic: Packet Switching in Routers Router Architecture Forwarding Table Lookup Switching Fabric Design How Queuing Happens Why Routers? • (Recall Chapter 1) • Avoid needing direct link between all hosts (totally connected graph) • Redundancy: If one path fails, find an alternative path Routing Delays Source Destination Source Router Destination transmission time propagation time Time router delay detail (a) transmission time (2nd link) router processing time (b) Router Components Input port Output port Input port Output port Network layer protocol Network port (bidirectional) Link layer protocol Link layer protocol Switching fabric How Router Forwards Packets 2 3 Network Layer Link & Physical Layers 4 Services offered to incoming packets: 1 1 Receiving and storing packets 2 Forwarding decision for packets 3 Moving packets from input to output port 4 Transmission of packets Services to Incoming Packets 1 Receiving and storing packets Forwarding decision for packets 2 3 Moving packets from input to output port 4 Transmission of packets Distribution of Protocol Layers L1 L1 L1 Network Key: L3 = End-to-End Layer L2 = Network Layer L1 = Link Layer L2 L1 L1 Router B Router A End system L1 L3 L2 L1 2 L3 L1 L L1 L2 L1 L1 1 L2 L L1 L1 Router C Note that router has a single (common) Network Layer protocol, but each connection has a dedicate Link Layer protocol End system Forwarding Algorithms Routing function Forwarding algorithm Unicast routing Unicast routing with Types of Service Multicast routing Longest prefix match on destination address Longest prefix match on destination address + exact match on Differentiated Services field of IPv4 header Longest match on source address + exact match on source address, destination address, and incoming interface Router Architectures CPU packets CPU Memory NFE Processor Memory NFE Processor Line Card #1 Line Card #4 Line Card #1 CPU Memory CPU Memory Line Card #4 Line Card #2 Line Card #5 Line Card #2 CPU Memory CPU Memory Line Card #5 Line Card #3 Line Card #6 Line Card #3 CPU Memory CPU Memory Line Card #6 (a) (b) First generation router Second generation router CPU Memory packets Line Card #1 Fwd Engine Fwd Engine Line Card #4 Line Card #2 Fwd Engine Fwd Engine Line Card #5 Line Card #3 Fwd Engine Fwd Engine Line Card #6 (c) Third generation router Switching via Memory / via Bus Input port CPU Forwarding & Routing processor Memory Network layer Output port First generation router Link layer Line card Line card packets System bus Input port Output port NFE processor NFE processor Routing processor CPU Memory Network layer packets Link layer Line card Line card Second generation router System bus Crossbar Switch Fabric Input N x N switching elements allows N simultaneous packets switched (in the best case when all packets going to different outputs) Output Goal: Reduce # Switching Elements • System bus (in 1st and 2nd generation arch’s) allows only one packet switched at a time • Crossbar allows up to N packets switched at a time • Something in the middle? (+cheaper!) Banyan Switch Fabric 1 Packet with tag 1 Input port tag 0 1 Input port tag Output port tag 0 1 (b) (a) 8x8 Banyan has only 12 switching elements (while 8x8 crossbar requires 64) But, much greater likelihood of collisions… Input port tag Output port tag 00 00 01 01 10 10 11 11 Output port tag 000 000 001 001 010 010 011 011 100 100 101 101 110 110 111 111 Packet with tag 100 100 (c) Packet with tag 001 001 Reducing Collisions • (Show slide with a collision example) • Collisions can be reduced if packets are ordered on input ports by their output port number • The router cannot choose the ordering of arriving packets, but we can insert a sorting hardware between the input network ports and the switching fabric … Batcher Network Comparator Input numbers Output numbers 7 5 5 Low 3 3 High 5 (b) (a) Input list 9 3 L 4 H 5 4 4 1 7 4 L H L 3 5 2 4 6 2 3 3 4 5 2 6 5 1 3 7 2 5 6 6 1 7 7 7 5 7 1 4 5 9 H Output list 9 3 4 4 3 3 L H 2 4 (c) 3 H 5 6 5 L 7 7 9 Batcher-Banyan Network Batcher sort network Trap network Shuffle exchange network Banyan network Why Batcher-Banyan Network Packets with tags 1, 0, 0, 2 1 0 0 2 Empty input Batcher sorter 0 1 0 0 1 0 2 0 0 0 1 1 2 Trap network Banyan network 0 0 1 1 2 2 This figure is meant to illustrate why a concentrator is needed, because otherwise the gap in the input sequence will cause collision in the Banyan, but the example does not work for a 4x4 network -- need an 8x8 network example!!!! 2 3 Topic: Router Delays & Queuing Models Where & Why Queuing Happens Little’s Law Queuing Models M / M / 1, M / M / 1/ m, M / G / 1 Networks of Queues Delay Components in Forwarding Time First bit received Reception delay = Input port Fwd decision queuing delay t xI Last bit received Forwarding decision delay = tf Fabric traversal queuing delay Switch fabric traversal delay = ts Switch fabric Transmission queuing delay First bit transmitted Output port Transmission delay = t xO Last bit transmitted Road Intersection Analogy Head of Line Blocking Car experiencing head-of-line blocking Where & Why Queuing Happens • At input ports, Head Of Line queuing • At output ports, if output link is “too narrow” (low data rate) for incoming traffic • Inside switch fabric, if collision occurred An Input-queued Switch Input ports Switch fabric Arbiter Output ports General Service Model Server System Arriving customers in Departing customers Interarrival time = A2 A1 out Input sequence C1 C2 Ci Time A1 Output sequence C3 A2 A3 C1 Service time = X1 Ai C2 X2 Waiting time = W 3 C3 X3 Ci Xi Simple Queuing Model System Queue Arriving packets Queued packets Server Serviced packet Source Source Arrival rate = packets per second Service rate = packets per second Departing packets Delay Time Total delay of customer i = Waiting + Service time Ti = W i + Xi Server Service rate Arrival rate customers unit of time customers unit of time NQ Customers in queue Customer in service N Customers in system Why Queuing Happens? C3 Time 11 :00 C2 10 :41 10 :00 Time 11 :00 Server C1 10 :29 C3 10 :00 10 :0 10 5 :0 10 9 :13 C1 C2 Departure times sequence 10 :17 Arrival times sequence Arrival Sequences Sequence 1 (arrivals) (departures) Sequence 2 t (s) 0 1 2 3 t (s) Server Server 4 0 1 Service delay 2 3 4 Queuing delay Sequence 3 Sequence 4 t (s) 0 1 2 3 4 t (s) 0 1 2 3 4 Cumulative Number of arrivals, A(t) Number of departures, B(t) Birth and Death Processes A(t) T2 N(t) B(t) T1 Time N(t) Time Little’s Law • Average number of packets in the system = arrival rate average time that packet spends in the system • N=T • Problem – We would like to know more, such as what are the probabilities of finding different number of customers on arrival, etc. Intuition for the Balance Principle Room 0 Room n – 1 Room n Room n + 1 t(n+1 n) t(n n+1) t(n n+1) t(n+1 n) 1 See: Global Balance Equations Transition Probability Diagram 1 1 1 0 1 1 2 1 1 n n1 n1 M/G/1 Example A2 = 9:30 A4 = 10:10 A1 = 9:05 (a) A3 = 9:55 A6 = 11:05 A5 = 10:45 X1 = 30 X2 = 10 X3 = 75 X4 = 15 X5 = 20 X6 = 25 1 2 3 4 5 6 9:00 9:05 9:35 9:45 9:55 11:10 Customer 5 service time = 15 min Customer 6 arrives at 11:05 (c) Residual service time r() (b) 11:25 11:45 Time Customer 4 service time = 20 min Server Customers 4 and 5 waiting in queue Service time for customer 3 X3 = 75 min 75 Customer 6 arrives at 11:05 Time 5 9:55 11:10 Ni = 2 Customer 3 in service; Residual time = 5 min Residual service time r() Expected Residual Time X1 Time X1 X2 XM(t) t