TLA5000B Series Logic Analyzer Fact Sheet Breakthrough solutions for real-time digital systems analysis The power you need, the simplicity you want, a price you can afford Features Benefits MagniVu™ acquisition Avoid missing events completely in either timing or state acquisition mode with higher sampling resolution (up to 20 ps) on all channels Flagging the glitch Remove the need to manually search all channels using exclusive ability to show both the time and channel where the glitch occurred TS/TH violation triggering Eliminate the time consuming and complex task of monitoring the circuit’s outputs with real-time violation triggering that automatically acquires intermittent setup and hold violations Automated measurements Easily summarize your design’s performance with sophisticated measurements such as: frequency, period, pulse width, duty cycle, and edge count Drag & drop triggers Quickly isolate events through simple and intuitive trigger setup. Triggers include: Channel Edge, Channel Value, Bus Value, Multi-Group Value, Glitch, Setup and Hold Violation, or Trigger on Anything iView™ display Gain complete system visibility with time-correlated, integrated analog and digital data on one display Combine debug power with simplicity and affordability Featuring: 125 ps-resolution MagniVu™ acquisition simultaneous with timing or state acquisition to find elusive timing problems quickly, without double probing Glitch and TS/TH violation triggering and display to find elusive hardware problems 500 ps (2 GHz)/32 Mb timing record length to capture intermittent events over a wide time window 235 MHz state acquisition provides analysis of highspeed synchronous digital circuits Automated drag-and-drop measurements ensure faster setup and analysis for common tasks Drag-and-drop triggers simplify the task of isolating problems and data of interest iView™ time-correlated digital-analog view to clearly see how analog anomalies affect your digital signals TLA5000B Series Logic Analyzer Fact Sheet Key specifications and ordering information Models Channels State Clock Rate (per module) Record Length (Qtr/Half/Full CH) 8/4/2 Mb to 128/64/32 Mb Timing (Qtr/Half/Full CH) Timing (MagniVu™ acquisition) 500 ps / 1 ns / 2 ns 125 ps TLA5201B 34 235 MHz TLA5202B 68 235 MHz 8/4/2 Mb to 128/64/32 Mb 500 ps / 1 ns / 2 ns 125 ps TLA5203B 102 235 MHz 8/4/2 Mb to 128/64/32 Mb 500 ps / 1 ns / 2 ns 125 ps TLA5204B 136 235 MHz 8/4/2 Mb to 128/64/32 Mb 500 ps / 1 ns / 2 ns 125 ps Key Options Opt. 1C Add iView™ external oscilloscope interface kit Opt. 8S Increase to 8 Mb base record length per channel Opt. 9S Increase to 32 Mb base record length per channel Opt. R5 5 year repair service plan Recommended Probes and Accessories Key Applications PG3ACAB FPGA Easily measure signals inside Altera or Xilinx FPGA designs and select which group of internal signals to probe without having to recompile Serial data Identify TS/TH violations quickly with drag-and-drop triggering Signal integrity Find elusive glitches and events with MagniVu™ acquisition’s high speed timing resolution of up to 20 ps Digital pattern generator in a separate chassis A wide variety of probes are recommended, including: P6410 17-channel general-purpose probe with singleended data/clock with separable podlets and accessories P6419 17-channel high-density compression probe, with single-ended data/clock and accessories P6434 34-channel high-density Mictor probe with single-ended data/clock and accessories P6450 34-channel high-density D-Max® probing technology probe with single-ended data/clock and accessories © 2011 Tektronix 2/11 JS/WOW Benefits 58W-20026-2