Design of an FPGA-Based SPWM Digital Control IC for AC Induction Motor Drives Ming-Fa Tsai Fu-Ching Ke Yu-Hsien Chung Tsung-Hua Yang Huan-Wen Chen Ju-Chi Ni Department of Electrical Engineering, Minghsin University of Science and Technology 指導教授:龔應時 研究生:曾琮峻 學號:MA320107 Outline Abstract Introduction AC induction motor D-Q model construction The architecture and Design of the SPWM digital control IC The Co-simulation environment of Simulink、 ModelSim and PSIM Hardware implementation and experimental results Conclusion Abstract This paper presents the design of an FPGA-based SPWM digital control IC, which is intended for controlling the rotational speed of a three-phase ac induction motor via a three-phase inverter. The architecture of the control IC consists of four major parts: a triangular wave to produce a counter, a three-phase sine-wave look-up table to produce a reference command, a comparator, and a switch dead-time generator. All the four parts have been designed by using VHDL language. The D-Q model of an AC induction motor has also been constructed for verification of the designed SPWM digital control IC in the Simulink, ModelSim, and PSIM cosimulation environment. The designed control IC circuit has been implemented on an Altera Flex 10K FPGA logic device. Simulation and experimental results are shown to verify the viability of the proposed control IC properly. Introduction In recent years, due to the development of microelectronics technology, use of digital CMOS process technology system, FPGA and CPLD programmable logic elements have appeared. Because of the short design cycle, high-density and programmable, users have attracted widespread attention . Purpose of this paper, using FPGA components, design a SPWM driving control IC. to control an AC induction motor, such that at different frequencies of the command to obtain different speed response. AC induction motor D-Q model construction A three-phase AC squirrel cage induction motor, the stator and rotor voltage equations. Stator and rotor flux equations. The (5) - (8) into (1) - (4) can be The 𝑖𝑑𝑠 , 𝑖𝑞𝑠 , 𝑖𝑑𝑟 , 𝑖𝑞𝑟 is the AC induction motor dynamic equation of the four variables, to mix (9) - (12), can be. Torque equation Mechanical dynamic equation Three-phase Voltage of motor with stationary reference frame Voltage relation of three-phase input and the center of the motor V𝑎𝑛 + V𝑏𝑛 + V𝑐𝑛 = 0 , into (17)-(18) can be Let (20) into (17)-(19) can be Three-phase current of motor with stationary reference frame Dynamic model block diagram of an AC induction motor In Matlab / Simulink simulation Frequency of 10Hz (a) the three-phase voltage command waveform (b) waveform diagram of the speed response (c) waveform diagram of the current response The architecture and Design of the SPWM digital control IC The three-phase sine wave command with a triangular counter comparison, generate a pulse width modulated signal, then generator with an optocoupler isolation circuit via a deadlock time, triggering power crystals ON, OFF Digital SPWM control IC block diagram The simulation results The simulation results The Co-simulation environment of Simulink、ModelSim and PSIM Figure 13, Analog frequency at 10Hz (a) The three-phase voltage command (b) the Speed response (c) the current response Figure 13, Analog frequency at 20Hz (a) The three-phase voltage command (b) the Speed response (c) the current response analog frequency in (a) 10Hz (b) 20Hz, the output signal waveform diagram of SPWM Hardware implementation and experimental results Download it to the Altera Flex 10K100ARC240-1 of execution element FPGA, control the speed of an AC induction motor, the power transistors used for MOSFET-STMicroelectronics GROUP IRFP450 (voltage 500V, resistance to flow 14A) PWM control trigger signal (a) 10 Hz (b) 20Hz Experimental waveforms SPWM control IC drive current in response to (a) 10Hz (b) 20Hz Experimental waveforms (1A / 100mV) Conclusion The FPGA-based digital SPWM AC induction motor control IC‘s designed to drive AC induction motor, In the digital control circuit part of its internal architecture consists of a triangular wave generator counter, a three-phase sinusoidal command produces check value table, the three-phase sinusoidal command after comparison with the triangular wave generated trigger signal via a three-phase PWM comparator, Reuse a deadlock SPWM switch conduction time controller delay 1 s ~ 6 s six power switch control signal. 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