SNS COLLEGE OF ENGINEERING
Kurumbapalayam(Po), Coimbatore – 641 107
Accredited by NAAC-UGC with ‘A’ Grade
Approved by AICTE & Affiliated to Anna University, Chennai
INTERNAL ASSESMENT EXAMINATIONS - II
COURSE: B.E – ECE
EC6504 – MICROPROCESSOR & MICROCONTROLLER
Class: V Sem ECE ‘A,B&C’
September 2015
Duration: 2 Hours
Marks
Date: 14th
Maximum: 50
Answer ALL questions
1. What is bus stealing? Why bus request is required?
Taking the control of bus for a bus cycle is called bus stealinh. Bus request is for DMA
operation.
2. What is multiprogramming?
Multiprogramming is defined as the execution of more than one programming at a time.
There are 3 states: Steady , Blocked, Running.
3. Compare Memory mapped I/O and I/O mapped I/O.
I/O Mapped I/O
IO Mapped IO
* In Memory mapped I/O , the I/O devices
• Data transfer b/w register and IO.
are treated as Memory loaction Instructions are used.
• Special Instructions are used like
IN, OUT.
• Memory control signals are used.
• Arithmetic and logic operations can be
• Arithmetic and logic operations
performed on data
can not be performed on data.
• Special control signals
• Data transfer b/w
are used.
accumulator and IO
4.Give the format of CWR of 8255.
5. Identify various modes and application of 8254 IC.
There are 6 mode
Mode 0 : Interrupt on terminal count
Mode 1 : Programmable one shot
Mode 2 : Rate generator
Mode 3 : Sq. wave generator
Mode 4 : Hardware trigger strobe
Mode 5 : Software trigger strobe
6. List some of the features of 8259.
It is used to extend the hardware vectored priority interrupt.
Cascading is possible. Extend upto 64 I/O devices.
7. Differentiate 2 key lockout mode and N key rollover mode?
In 2-key lockout mode if two keys are pressed at the same time it will display the key
entry which is released first. Other keys are omitted.
In N-key rollover method it will display all the keys pressed at the same order.
Part – B
8.
(a)
(i)
Classify Closely coupled and loosely coupled
Closely coupled architecture block diagram & explanation (2)
Loosely coupled –diagram (2)
Bus arbitration method – Polling, Independent request, Daisy chaining (2)
6
(b)
(ii)
Write short notes on Advanced Processor.
6
(i)
OR
Describe in detail about serial communication (USART).
Block Diagram (3)
12
Duplex, Half Duplex & Full Duplex
(3)
Asynchronous mode & synchromous mode
9.
(a)
(b)
(i)
(i)
How A/D and D/A interfacing is done with 8086.
Fundamental steps & types of conversion (4)
D/A :Weighted resistor mode, R-2R mode, Dual Slope Mode
A/D : Successive approximation methods
( Interfacing Diagram ) (4)
OR
Explain in details about Parallel communication interface.
Block Diagram (3)
out all the ports available.
Port 1, port2 , Port -3 ( Group A & Group – B) (4)
BSR Mode & I/O Mode
I/o Mode : Mode 0, Mode 1 & Mode 2 (3)
he control Word Register (2)
12
12
(a)
(i)
10.
(ii)
(b)
(i)
Summarize the various operating modes of 8253/8254 timer/counter & explain its
operation.
Block diagram & pin diagram (5)
Modes of operation with neat output diagram (5)
Mode 0 : Interrupt on terminal count
Mode 1 : Programmable one shot
Mode 2 : Rate generator
Mode 3 : Sq. wave generator
Mode 4 : Hardware trigger strobe
Mode 5 : Software trigger strobe
Applications (2)
Define DMA. List the signals and modes of operation.
Block diagram of DMA (4)
Fundamentals : Bus stealing, Function of HOLD POin & HLDA pin (4)
Modes of operation (4)
Normal mode & Burst mode
OR
Illustrate the operation of 8259 controller.
Block Diagram (4)
Features of PIC IC (1)
in the block diagram (4)
IMR, IMS & Priority Resolver, ICW & OCW
Modes of Operation (3)
Fully nested mode
Specially fully nested mode
Poll mode
Automatic end of interrupt
Cascade Mode
Specific mode
8
4
12