ELEC 7770
Advanced VLSI Design
Spring 2007
Introduction
Vishwani D. Agrawal
James J. Danaher Professor
ECE Department, Auburn University
Auburn, AL 36849
vagrawal@eng.auburn.edu
http://www.eng.auburn.edu/~vagrawal/COURSE/E7770_Spr07
Spring 07, Jan 16
ELEC 7770: Advanced VLSI Design (Agrawal)
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Related Course: VLSI Design
 ELEC 5770/6770: Review of MOS transistor
fundamentals, CMOS logic circuits; VLSI
fabrication and design rules; clocking strategies
and sequential design; performance estimation;
memories and programmable arrays; standard
cell design methodologies; computer aided
design (CAD) tools.
Spring 07, Jan 16
ELEC 7770: Advanced VLSI Design (Agrawal)
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Related Course: Computer-Aided
Design of Digital Circuits
 ELEC 5250/6250: Hardware components of
multiprocessor systems including processor,
interconnection, memory, and control
architectures; Software elements of parallel
processing including inter-processor
communication, task partitioning, task mapping
and scheduling, load balancing, programming
languages, and parallel algorithms.
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ELEC 7770: Advanced VLSI Design (Agrawal)
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Related Course: Low-Power Design of
Electronic Circuits
 ELEC 5270/6270: Design of digital circuits and
systems for reduced power consumption, power
analysis algorithms, low-power MOS
technologies, low-power design architectures for
FPGA, memory and microprocessor, reduction
of power in testing of circuits.
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ELEC 7770: Advanced VLSI Design (Agrawal)
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Related Course: VLSI Testing
 ELEC 7250: Introduction to VLSI testing, test
process and automatic test equipment, test
economics and product quality, fault modeling,
logic and fault simulation, testability measures,
combinational and sequential circuit test
generation, memory test, analog test, delay test,
IDDQ test, design for testability, built-in self-test,
boundary scan, analog test bus, system test and
core test.
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ELEC 7770: Advanced VLSI Design (Agrawal)
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Related Course: Digital System Design
 ELEC 4200: Hierarchical, modular design of
digital systems; computer-aided digital system
modeling, simulation, analysis, and synthesis;
design implementation with programmable logic
devices and field programmable gate arrays.
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This Course: Advanced VLSI Design
 ELEC 7770: Review of CMOS logic circuits;
impact of fabrication issues on design; high
speed switching circuits; high performance
memory structures; advanced clocking
strategies and clock distribution; performance
optimization; deep submicron design issues;
ASIC design flow: logic synthesis, placement
and routing; design verification; low power
design.
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Course Objectives and Evaluation
 Objectives:
 Learn and participate in the process of modern VLSI
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design, verification, and test of a chip.
Develop an understanding for the advanced design
concepts in modern VLSI technologies.
 Evaluation:
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Project participation
Homeworks
Class tests
Final exam
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Course Outline
 Nanotechnology: Present and future advances.
 Design Team Project
 Advanced Topics
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Design for testability for system on chip (SOC)
Low-power design
Signal integrity
Process variation
Verification
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Reference Books
 J. M. Rabaey, A. Chandrakasan, and B. Nikolić,
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Digital Integrated Circuits, A Design Perspective,
Second Edition, Prentice-Hall, 2003.
M. J. S. Smith, Application-Specific Integrated
Circuits, Addison-Wesley, 1997.
N. H. E. Weste and D. Harris, CMOS VLSI
Design, A Circuits and Systems Perspective,
Third Edition, Addison-Wesley, 2005.
W. Wolf, Modern VLSI Design, System-on-Chip
Design, Third Edition, Prentice-Hall, 2002.
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Design Team Project
 Product definition and specification
 Project plan: Task definitions and measurable
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goals.
Team selection and task assignments
Schedule
Execution
Report
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VLSI Realization Process
Customer’s need
Design
Determine requirements
Write specifications
Design synthesis and Verification
Test development
Fabrication
Manufacture
Manufacturing test
Chips to customer
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Defining Terms
 Design synthesis: Given an I/O function, develop a
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procedure to manufacture a device using known
materials and processes.
Verification: Predictive analysis to ensure that the
synthesized design, when manufactured, will
perform the given I/O function.
Test: A manufacturing step that ensures that the
physical device, manufactured from the
synthesized design, has no manufacturing defect.
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Project Assignment: Product Definition
 Write specifications for a processor chip
 Architecture
 Speed
 Technology
 Power
 Cost
 Prepare for a class discussion on Jan 18, 2007.
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Design Team
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Architecture
System design
Verification
Design for testability
Synthesis
Power analysis
Physical design
Timing closure
Test generation
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VLSI Design & Test Seminar Series
 Must attend
 http://www.eng.auburn.edu/users/strouce/
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D&TSeminar.html
Every Wednesday, Broun 235, 4PM
January 17, 2007: Joe Bungo, The ARM
CPU Architecture
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