Electronic Devices and Circuits - Final Exam
An exam ticket consists on: two problems, one normal subject and three short subjects.
The exam will take place in room N-II-1, at 15:00 on Tuesday, July 6, 2010.
1.1
PROBLEMS:
1. Voltage and current divider;
2. Diode rectifier;
3. C filter diode rectifier;
4. Diode limiters;
5. Zener shunt voltage regulator;
6. BJT emitter bias.
7. Four resistors bias network for BJT;
8. Q-point for two BJTs circuit;
9. Common emitter (CE) amplifier;
10. CE amplifier with RE;
---------------------------------------------------11. Common collector amplifier (emitter follower);
12. Analyses and design of class B output stage;
13. Design bias network for MOS transistor;
14. Common Source MOS amplifier;
15. The Op Amp inverting and non-inverting amplifier,
16. The differential amplifier;
17. Current source with BJT;
18. The negative feedback amplifiers;
19. The voltage regulator with Zener diode and emitter follower.
1.2
NORMAL SUBJECTS:
1. The diode: main characteristic, symbol, the exponential diode forward and reverse bias;
2. Diode rectifiers without filters and capacitive input filters for diode rectifiers;
3. The physical basis of transistor operation and equivalent circuit models.
4. BJTs ac equivalent circuits and the simplified ac models;
---------------------------------------------------5. Class B output stage – circuit operation, power conv. efficiency and power dissipation;
6. Enhancement MOS-FETs: structure, physical operation, static charact. and equations;
7. The general feedback structure (and parameters), the series mixing - voltage sampling
topology, analysis of the feedback amplifier;
8. The voltage regulators parameters and the series voltage regulator (block diagram and the
basic op amp series regulator);
1.3
1.
2.
3.
4.
5.
6.
SHORT SUBJECTS:
Ideal independent sources and their suppression;
Resistors in series and voltage divider;
Resistors in parallel and current divider;
Thévenin equivalent circuit;
The ideal diode;
The constant voltage-drop model of the diode;
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7. Diode limiters;
8. Zener shunt voltage regulator;
9. BJT – definitions, symbols and modes of operation;
10. The transistor inverter;
11. The superposition theorem for ac-dc circuits;
12. Base bias for BJTs;
13. Emitter bias for BJTs.
14. Voltage divider bias for BJTs;
15. The voltage amplifier model;
16. The common emitter amplifier parameters;
17. The emitter follower parameters;
18. The “complete” hybrid- model;
19. The common emitter with emitter resistance amplifier parameters;
20. The h-parameters model of BJTs;
---------------------------------------------------21. Power amplifiers: classification of output stages;
22. Biasing the class AB output stage;
23. Single power supply operation for class B output stage;
24. Thermal resistances of BJTs;
25. Compound devices – BJT Darlington configuration;
26. Biasing the enhancement MOS-FET;
27. Small signal operation of FETs;
28. The ideal OpAmp and the inverting configuration;
29. The differential amplifier structure and operation;
30. The differential gain of the differential amplifier;
31. The common-mode gain of the differential amplifier;
32. The current mirror;
33. The standard discrete current source;
34. Gain desensitivity – a property of negative feedback;
35. Noise reduction – a property of negative feedback;
36. The input impedance of the series mixing topology;
37. The output impedance of the voltage sampling topology;
38. The Zener diode and emitter follower voltage regulator;
39. The overload protection circuit.
Observaţii:
Consultaţii: joi, 1.07 ora 17, sala N-III-6 şi luni 5.07 ora 16, sala N-III-6;
Examen: marţi, 6.07 ora 15, sala N-II-1.
Linia punctata delimiteaza subiectele de la partial de celelalte. Biletul va
contine un subiect (problema si teorie) din prima pate si un altul din partea a doua.
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