Resume_consulting_semi_010114 78.9 KB

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Mark K. Webb
Mark K. Webb
Home Address: 4100 Inca St, Albuquerque, NM, 87111
Home: 505-299-6675
Cell: 505-681-7614
Email: Mark@mkwventures.com
Objective: Provide consulting or part time services in the areas of technology, market analysis, business
development or manufacturing.
Experience
Summary: 24+ Years of progressively increasing responsibility and experience in leadership, management,
technology development, product development, and manufacturing.
July 2012-Present
MKW Ventures, LLC
Albuquerque, NM
Electronics Industry Management and Strategic Marketing Consultant
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Providing Consulting services for companies in areas of manufacturing, quality systems, strategic
planning, product lifecycle management, competitive analysis, and cost improvements
Current focus is NAND scaling, SSD roadmaps, NAND/NVM manufacturing costs
Publish monthly business and technology updates and commentary with recommendation for clients
Developed and delivered presentations on SSD/NAND forecasts, Leadership/Management Skills, Lean
Six Sigma Manufacturing, SWOT analysis.
Currently working with SSD OEMs and Electronic ODMs/Contract Manufacturers
Speaker on panels at Flash Memory Summit and Investment Conference
Sep 2008- July 2012
Intel Corporation
Folsom, CA
Director of Manufacturing, NAND Solutions Group
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Responsible for managing all manufacturing activities in the division, reporting to the VP and General
Manager for NAND Solution Group.
Includes Fab, Assembly, NAND Component Test as well as SSD (solid state drive) product manufacturing
and test at ODMs/EMS subcontractors.
Managed working relationships with two large joint ventures/JDP (Micron, HGST) as steering committee
member and Intel representative.
Managed contract manufacturing outsourcing, supplier selection, capacity planning and expansion, and
strategic roadmaps for manufacturing. Managed and partnered with subcontractors in China, Singapore,
Taiwan on wide variety of products.
Responsible for operations success and management including output, cost, quality, cycle time, capacity.
Responsible for moving leading edge NAND/SSD products from development to high volume.
Scope of responsibility: >$1 Billion in NAND/SSD sales, >3M SSDs per year, >1 Billion GBs in NAND
capacity on industry leading lithography with world class cost. Directly managed 10 people and indirectly
managed >50 employees
Sep 2006-Aug 2008
IM Flash Technologies, LLC
Lehi, UT
Corporate Product, Quality, and Reliability Engineering Manager
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Manage product engineering and quality assurance activities related to NAND production for the Joint
Venture. Position reported directly to Executive Office of IM Flash Technologies, LLC (CEO)
IM Flash is the leading manufacturer of NAND Memory and is responsible for >$1B sales per year.
Lead team responsible for working with three wafer fabs and two parent companies (Intel and Micron) to
ramp NAND products into high volume manufacturing.
Helped develop corporate vision, strategies and values and owned development of mission, expectations
and roles for IM Flash Product/Quality group.
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Worked with Micron and Intel on NAND product roadmaps and development strategies. Demonstrated
ability to work with multiple customers with different interests and create a single strategy with goals
2001-2006
Intel Corporation
Albuquerque , NM
Yield/Product Engineering Department Manager
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Manage department of 80-100 people responsible for Yield, Process Integration, Product Engineering,
Quality and Reliability at Intel’s largest semiconductor wafer fabrication plant. Processes included Flash,
leading edge microprocessor, SOC, communication, and chipset technologies
Member of leadership/management team for factory with ~$1B budget and ~3000 people
Led management team responsible for component supply line management across Fab, Probe, Assembly,
and Test and owned business decisions on product ramps and new product introductions. Resulted in
significant unit cost reduction while improving yields, output and product quality.
Led team of engineers responsible for improvement of communication processor yield, performance, and
quality from concept to world class yields and performance.
Demonstrated experience in management, ramping semiconductor technologies to world class
capabilities. Management of defect reduction, performance improvement, and cost reduction
1989-2000
Intel Corporation
Albuquerque , NM
Process Integration Manager/ Device Engineering Manager
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Process Integration manager responsible for Device (Front End) and interconnect (Back End) process
flows. Owned process changes, architecture, yield improvements. Managed 7-12 people during this time
Created two process integration groups from scratch, selecting engineers, developing roles and setting
group goals.
Led Front End Logic Integration. Responsible for 10-15 people working on product start up, CMOS
targeting, defect reduction, transistor characterization, and performance enhancements.
Managed group (7 people) responsible for device and transistor development on memory and logic
technology. Participated in development from technology inception to high volume manufacturing.
Owned module reliability evaluation including hot electron, cell reliability, gate oxide lifetime
Published internal and external papers on Flash reliability, oxide breakdown, hot carrier physics, transistor
scaling.
Education
 BS Electrical Engineering, California State University, Chico, 1989
 Two Masters level classes in semiconductor physics. Industry and Intel courses in Management,
Leadership, Process Technology, Semiconductor Devices, Product Development, Product Marketing,
Business Acumen
 Member IEEE
Skills
Organization Management and Leadership, Reliability physics and testing, CMOS and Flash memory processing,
personnel management and development. Semiconductor process development, defect reduction, performance
enhancement, cost reduction. Experience in contract manufacturing (CM), ODM/OSAT/EMS Management,
NAND based Solid state drive (SSD) design, manufacturing, reliability and marketing. NAND and SSD industry
roadmaps, competitive positions and benchmarking, Alternative memory technologies and strategies.
General knowledge of Hard disk drive (HDD) markets and SSD positioning strategies. Experience with Lean
manufacturing and implementation at Intel (Waste elimination, TPS, Poka-yoke), Six Sigma, quality improvement
and problem solving methodologies. Knowledge of multiple product lifecycle management systems and product
development planning.
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